arch/arm64/boot/dts/mediatek/mt8183-evb.dts

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Copyright (c) 2018 MediaTek Inc.
   4  * Author: Ben Ho <ben.ho@mediatek.com>
   5  *         Erin Lo <erin.lo@mediatek.com>
   6  */
   7
   8 /dts-v1/;
   9 #include "mt8183.dtsi"
  10 #include "mt6358.dtsi"
  11
  12 / {
  13         model = "MediaTek MT8183 evaluation board";
  14         compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
  15
  16         aliases {
  17                 serial0 = &uart0;
  18         };
  19
  20         memory@40000000 {
  21                 device_type = "memory";
  22                 reg = <0 0x40000000 0 0x80000000>;
  23         };
  24
  25         chosen {
  26                 stdout-path = "serial0:921600n8";
  27         };
  28
  29         reserved-memory {
  30                 #address-cells = <2>;
  31                 #size-cells = <2>;
  32                 ranges;
  33                 scp_mem_reserved: scp_mem_region {
  34                         compatible = "shared-dma-pool";
  35                         reg = <0 0x50000000 0 0x2900000>;
  36                         no-map;
  37                 };
  38         };
  39 };
  40
  41 &auxadc {
  42         status = "okay";
  43 };
  44
  45 &i2c0 {
  46         pinctrl-names = "default";
  47         pinctrl-0 = <&i2c_pins_0>;
  48         status = "okay";
  49         clock-frequency = <100000>;
  50 };
  51
  52 &i2c1 {
  53         pinctrl-names = "default";
  54         pinctrl-0 = <&i2c_pins_1>;
  55         status = "okay";
  56         clock-frequency = <100000>;
  57 };
  58
  59 &i2c2 {
  60         pinctrl-names = "default";
  61         pinctrl-0 = <&i2c_pins_2>;
  62         status = "okay";
  63         clock-frequency = <100000>;
  64 };
  65
  66 &i2c3 {
  67         pinctrl-names = "default";
  68         pinctrl-0 = <&i2c_pins_3>;
  69         status = "okay";
  70         clock-frequency = <100000>;
  71 };
  72
  73 &i2c4 {
  74         pinctrl-names = "default";
  75         pinctrl-0 = <&i2c_pins_4>;
  76         status = "okay";
  77         clock-frequency = <1000000>;
  78 };
  79
  80 &i2c5 {
  81         pinctrl-names = "default";
  82         pinctrl-0 = <&i2c_pins_5>;
  83         status = "okay";
  84         clock-frequency = <1000000>;
  85 };
  86
  87 &mmc0 {
  88         status = "okay";
  89         pinctrl-names = "default", "state_uhs";
  90         pinctrl-0 = <&mmc0_pins_default>;
  91         pinctrl-1 = <&mmc0_pins_uhs>;
  92         bus-width = <8>;
  93         max-frequency = <200000000>;
  94         cap-mmc-highspeed;
  95         mmc-hs200-1_8v;
  96         mmc-hs400-1_8v;
  97         cap-mmc-hw-reset;
  98         no-sdio;
  99         no-sd;
 100         hs400-ds-delay = <0x12814>;
 101         vmmc-supply = <&mt6358_vemc_reg>;
 102         vqmmc-supply = <&mt6358_vio18_reg>;
 103         assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
 104         assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
 105         non-removable;
 106 };
 107
 108 &mmc1 {
 109         status = "okay";
 110         pinctrl-names = "default", "state_uhs";
 111         pinctrl-0 = <&mmc1_pins_default>;
 112         pinctrl-1 = <&mmc1_pins_uhs>;
 113         bus-width = <4>;
 114         max-frequency = <200000000>;
 115         cap-sd-highspeed;
 116         sd-uhs-sdr50;
 117         sd-uhs-sdr104;
 118         cap-sdio-irq;
 119         no-mmc;
 120         no-sd;
 121         vmmc-supply = <&mt6358_vmch_reg>;
 122         vqmmc-supply = <&mt6358_vmc_reg>;
 123         keep-power-in-suspend;
 124         enable-sdio-wakeup;
 125         non-removable;
 126 };
 127
 128 &pio {
 129         i2c_pins_0: i2c0{
 130                 pins_i2c{
 131                         pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
 132                                  <PINMUX_GPIO83__FUNC_SCL0>;
 133                         mediatek,pull-up-adv = <3>;
 134                         mediatek,drive-strength-adv = <00>;
 135                 };
 136         };
 137
 138         i2c_pins_1: i2c1{
 139                 pins_i2c{
 140                         pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
 141                                  <PINMUX_GPIO84__FUNC_SCL1>;
 142                         mediatek,pull-up-adv = <3>;
 143                         mediatek,drive-strength-adv = <00>;
 144                 };
 145         };
 146
 147         i2c_pins_2: i2c2{
 148                 pins_i2c{
 149                         pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
 150                                  <PINMUX_GPIO104__FUNC_SDA2>;
 151                         mediatek,pull-up-adv = <3>;
 152                         mediatek,drive-strength-adv = <00>;
 153                 };
 154         };
 155
 156         i2c_pins_3: i2c3{
 157                 pins_i2c{
 158                         pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
 159                                  <PINMUX_GPIO51__FUNC_SDA3>;
 160                         mediatek,pull-up-adv = <3>;
 161                         mediatek,drive-strength-adv = <00>;
 162                 };
 163         };
 164
 165         i2c_pins_4: i2c4{
 166                 pins_i2c{
 167                         pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
 168                                  <PINMUX_GPIO106__FUNC_SDA4>;
 169                         mediatek,pull-up-adv = <3>;
 170                         mediatek,drive-strength-adv = <00>;
 171                 };
 172         };
 173
 174         i2c_pins_5: i2c5{
 175                 pins_i2c{
 176                         pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
 177                                  <PINMUX_GPIO49__FUNC_SDA5>;
 178                         mediatek,pull-up-adv = <3>;
 179                         mediatek,drive-strength-adv = <00>;
 180                 };
 181         };
 182
 183         spi_pins_0: spi0{
 184                 pins_spi{
 185                         pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
 186                                  <PINMUX_GPIO86__FUNC_SPI0_CSB>,
 187                                  <PINMUX_GPIO87__FUNC_SPI0_MO>,
 188                                  <PINMUX_GPIO88__FUNC_SPI0_CLK>;
 189                         bias-disable;
 190                 };
 191         };
 192
 193         mmc0_pins_default: mmc0default {
 194                 pins_cmd_dat {
 195                         pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
 196                                  <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
 197                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
 198                                  <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
 199                                  <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
 200                                  <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
 201                                  <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
 202                                  <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
 203                                  <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
 204                         input-enable;
 205                         bias-pull-up;
 206                 };
 207
 208                 pins_clk {
 209                         pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
 210                         bias-pull-down;
 211                 };
 212
 213                 pins_rst {
 214                         pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
 215                         bias-pull-up;
 216                 };
 217         };
 218
 219         mmc0_pins_uhs: mmc0 {
 220                 pins_cmd_dat {
 221                         pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
 222                                  <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
 223                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
 224                                  <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
 225                                  <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
 226                                  <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
 227                                  <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
 228                                  <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
 229                                  <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
 230                         input-enable;
 231                         drive-strength = <MTK_DRIVE_10mA>;
 232                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 233                 };
 234
 235                 pins_clk {
 236                         pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
 237                         drive-strength = <MTK_DRIVE_10mA>;
 238                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 239                 };
 240
 241                 pins_ds {
 242                         pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
 243                         drive-strength = <MTK_DRIVE_10mA>;
 244                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 245                 };
 246
 247                 pins_rst {
 248                         pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
 249                         drive-strength = <MTK_DRIVE_10mA>;
 250                         bias-pull-up;
 251                 };
 252         };
 253
 254         mmc1_pins_default: mmc1default {
 255                 pins_cmd_dat {
 256                         pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
 257                                    <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
 258                                    <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
 259                                    <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
 260                                    <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
 261                         input-enable;
 262                         bias-pull-up;
 263                 };
 264
 265                 pins_clk {
 266                         pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
 267                         input-enable;
 268                         bias-pull-down;
 269                 };
 270
 271                 pins_pmu {
 272                         pinmux = <PINMUX_GPIO178__FUNC_GPIO178>,
 273                                    <PINMUX_GPIO166__FUNC_GPIO166>;
 274                         output-high;
 275                 };
 276         };
 277
 278         mmc1_pins_uhs: mmc1 {
 279                 pins_cmd_dat {
 280                         pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
 281                                    <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
 282                                    <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
 283                                    <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
 284                                    <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
 285                         drive-strength = <MTK_DRIVE_6mA>;
 286                         input-enable;
 287                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 288                 };
 289
 290                 pins_clk {
 291                         pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
 292                         drive-strength = <MTK_DRIVE_6mA>;
 293                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 294                         input-enable;
 295                 };
 296         };
 297
 298         spi_pins_1: spi1{
 299                 pins_spi{
 300                         pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
 301                                  <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
 302                                  <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
 303                                  <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
 304                         bias-disable;
 305                 };
 306         };
 307
 308         spi_pins_2: spi2{
 309                 pins_spi{
 310                         pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
 311                                  <PINMUX_GPIO1__FUNC_SPI2_MO>,
 312                                  <PINMUX_GPIO2__FUNC_SPI2_CLK>,
 313                                  <PINMUX_GPIO94__FUNC_SPI2_MI>;
 314                         bias-disable;
 315                 };
 316         };
 317
 318         spi_pins_3: spi3{
 319                 pins_spi{
 320                         pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
 321                                  <PINMUX_GPIO22__FUNC_SPI3_CSB>,
 322                                  <PINMUX_GPIO23__FUNC_SPI3_MO>,
 323                                  <PINMUX_GPIO24__FUNC_SPI3_CLK>;
 324                         bias-disable;
 325                 };
 326         };
 327
 328         spi_pins_4: spi4{
 329                 pins_spi{
 330                         pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
 331                                  <PINMUX_GPIO18__FUNC_SPI4_CSB>,
 332                                  <PINMUX_GPIO19__FUNC_SPI4_MO>,
 333                                  <PINMUX_GPIO20__FUNC_SPI4_CLK>;
 334                         bias-disable;
 335                 };
 336         };
 337
 338         spi_pins_5: spi5{
 339                 pins_spi{
 340                         pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
 341                                  <PINMUX_GPIO14__FUNC_SPI5_CSB>,
 342                                  <PINMUX_GPIO15__FUNC_SPI5_MO>,
 343                                  <PINMUX_GPIO16__FUNC_SPI5_CLK>;
 344                         bias-disable;
 345                 };
 346         };
 347
 348         pwm_pins_1: pwm1 {
 349                 pins_pwm {
 350                         pinmux = <PINMUX_GPIO90__FUNC_PWM_A>;
 351                 };
 352         };
 353 };
 354
 355 &mfg {
 356         domain-supply = <&mt6358_vgpu_reg>;
 357 };
 358
 359 &spi0 {
 360         pinctrl-names = "default";
 361         pinctrl-0 = <&spi_pins_0>;
 362         mediatek,pad-select = <0>;
 363         status = "okay";
 364 };
 365
 366 &spi1 {
 367         pinctrl-names = "default";
 368         pinctrl-0 = <&spi_pins_1>;
 369         mediatek,pad-select = <0>;
 370         status = "okay";
 371 };
 372
 373 &spi2 {
 374         pinctrl-names = "default";
 375         pinctrl-0 = <&spi_pins_2>;
 376         mediatek,pad-select = <0>;
 377         status = "okay";
 378 };
 379
 380 &spi3 {
 381         pinctrl-names = "default";
 382         pinctrl-0 = <&spi_pins_3>;
 383         mediatek,pad-select = <0>;
 384         status = "okay";
 385 };
 386
 387 &spi4 {
 388         pinctrl-names = "default";
 389         pinctrl-0 = <&spi_pins_4>;
 390         mediatek,pad-select = <0>;
 391         status = "okay";
 392 };
 393
 394 &spi5 {
 395         pinctrl-names = "default";
 396         pinctrl-0 = <&spi_pins_5>;
 397         mediatek,pad-select = <0>;
 398         status = "okay";
 399
 400 };
 401
 402 &uart0 {
 403         status = "okay";
 404 };
 405
 406 &pwm1 {
 407         status = "okay";
 408         pinctrl-0 = <&pwm_pins_1>;
 409         pinctrl-names = "default";
 410 };