arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree file for Globalscale Marvell ESPRESSOBin Board
   4  * Copyright (C) 2016 Marvell
   5  *
   6  * Romain Perier <romain.perier@free-electrons.com>
   7  *
   8  */
   9
  10 #include <dt-bindings/gpio/gpio.h>
  11 #include "armada-372x.dtsi"
  12
  13 / {
  14         aliases {
  15                 ethernet0 = &eth0;
  16                 /* for dsa slave device */
  17                 ethernet1 = &switch0port1;
  18                 ethernet2 = &switch0port2;
  19                 ethernet3 = &switch0port3;
  20                 serial0 = &uart0;
  21                 serial1 = &uart1;
  22         };
  23
  24         chosen {
  25                 stdout-path = "serial0:115200n8";
  26         };
  27
  28         memory@0 {
  29                 device_type = "memory";
  30                 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
  31         };
  32
  33         vcc_sd_reg1: regulator {
  34                 compatible = "regulator-gpio";
  35                 regulator-name = "vcc_sd1";
  36                 regulator-min-microvolt = <1800000>;
  37                 regulator-max-microvolt = <3300000>;
  38                 regulator-boot-on;
  39
  40                 gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
  41                 gpios-states = <0>;
  42                 states = <1800000 0x1
  43                           3300000 0x0>;
  44                 enable-active-high;
  45         };
  46 };
  47
  48 /* J9 */
  49 &pcie0 {
  50         status = "okay";
  51         pinctrl-names = "default";
  52         pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
  53         reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
  54 };
  55
  56 /* J6 */
  57 &sata {
  58         status = "okay";
  59         phys = <&comphy2 0>;
  60         phy-names = "sata-phy";
  61 };
  62
  63 /* J1 */
  64 &sdhci1 {
  65         wp-inverted;
  66         bus-width = <4>;
  67         cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
  68         marvell,pad-type = "sd";
  69         vqmmc-supply = <&vcc_sd_reg1>;
  70
  71         pinctrl-names = "default";
  72         pinctrl-0 = <&sdio_pins>;
  73         status = "okay";
  74 };
  75
  76 &spi0 {
  77         status = "okay";
  78
  79         flash@0 {
  80                 reg = <0>;
  81                 compatible = "jedec,spi-nor";
  82                 spi-max-frequency = <104000000>;
  83                 m25p,fast-read;
  84         };
  85 };
  86
  87 /* Exported on the micro USB connector J5 through an FTDI */
  88 &uart0 {
  89         pinctrl-names = "default";
  90         pinctrl-0 = <&uart1_pins>;
  91         status = "okay";
  92 };
  93
  94 /*
  95  * Connector J17 and J18 expose a number of different features. Some pins are
  96  * multiplexed. This is the case for instance for the following features:
  97  * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
  98  *   how to enable it. Beware that the signals are 1.8V TTL.
  99  * - I2C
 100  * - SPI
 101  * - MMC
 102  */
 103
 104 /* J7 */
 105 &usb3 {
 106         status = "okay";
 107 };
 108
 109 /* J8 */
 110 &usb2 {
 111         status = "okay";
 112 };
 113
 114 &mdio {
 115         switch0: switch0@1 {
 116                 compatible = "marvell,mv88e6085";
 117                 #address-cells = <1>;
 118                 #size-cells = <0>;
 119                 reg = <1>;
 120
 121                 dsa,member = <0 0>;
 122
 123                 ports {
 124                         #address-cells = <1>;
 125                         #size-cells = <0>;
 126
 127                         switch0port0: port@0 {
 128                                 reg = <0>;
 129                                 label = "cpu";
 130                                 ethernet = <&eth0>;
 131                                 phy-mode = "rgmii-id";
 132                                 fixed-link {
 133                                         speed = <1000>;
 134                                         full-duplex;
 135                                 };
 136                         };
 137
 138                         switch0port1: port@1 {
 139                                 reg = <1>;
 140                                 label = "wan";
 141                                 phy-handle = <&switch0phy0>;
 142                         };
 143
 144                         switch0port2: port@2 {
 145                                 reg = <2>;
 146                                 label = "lan0";
 147                                 phy-handle = <&switch0phy1>;
 148                         };
 149
 150                         switch0port3: port@3 {
 151                                 reg = <3>;
 152                                 label = "lan1";
 153                                 phy-handle = <&switch0phy2>;
 154                         };
 155
 156                 };
 157
 158                 mdio {
 159                         #address-cells = <1>;
 160                         #size-cells = <0>;
 161
 162                         switch0phy0: switch0phy0@11 {
 163                                 reg = <0x11>;
 164                         };
 165                         switch0phy1: switch0phy1@12 {
 166                                 reg = <0x12>;
 167                         };
 168                         switch0phy2: switch0phy2@13 {
 169                                 reg = <0x13>;
 170                         };
 171                 };
 172         };
 173 };
 174
 175 &eth0 {
 176         pinctrl-names = "default";
 177         pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
 178         phy-mode = "rgmii-id";
 179         status = "okay";
 180
 181         fixed-link {
 182                 speed = <1000>;
 183                 full-duplex;
 184         };
 185 };