arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree file for Globalscale Marvell ESPRESSOBin Board
   4  * Copyright (C) 2016 Marvell
   5  *
   6  * Romain Perier <romain.perier@free-electrons.com>
   7  *
   8  */
   9
  10 #include <dt-bindings/gpio/gpio.h>
  11 #include "armada-372x.dtsi"
  12
  13 / {
  14         aliases {
  15                 ethernet0 = &eth0;
  16                 serial0 = &uart0;
  17                 serial1 = &uart1;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22         };
  23
  24         memory@0 {
  25                 device_type = "memory";
  26                 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
  27         };
  28
  29         vcc_sd_reg1: regulator {
  30                 compatible = "regulator-gpio";
  31                 regulator-name = "vcc_sd1";
  32                 regulator-min-microvolt = <1800000>;
  33                 regulator-max-microvolt = <3300000>;
  34                 regulator-boot-on;
  35
  36                 gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
  37                 gpios-states = <0>;
  38                 states = <1800000 0x1
  39                           3300000 0x0>;
  40                 enable-active-high;
  41         };
  42 };
  43
  44 /* J9 */
  45 &pcie0 {
  46         status = "okay";
  47         phys = <&comphy1 0>;
  48         pinctrl-names = "default";
  49         pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
  50         reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
  51 };
  52
  53 /* J6 */
  54 &sata {
  55         status = "okay";
  56         phys = <&comphy2 0>;
  57         phy-names = "sata-phy";
  58 };
  59
  60 /* J1 */
  61 &sdhci1 {
  62         wp-inverted;
  63         bus-width = <4>;
  64         cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
  65         marvell,pad-type = "sd";
  66         vqmmc-supply = <&vcc_sd_reg1>;
  67
  68         pinctrl-names = "default";
  69         pinctrl-0 = <&sdio_pins>;
  70         status = "okay";
  71 };
  72
  73 &spi0 {
  74         status = "okay";
  75
  76         flash@0 {
  77                 reg = <0>;
  78                 compatible = "jedec,spi-nor";
  79                 spi-max-frequency = <104000000>;
  80                 m25p,fast-read;
  81         };
  82 };
  83
  84 /* Exported on the micro USB connector J5 through an FTDI */
  85 &uart0 {
  86         pinctrl-names = "default";
  87         pinctrl-0 = <&uart1_pins>;
  88         status = "okay";
  89 };
  90
  91 /*
  92  * Connector J17 and J18 expose a number of different features. Some pins are
  93  * multiplexed. This is the case for instance for the following features:
  94  * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
  95  *   how to enable it. Beware that the signals are 1.8V TTL.
  96  * - I2C
  97  * - SPI
  98  * - MMC
  99  */
 100
 101 /* J7 */
 102 &usb3 {
 103         status = "okay";
 104 };
 105
 106 /* J8 */
 107 &usb2 {
 108         status = "okay";
 109 };
 110
 111 &mdio {
 112         switch0: switch0@1 {
 113                 compatible = "marvell,mv88e6085";
 114                 #address-cells = <1>;
 115                 #size-cells = <0>;
 116                 reg = <1>;
 117
 118                 dsa,member = <0 0>;
 119
 120                 ports {
 121                         #address-cells = <1>;
 122                         #size-cells = <0>;
 123
 124                         port@0 {
 125                                 reg = <0>;
 126                                 label = "cpu";
 127                                 ethernet = <&eth0>;
 128                                 phy-mode = "rgmii-id";
 129                                 fixed-link {
 130                                         speed = <1000>;
 131                                         full-duplex;
 132                                 };
 133                         };
 134
 135                         port@1 {
 136                                 reg = <1>;
 137                                 label = "wan";
 138                                 phy-handle = <&switch0phy0>;
 139                         };
 140
 141                         port@2 {
 142                                 reg = <2>;
 143                                 label = "lan0";
 144                                 phy-handle = <&switch0phy1>;
 145                         };
 146
 147                         port@3 {
 148                                 reg = <3>;
 149                                 label = "lan1";
 150                                 phy-handle = <&switch0phy2>;
 151                         };
 152
 153                 };
 154
 155                 mdio {
 156                         #address-cells = <1>;
 157                         #size-cells = <0>;
 158
 159                         switch0phy0: switch0phy0@11 {
 160                                 reg = <0x11>;
 161                         };
 162                         switch0phy1: switch0phy1@12 {
 163                                 reg = <0x12>;
 164                         };
 165                         switch0phy2: switch0phy2@13 {
 166                                 reg = <0x13>;
 167                         };
 168                 };
 169         };
 170 };
 171
 172 &eth0 {
 173         pinctrl-names = "default";
 174         pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
 175         phy-mode = "rgmii-id";
 176         status = "okay";
 177
 178         fixed-link {
 179                 speed = <1000>;
 180                 full-duplex;
 181         };
 182 };