f35d6897fbf73b8fd8cc91693c24a0fe0b14baa5
[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / freescale / imx8mq-librem5-devkit.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2018-2019 Purism SPC
4  */
5
6 /dts-v1/;
7
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "dt-bindings/pwm/pwm.h"
11 #include "dt-bindings/usb/pd.h"
12 #include "imx8mq.dtsi"
13
14 / {
15         model = "Purism Librem 5 devkit";
16         compatible = "purism,librem5-devkit", "fsl,imx8mq";
17
18         backlight_dsi: backlight-dsi {
19                 compatible = "pwm-backlight";
20                 /* 200 Hz for the PAM2841 */
21                 pwms = <&pwm1 0 5000000>;
22                 brightness-levels = <0 100>;
23                 num-interpolated-steps = <100>;
24                 /* Default brightness level (index into the array defined by */
25                 /* the "brightness-levels" property) */
26                 default-brightness-level = <0>;
27                 power-supply = <&reg_22v4_p>;
28         };
29
30         chosen {
31                 stdout-path = &uart1;
32         };
33
34         gpio-keys {
35                 compatible = "gpio-keys";
36                 pinctrl-names = "default";
37                 pinctrl-0 = <&pinctrl_gpio_keys>;
38
39                 btn1 {
40                         label = "VOL_UP";
41                         gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
42                         wakeup-source;
43                         linux,code = <KEY_VOLUMEUP>;
44                 };
45
46                 btn2 {
47                         label = "VOL_DOWN";
48                         gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
49                         wakeup-source;
50                         linux,code = <KEY_VOLUMEDOWN>;
51                 };
52
53                 hp-det {
54                         label = "HP_DET";
55                         gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
56                         wakeup-source;
57                         linux,code = <KEY_HP>;
58                 };
59
60                 wwan-wake {
61                         label = "WWAN_WAKE";
62                         gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
63                         interrupt-parent = <&gpio3>;
64                         interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
65                         wakeup-source;
66                         linux,code = <KEY_PHONE>;
67                 };
68         };
69
70         leds {
71                 compatible = "gpio-leds";
72                 pinctrl-names = "default";
73                 pinctrl-0 = <&pinctrl_gpio_leds>;
74
75                 led1 {
76                         label = "LED 1";
77                         gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
78                         default-state = "off";
79                 };
80         };
81
82         pmic_osc: clock-pmic {
83                 compatible = "fixed-clock";
84                 #clock-cells = <0>;
85                 clock-frequency = <32768>;
86                 clock-output-names = "pmic_osc";
87         };
88
89         reg_1v8_p: regulator-1v8-p {
90                 compatible = "regulator-fixed";
91                 regulator-name = "1v8_p";
92                 regulator-min-microvolt = <1800000>;
93                 regulator-max-microvolt = <1800000>;
94                 vin-supply = <&reg_pwr_en>;
95         };
96
97         reg_2v8_p: regulator-2v8-p {
98                 compatible = "regulator-fixed";
99                 regulator-name = "2v8_p";
100                 regulator-min-microvolt = <2800000>;
101                 regulator-max-microvolt = <2800000>;
102                 vin-supply = <&reg_pwr_en>;
103         };
104
105         reg_3v3_p: regulator-3v3-p {
106                 compatible = "regulator-fixed";
107                 regulator-name = "3v3_p";
108                 regulator-min-microvolt = <3300000>;
109                 regulator-max-microvolt = <3300000>;
110                 vin-supply = <&reg_pwr_en>;
111
112                 regulator-state-mem {
113                         regulator-on-in-suspend;
114                 };
115         };
116
117         reg_5v_p: regulator-5v-p {
118                 compatible = "regulator-fixed";
119                 regulator-name = "5v_p";
120                 regulator-min-microvolt = <5000000>;
121                 regulator-max-microvolt = <5000000>;
122                 vin-supply = <&reg_pwr_en>;
123
124                 regulator-state-mem {
125                         regulator-on-in-suspend;
126                 };
127         };
128
129         reg_22v4_p: regulator-22v4-p  {
130                 compatible = "regulator-fixed";
131                 regulator-name = "22v4_P";
132                 regulator-min-microvolt = <22400000>;
133                 regulator-max-microvolt = <22400000>;
134                 vin-supply = <&reg_pwr_en>;
135         };
136
137         reg_pwr_en: regulator-pwr-en {
138                 compatible = "regulator-fixed";
139                 pinctrl-names = "default";
140                 pinctrl-0 = <&pinctrl_pwr_en>;
141                 regulator-name = "PWR_EN";
142                 regulator-min-microvolt = <3300000>;
143                 regulator-max-microvolt = <3300000>;
144                 gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
145                 enable-active-high;
146                 regulator-always-on;
147         };
148
149         reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
150                 compatible = "regulator-fixed";
151                 pinctrl-names = "default";
152                 pinctrl-0 = <&pinctrl_usdhc2_pwr>;
153                 regulator-name = "VSD_3V3";
154                 regulator-min-microvolt = <3300000>;
155                 regulator-max-microvolt = <3300000>;
156                 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
157                 enable-active-high;
158                 regulator-always-on;
159         };
160
161         wwan_codec: sound-wwan-codec {
162                 compatible = "option,gtm601";
163                 #sound-dai-cells = <0>;
164         };
165
166         sound {
167                 compatible = "simple-audio-card";
168                 simple-audio-card,name = "sgtl5000";
169                 simple-audio-card,format = "i2s";
170                 simple-audio-card,widgets =
171                         "Microphone", "Microphone Jack",
172                         "Headphone", "Headphone Jack",
173                         "Speaker", "Speaker Ext",
174                         "Line", "Line In Jack";
175                 simple-audio-card,routing =
176                         "MIC_IN", "Microphone Jack",
177                         "Microphone Jack", "Mic Bias",
178                         "LINE_IN", "Line In Jack",
179                         "Headphone Jack", "HP_OUT",
180                         "Speaker Ext", "LINE_OUT";
181
182                 simple-audio-card,cpu {
183                         sound-dai = <&sai2>;
184                 };
185
186                 simple-audio-card,codec {
187                         sound-dai = <&sgtl5000>;
188                         clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
189                         frame-master;
190                         bitclock-master;
191                 };
192         };
193
194         sound-wwan {
195                 compatible = "simple-audio-card";
196                 simple-audio-card,name = "SIMCom SIM7100";
197                 simple-audio-card,format = "dsp_a";
198
199                 simple-audio-card,cpu {
200                         sound-dai = <&sai6>;
201                 };
202
203                 telephony_link_master: simple-audio-card,codec {
204                         sound-dai = <&wwan_codec>;
205                         frame-master;
206                         bitclock-master;
207                 };
208         };
209
210         vibrator {
211                 compatible = "gpio-vibrator";
212                 pinctrl-names = "default";
213                 pinctrl-0 = <&pinctrl_haptic>;
214                 enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
215                 vcc-supply = <&reg_3v3_p>;
216         };
217
218         wifi_pwr_en: regulator-wifi-en {
219                 compatible = "regulator-fixed";
220                 pinctrl-names = "default";
221                 pinctrl-0 = <&pinctrl_wifi_pwr_en>;
222                 regulator-name = "WIFI_EN";
223                 regulator-min-microvolt = <3300000>;
224                 regulator-max-microvolt = <3300000>;
225                 gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
226                 enable-active-high;
227                 regulator-always-on;
228         };
229 };
230
231 &A53_0 {
232         cpu-supply = <&buck2_reg>;
233 };
234
235 &A53_1 {
236         cpu-supply = <&buck2_reg>;
237 };
238
239 &A53_2 {
240         cpu-supply = <&buck2_reg>;
241 };
242
243 &A53_3 {
244         cpu-supply = <&buck2_reg>;
245 };
246
247 &clk {
248         assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL2>;
249         assigned-clock-rates = <786432000>, <722534400>;
250 };
251
252 &dphy {
253         status = "okay";
254 };
255
256 &fec1 {
257         pinctrl-names = "default";
258         pinctrl-0 = <&pinctrl_fec1>;
259         phy-mode = "rgmii-id";
260         phy-handle = <&ethphy0>;
261         fsl,magic-packet;
262         phy-supply = <&reg_3v3_p>;
263         status = "okay";
264
265         mdio {
266                 #address-cells = <1>;
267                 #size-cells = <0>;
268
269                 ethphy0: ethernet-phy@1 {
270                         compatible = "ethernet-phy-ieee802.3-c22";
271                         reg = <1>;
272                 };
273         };
274 };
275
276 &i2c1 {
277         clock-frequency = <100000>;
278         pinctrl-names = "default";
279         pinctrl-0 = <&pinctrl_i2c1>;
280         status = "okay";
281
282         pmic: pmic@4b {
283                 compatible = "rohm,bd71837";
284                 reg = <0x4b>;
285                 pinctrl-names = "default";
286                 pinctrl-0 = <&pinctrl_pmic>;
287                 clocks = <&pmic_osc>;
288                 clock-names = "osc";
289                 #clock-cells = <0>;
290                 clock-output-names = "pmic_clk";
291                 interrupt-parent = <&gpio1>;
292                 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
293                 rohm,reset-snvs-powered;
294
295                 regulators {
296                         buck1_reg: BUCK1 {
297                                 regulator-name = "buck1";
298                                 regulator-min-microvolt = <700000>;
299                                 regulator-max-microvolt = <1300000>;
300                                 regulator-boot-on;
301                                 regulator-always-on;
302                                 regulator-ramp-delay = <1250>;
303                                 rohm,dvs-run-voltage = <900000>;
304                                 rohm,dvs-idle-voltage = <850000>;
305                                 rohm,dvs-suspend-voltage = <800000>;
306                         };
307
308                         buck2_reg: BUCK2 {
309                                 regulator-name = "buck2";
310                                 regulator-min-microvolt = <700000>;
311                                 regulator-max-microvolt = <1300000>;
312                                 regulator-boot-on;
313                                 regulator-ramp-delay = <1250>;
314                                 rohm,dvs-run-voltage = <1000000>;
315                                 rohm,dvs-idle-voltage = <900000>;
316                         };
317
318                         buck3_reg: BUCK3 {
319                                 regulator-name = "buck3";
320                                 regulator-min-microvolt = <700000>;
321                                 regulator-max-microvolt = <1300000>;
322                                 regulator-boot-on;
323                                 regulator-enable-ramp-delay = <200>;
324                                 rohm,dvs-run-voltage = <900000>;
325                         };
326
327                         buck4_reg: BUCK4 {
328                                 regulator-name = "buck4";
329                                 regulator-min-microvolt = <700000>;
330                                 regulator-max-microvolt = <1300000>;
331                                 rohm,dvs-run-voltage = <1000000>;
332                         };
333
334                         buck5_reg: BUCK5 {
335                                 regulator-name = "buck5";
336                                 regulator-min-microvolt = <700000>;
337                                 regulator-max-microvolt = <1350000>;
338                                 regulator-boot-on;
339                                 regulator-always-on;
340                         };
341
342                         buck6_reg: BUCK6 {
343                                 regulator-name = "buck6";
344                                 regulator-min-microvolt = <3000000>;
345                                 regulator-max-microvolt = <3300000>;
346                                 regulator-boot-on;
347                                 regulator-always-on;
348                         };
349
350                         buck7_reg: BUCK7 {
351                                 regulator-name = "buck7";
352                                 regulator-min-microvolt = <1605000>;
353                                 regulator-max-microvolt = <1995000>;
354                                 regulator-boot-on;
355                                 regulator-always-on;
356                         };
357
358                         buck8_reg: BUCK8 {
359                                 regulator-name = "buck8";
360                                 regulator-min-microvolt = <800000>;
361                                 regulator-max-microvolt = <1400000>;
362                                 regulator-boot-on;
363                                 regulator-always-on;
364                         };
365
366                         ldo1_reg: LDO1 {
367                                 regulator-name = "ldo1";
368                                 regulator-min-microvolt = <3000000>;
369                                 regulator-max-microvolt = <3300000>;
370                                 regulator-boot-on;
371                                 /* leave on for snvs power button */
372                                 regulator-always-on;
373                         };
374
375                         ldo2_reg: LDO2 {
376                                 regulator-name = "ldo2";
377                                 regulator-min-microvolt = <900000>;
378                                 regulator-max-microvolt = <900000>;
379                                 regulator-boot-on;
380                                 /* leave on for snvs power button */
381                                 regulator-always-on;
382                         };
383
384                         ldo3_reg: LDO3 {
385                                 regulator-name = "ldo3";
386                                 regulator-min-microvolt = <1800000>;
387                                 regulator-max-microvolt = <3300000>;
388                                 regulator-boot-on;
389                                 regulator-always-on;
390                         };
391
392                         ldo4_reg: LDO4 {
393                                 regulator-name = "ldo4";
394                                 regulator-min-microvolt = <900000>;
395                                 regulator-max-microvolt = <1800000>;
396                                 regulator-boot-on;
397                                 regulator-always-on;
398                         };
399
400                         ldo5_reg: LDO5 {
401                                 regulator-name = "ldo5";
402                                 regulator-min-microvolt = <1800000>;
403                                 regulator-max-microvolt = <3300000>;
404                                 regulator-always-on;
405                         };
406
407                         ldo6_reg: LDO6 {
408                                 regulator-name = "ldo6";
409                                 regulator-min-microvolt = <900000>;
410                                 regulator-max-microvolt = <1800000>;
411                                 regulator-boot-on;
412                                 regulator-always-on;
413                         };
414
415                         ldo7_reg: LDO7 {
416                                 regulator-name = "ldo7";
417                                 regulator-min-microvolt = <1800000>;
418                                 regulator-max-microvolt = <3300000>;
419                                 regulator-boot-on;
420                                 regulator-always-on;
421                         };
422                 };
423         };
424
425         typec_ptn5100: usb-typec@52 {
426                 compatible = "nxp,ptn5110";
427                 reg = <0x52>;
428                 pinctrl-names = "default";
429                 pinctrl-0 = <&pinctrl_typec>;
430                 interrupt-parent = <&gpio3>;
431                 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
432
433                 connector {
434                         compatible = "usb-c-connector";
435                         label = "USB-C";
436                         data-role = "dual";
437                         power-role = "dual";
438                         try-power-role = "sink";
439                         source-pdos = <PDO_FIXED(5000, 2000,
440                                 PDO_FIXED_USB_COMM |
441                                 PDO_FIXED_DUAL_ROLE |
442                                 PDO_FIXED_DATA_SWAP )>;
443                         sink-pdos = <PDO_FIXED(5000, 3500, PDO_FIXED_USB_COMM |
444                                 PDO_FIXED_DUAL_ROLE |
445                                 PDO_FIXED_DATA_SWAP )
446                              PDO_VAR(5000, 5000, 3500)>;
447                         op-sink-microwatt = <10000000>;
448
449                         ports {
450                                 #address-cells = <1>;
451                                 #size-cells = <0>;
452
453                                 port@0 {
454                                         reg = <0>;
455
456                                         usb_con_hs: endpoint {
457                                                 remote-endpoint = <&typec_hs>;
458                                         };
459                                 };
460
461                                 port@1 {
462                                         reg = <1>;
463
464                                         usb_con_ss: endpoint {
465                                                 remote-endpoint = <&typec_ss>;
466                                         };
467                                 };
468                         };
469                 };
470         };
471
472         rtc@68 {
473                 compatible = "microcrystal,rv4162";
474                 reg = <0x68>;
475                 pinctrl-names = "default";
476                 pinctrl-0 = <&pinctrl_rtc>;
477                 interrupt-parent = <&gpio4>;
478                 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
479         };
480
481         charger@6b { /* bq25896 */
482                 compatible = "ti,bq25890";
483                 reg = <0x6b>;
484                 pinctrl-names = "default";
485                 pinctrl-0 = <&pinctrl_charger>;
486                 interrupt-parent = <&gpio3>;
487                 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
488                 ti,battery-regulation-voltage = <4192000>; /* 4.192V */
489                 ti,charge-current = <1600000>; /* 1.6A */
490                 ti,termination-current = <66000>;  /* 66mA */
491                 ti,precharge-current = <130000>; /* 130mA */
492                 ti,minimum-sys-voltage = <3000000>; /* 3V */
493                 ti,boost-voltage = <5000000>; /* 5V */
494                 ti,boost-max-current = <50000>; /* 50mA */
495         };
496 };
497
498 &i2c3 {
499         clock-frequency = <100000>;
500         pinctrl-names = "default";
501         pinctrl-0 = <&pinctrl_i2c3>;
502         status = "okay";
503
504         magnetometer@1e {
505                 compatible = "st,lsm9ds1-magn";
506                 reg = <0x1e>;
507                 pinctrl-names = "default";
508                 pinctrl-0 = <&pinctrl_imu>;
509                 interrupt-parent = <&gpio3>;
510                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
511                 vdd-supply = <&reg_3v3_p>;
512                 vddio-supply = <&reg_3v3_p>;
513         };
514
515         sgtl5000: audio-codec@a {
516                 compatible = "fsl,sgtl5000";
517                 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
518                 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
519                 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
520                 assigned-clock-rates = <24576000>;
521                 #sound-dai-cells = <0>;
522                 reg = <0x0a>;
523                 VDDD-supply = <&reg_1v8_p>;
524                 VDDIO-supply = <&reg_3v3_p>;
525                 VDDA-supply = <&reg_3v3_p>;
526         };
527
528         touchscreen@5d {
529                 compatible = "goodix,gt5688";
530                 reg = <0x5d>;
531                 pinctrl-names = "default";
532                 pinctrl-0 = <&pinctrl_ts>;
533                 interrupt-parent = <&gpio3>;
534                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
535                 reset-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
536                 irq-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
537                 touchscreen-size-x = <720>;
538                 touchscreen-size-y = <1440>;
539                 AVDD28-supply = <&reg_2v8_p>;
540                 VDDIO-supply = <&reg_1v8_p>;
541         };
542
543         proximity-sensor@60 {
544                 compatible = "vishay,vcnl4040";
545                 reg = <0x60>;
546                 pinctrl-0 = <&pinctrl_prox>;
547         };
548
549         accel-gyro@6a {
550                 compatible = "st,lsm9ds1-imu";
551                 reg = <0x6a>;
552                 vdd-supply = <&reg_3v3_p>;
553                 vddio-supply = <&reg_3v3_p>;
554                 mount-matrix =  "1",  "0",  "0",
555                                 "0",  "1",  "0",
556                                 "0",  "0", "-1";
557         };
558 };
559
560 &iomuxc {
561         pinctrl_bl: blgrp {
562                 fsl,pins = <
563                         MX8MQ_IOMUXC_GPIO1_IO01_PWM1_OUT        0x6 /* DSI_BL_PWM */
564                 >;
565         };
566
567         pinctrl_bt: btgrp {
568                 fsl,pins = <
569                         MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11     0x16 /* nBT_DISABLE */
570                         MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7      0x10 /* BT_HOST_WAKE */
571                 >;
572         };
573
574         pinctrl_charger: chargergrp {
575                 fsl,pins = <
576                         MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25       0x80 /* CHRG_nINT */
577                 >;
578         };
579
580         pinctrl_fec1: fec1grp {
581                 fsl,pins = <
582                         MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC                 0x3
583                         MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO               0x3
584                         MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3           0x1f
585                         MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2           0x1f
586                         MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1           0x1f
587                         MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0           0x1f
588                         MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3           0x91
589                         MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2           0x91
590                         MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1           0x91
591                         MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0           0x91
592                         MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC           0x1f
593                         MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC           0x91
594                         MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL     0x91
595                         MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL     0x1f
596                         MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9               0x19
597                         MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2      0x1f
598                 >;
599         };
600
601         pinctrl_ts: tsgrp {
602                 fsl,pins = <
603                         MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0         0x16  /* TOUCH INT */
604                         MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5       0x19  /* TOUCH RST */
605                 >;
606         };
607
608         pinctrl_gpio_leds: gpioledgrp {
609                 fsl,pins = <
610                         MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13      0x16
611                 >;
612         };
613
614         pinctrl_gpio_keys: gpiokeygrp {
615                 fsl,pins = <
616                         MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21       0x16
617                         MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22        0x16
618                         MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20        0x180  /* HP_DET */
619                         MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8      0x80   /* nWoWWAN */
620                 >;
621         };
622
623         pinctrl_haptic: hapticgrp {
624                 fsl,pins = <
625                         MX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4         0xc6   /* nHAPTIC */
626                 >;
627         };
628
629         pinctrl_i2c1: i2c1grp {
630                 fsl,pins = <
631                         MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL          0x4000001f
632                         MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA          0x4000001f
633                 >;
634         };
635
636         pinctrl_i2c3: i2c3grp {
637                 fsl,pins = <
638                         MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL          0x4000001f
639                         MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA          0x4000001f
640                 >;
641         };
642
643         pinctrl_imu: imugrp {
644                 fsl,pins = <
645                         MX8MQ_IOMUXC_SAI5_RXFS_GPIO3_IO19       0x8  /* IMU_INT */
646                 >;
647         };
648
649         pinctrl_pmic: pmicgrp {
650                 fsl,pins = <
651                         MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3       0x80  /* PMIC intr */
652                 >;
653         };
654
655         pinctrl_prox: proxgrp {
656                 fsl,pins = <
657                         MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12      0x80  /* prox intr */
658                 >;
659         };
660
661         pinctrl_pwr_en: pwrengrp {
662                 fsl,pins = <
663                         MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8       0x06
664                 >;
665         };
666
667         pinctrl_rtc: rtcgrp {
668                 fsl,pins = <
669                         MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29        0x80  /* RTC intr */
670                 >;
671         };
672
673         pinctrl_sai2: sai2grp {
674                 fsl,pins = <
675                         MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC     0xd6
676                         MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK      0xd6
677                         MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0    0xd6
678                         MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0    0xd6
679                         MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK        0xd6
680                 >;
681         };
682
683         pinctrl_sai6: sai6grp {
684                 fsl,pins = <
685                         MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0    0xd6
686                         MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC     0xd6
687                         MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK     0xd6
688                         MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0    0xd6
689                 >;
690         };
691
692         pinctrl_typec: typecgrp {
693                 fsl,pins = <
694                         MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12             0x16
695                         MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1               0x80
696                 >;
697         };
698
699         pinctrl_uart1: uart1grp {
700                 fsl,pins = <
701                         MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX             0x49
702                         MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX             0x49
703                 >;
704         };
705
706         pinctrl_uart2: uart2grp {
707                 fsl,pins = <
708                         MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX             0x49
709                         MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX             0x49
710                         MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B          0x49
711                         MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B          0x49
712                 >;
713         };
714
715         pinctrl_uart3: uart3grp {
716                 fsl,pins = <
717                         MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX             0x49
718                         MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX             0x49
719                 >;
720         };
721
722         pinctrl_uart4: uart4grp {
723                 fsl,pins = <
724                         MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX           0x49
725                         MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX           0x49
726                         MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B        0x49
727                         MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B         0x49
728                         MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K      0x49
729                 >;
730         };
731
732         pinctrl_usdhc1: usdhc1grp {
733                 fsl,pins = <
734                         MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x83
735                         MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                 0xc3
736                         MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0             0xc3
737                         MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1             0xc3
738                         MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2             0xc3
739                         MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3             0xc3
740                         MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4             0xc3
741                         MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5             0xc3
742                         MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6             0xc3
743                         MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7             0xc3
744                         MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE           0x83
745                         MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B         0xc1
746                 >;
747         };
748
749         pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
750                 fsl,pins = <
751                         MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x8d
752                         MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                 0xcd
753                         MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0             0xcd
754                         MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1             0xcd
755                         MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2             0xcd
756                         MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3             0xcd
757                         MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4             0xcd
758                         MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5             0xcd
759                         MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6             0xcd
760                         MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7             0xcd
761                         MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE           0x8d
762                         MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B         0xc1
763                 >;
764         };
765
766         pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
767                 fsl,pins = <
768                         MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK                 0x9f
769                         MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD                 0xdf
770                         MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0             0xdf
771                         MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1             0xdf
772                         MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2             0xdf
773                         MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3             0xdf
774                         MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4             0xdf
775                         MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5             0xdf
776                         MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6             0xdf
777                         MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7             0xdf
778                         MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE           0x9f
779                         MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B         0xc1
780                 >;
781         };
782
783         pinctrl_usdhc2_pwr: usdhc2pwrgrp {
784                 fsl,pins = <
785                         MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19     0x41
786                 >;
787         };
788
789         pinctrl_usdhc2_gpio: usdhc2gpiogrp {
790                 fsl,pins = <
791                         MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20          0x80 /* WIFI_WAKE */
792                 >;
793         };
794
795         pinctrl_usdhc2: usdhc2grp {
796                 fsl,pins = <
797                         MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK         0x83
798                         MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD         0xc3
799                         MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0     0xc3
800                         MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1     0xc3
801                         MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2     0xc3
802                         MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3     0xc3
803                 >;
804         };
805
806         pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
807                 fsl,pins = <
808                         MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK         0x8d
809                         MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD         0xcd
810                         MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0     0xcd
811                         MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1     0xcd
812                         MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2     0xcd
813                         MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3     0xcd
814                 >;
815         };
816
817         pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
818                 fsl,pins = <
819                         MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK         0x9f
820                         MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD         0xcf
821                         MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0     0xcf
822                         MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1     0xcf
823                         MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2     0xcf
824                         MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3     0xcf
825                 >;
826         };
827
828         pinctrl_wdog: wdoggrp {
829                 fsl,pins = <
830                         MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B    0xc6
831                 >;
832         };
833
834         pinctrl_wifi_pwr_en: wifipwrengrp {
835                 fsl,pins = <
836                         MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5         0x06
837                 >;
838         };
839
840         pinctrl_wwan: wwangrp {
841                 fsl,pins = <
842                         MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4       0x09 /* nWWAN_DISABLE */
843                         MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8      0x80 /* nWoWWAN */
844                         MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9      0x19 /* WWAN_RESET */
845                 >;
846         };
847 };
848
849 &lcdif {
850         status = "okay";
851 };
852
853 &mipi_dsi {
854         status = "okay";
855         #address-cells = <1>;
856         #size-cells = <0>;
857
858         panel@0 {
859                 compatible = "rocktech,jh057n00900";
860                 reg = <0>;
861                 backlight = <&backlight_dsi>;
862                 reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
863                 iovcc-supply = <&reg_1v8_p>;
864                 vcc-supply = <&reg_2v8_p>;
865                 port {
866                         panel_in: endpoint {
867                                 remote-endpoint = <&mipi_dsi_out>;
868                         };
869                 };
870         };
871
872         ports {
873                 port@1 {
874                         reg = <1>;
875                         mipi_dsi_out: endpoint {
876                                 remote-endpoint = <&panel_in>;
877                         };
878                 };
879         };
880 };
881
882 &pgc_gpu {
883         power-supply = <&buck3_reg>;
884 };
885
886 &pgc_vpu {
887         power-supply = <&buck4_reg>;
888 };
889
890 &pwm1 {
891         pinctrl-names = "default";
892         pinctrl-0 = <&pinctrl_bl>;
893         status = "okay";
894 };
895
896 &snvs_pwrkey {
897         status = "okay";
898 };
899
900 &sai2 {
901         pinctrl-names = "default";
902         pinctrl-0 = <&pinctrl_sai2>;
903         assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
904         assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
905         assigned-clock-rates = <24576000>;
906         status = "okay";
907 };
908
909 &sai6 {
910         pinctrl-names = "default";
911         pinctrl-0 = <&pinctrl_sai6>;
912         assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
913         assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
914         assigned-clock-rates = <24576000>;
915         fsl,sai-synchronous-rx;
916         status = "okay";
917 };
918
919 &uart1 { /* console */
920         pinctrl-names = "default";
921         pinctrl-0 = <&pinctrl_uart1>;
922         status = "okay";
923 };
924
925 &uart3 { /* GNSS */
926         pinctrl-names = "default";
927         pinctrl-0 = <&pinctrl_uart3>;
928         status = "okay";
929 };
930
931 &uart4 { /* BT */
932         pinctrl-names = "default";
933         pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_bt>;
934         uart-has-rtscts;
935         status = "okay";
936 };
937
938 &usb3_phy0 {
939         vbus-supply = <&reg_5v_p>;
940         status = "okay";
941 };
942
943 &usb3_phy1 {
944         vbus-supply = <&reg_5v_p>;
945         status = "okay";
946 };
947
948 &usb_dwc3_0 {
949         #address-cells = <1>;
950         #size-cells = <0>;
951         dr_mode = "otg";
952         status = "okay";
953
954         port@0 {
955                 reg = <0>;
956
957                 typec_hs: endpoint {
958                         remote-endpoint = <&usb_con_hs>;
959                 };
960         };
961
962         port@1 {
963                 reg = <1>;
964
965                 typec_ss: endpoint {
966                         remote-endpoint = <&usb_con_ss>;
967                 };
968         };
969 };
970
971 &usb_dwc3_1 {
972         dr_mode = "host";
973         status = "okay";
974 };
975
976 &usdhc1 {
977         assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
978         assigned-clock-rates = <400000000>;
979         pinctrl-names = "default", "state_100mhz", "state_200mhz";
980         pinctrl-0 = <&pinctrl_usdhc1>;
981         pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
982         pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
983         bus-width = <8>;
984         non-removable;
985         status = "okay";
986 };
987
988 &usdhc2 {
989         assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
990         assigned-clock-rates = <200000000>;
991         pinctrl-names = "default", "state_100mhz", "state_200mhz";
992         pinctrl-0 = <&pinctrl_usdhc2>;
993         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
994         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
995         bus-width = <4>;
996         vmmc-supply = <&reg_usdhc2_vmmc>;
997         power-supply = <&wifi_pwr_en>;
998         broken-cd;
999         disable-wp;
1000         cap-sdio-irq;
1001         keep-power-in-suspend;
1002         wakeup-source;
1003         status = "okay";
1004 };
1005
1006 &wdog1 {
1007         pinctrl-names = "default";
1008         pinctrl-0 = <&pinctrl_wdog>;
1009         fsl,ext-reset-output;
1010         status = "okay";
1011 };