arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Device Tree file for the Kontron SMARC-sAL28 board.
   4  *
   5  * Copyright (C) 2019 Michael Walle <michael@walle.cc>
   6  *
   7  */
   8
   9 /dts-v1/;
  10 #include "fsl-ls1028a.dtsi"
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/input/input.h>
  14
  15 / {
  16         model = "Kontron SMARC-sAL28";
  17         compatible = "kontron,sl28", "fsl,ls1028a";
  18
  19         aliases {
  20                 crypto = &crypto;
  21                 serial0 = &duart0;
  22                 serial1 = &duart1;
  23                 serial2 = &lpuart1;
  24                 spi0 = &fspi;
  25                 spi1 = &dspi2;
  26         };
  27
  28         buttons0 {
  29                 compatible = "gpio-keys";
  30
  31                 power-button {
  32                         interrupts-extended = <&sl28cpld_intc
  33                                                4 IRQ_TYPE_EDGE_BOTH>;
  34                         linux,code = <KEY_POWER>;
  35                         label = "Power";
  36                 };
  37
  38                 sleep-button {
  39                         interrupts-extended = <&sl28cpld_intc
  40                                                5 IRQ_TYPE_EDGE_BOTH>;
  41                         linux,code = <KEY_SLEEP>;
  42                         label = "Sleep";
  43                 };
  44         };
  45
  46         buttons1 {
  47                 compatible = "gpio-keys-polled";
  48                 poll-interval = <200>;
  49
  50                 lid-switch {
  51                         linux,input-type = <EV_SW>;
  52                         linux,code = <SW_LID>;
  53                         gpios = <&sl28cpld_gpio3 4 GPIO_ACTIVE_LOW>;
  54                         label = "Lid";
  55                 };
  56         };
  57
  58         chosen {
  59                 stdout-path = "serial0:115200n8";
  60         };
  61 };
  62
  63 &dspi2 {
  64         status = "okay";
  65 };
  66
  67 &duart0 {
  68         status = "okay";
  69 };
  70
  71 &duart1 {
  72         status = "okay";
  73 };
  74
  75 &enetc_port0 {
  76         phy-handle = <&phy0>;
  77         phy-connection-type = "sgmii";
  78         managed = "in-band-status";
  79         status = "okay";
  80
  81         mdio {
  82                 #address-cells = <1>;
  83                 #size-cells = <0>;
  84
  85                 phy0: ethernet-phy@5 {
  86                         reg = <0x5>;
  87                         eee-broken-1000t;
  88                         eee-broken-100tx;
  89                 };
  90         };
  91 };
  92
  93 &esdhc {
  94         sd-uhs-sdr104;
  95         sd-uhs-sdr50;
  96         sd-uhs-sdr25;
  97         sd-uhs-sdr12;
  98         status = "okay";
  99 };
 100
 101 &esdhc1 {
 102         mmc-hs200-1_8v;
 103         mmc-hs400-1_8v;
 104         bus-width = <8>;
 105         status = "okay";
 106 };
 107
 108 &fspi {
 109         status = "okay";
 110
 111         flash@0 {
 112                 #address-cells = <1>;
 113                 #size-cells = <1>;
 114                 compatible = "jedec,spi-nor";
 115                 m25p,fast-read;
 116                 spi-max-frequency = <133000000>;
 117                 reg = <0>;
 118                 /* The following setting enables 1-1-2 (CMD-ADDR-DATA) mode */
 119                 spi-rx-bus-width = <2>; /* 2 SPI Rx lines */
 120                 spi-tx-bus-width = <1>; /* 1 SPI Tx line */
 121
 122                 partition@0 {
 123                         reg = <0x000000 0x010000>;
 124                         label = "rcw";
 125                         read-only;
 126                 };
 127
 128                 partition@10000 {
 129                         reg = <0x010000 0x0f0000>;
 130                         label = "failsafe bootloader";
 131                         read-only;
 132                 };
 133
 134                 partition@100000 {
 135                         reg = <0x100000 0x040000>;
 136                         label = "failsafe DP firmware";
 137                         read-only;
 138                 };
 139
 140                 partition@140000 {
 141                         reg = <0x140000 0x0a0000>;
 142                         label = "failsafe trusted firmware";
 143                         read-only;
 144                 };
 145
 146                 partition@1e0000 {
 147                         reg = <0x1e0000 0x020000>;
 148                         label = "reserved";
 149                         read-only;
 150                 };
 151
 152                 partition@200000 {
 153                         reg = <0x200000 0x010000>;
 154                         label = "configuration store";
 155                 };
 156
 157                 partition@210000 {
 158                         reg = <0x210000 0x0f0000>;
 159                         label = "bootloader";
 160                 };
 161
 162                 partition@300000 {
 163                         reg = <0x300000 0x040000>;
 164                         label = "DP firmware";
 165                 };
 166
 167                 partition@340000 {
 168                         reg = <0x340000 0x0a0000>;
 169                         label = "trusted firmware";
 170                 };
 171
 172                 partition@3e0000 {
 173                         reg = <0x3e0000 0x020000>;
 174                         label = "bootloader environment";
 175                 };
 176         };
 177 };
 178
 179 &gpio1 {
 180         gpio-line-names =
 181                 "", "", "", "", "", "", "", "",
 182                 "", "", "", "", "", "", "", "",
 183                 "", "", "", "", "", "", "TDO", "TCK",
 184                 "", "", "", "", "", "", "", "";
 185 };
 186
 187 &gpio2 {
 188         gpio-line-names =
 189                 "", "", "", "", "", "", "TMS", "TDI",
 190                 "", "", "", "", "", "", "", "",
 191                 "", "", "", "", "", "", "", "",
 192                 "", "", "", "", "", "", "", "";
 193 };
 194
 195 &i2c0 {
 196         status = "okay";
 197
 198         rtc@32 {
 199                 compatible = "microcrystal,rv8803";
 200                 reg = <0x32>;
 201         };
 202
 203         sl28cpld@4a {
 204                 compatible = "kontron,sl28cpld";
 205                 reg = <0x4a>;
 206                 #address-cells = <1>;
 207                 #size-cells = <0>;
 208
 209                 watchdog@4 {
 210                         compatible = "kontron,sl28cpld-wdt";
 211                         reg = <0x4>;
 212                         kontron,assert-wdt-timeout-pin;
 213                 };
 214
 215                 hwmon@b {
 216                         compatible = "kontron,sl28cpld-fan";
 217                         reg = <0xb>;
 218                 };
 219
 220                 sl28cpld_pwm0: pwm@c {
 221                         compatible = "kontron,sl28cpld-pwm";
 222                         reg = <0xc>;
 223                         #pwm-cells = <2>;
 224                 };
 225
 226                 sl28cpld_pwm1: pwm@e {
 227                         compatible = "kontron,sl28cpld-pwm";
 228                         reg = <0xe>;
 229                         #pwm-cells = <2>;
 230                 };
 231
 232                 sl28cpld_gpio0: gpio@10 {
 233                         compatible = "kontron,sl28cpld-gpio";
 234                         reg = <0x10>;
 235                         interrupts-extended = <&gpio2 6
 236                                                IRQ_TYPE_EDGE_FALLING>;
 237
 238                         gpio-controller;
 239                         #gpio-cells = <2>;
 240                         gpio-line-names =
 241                                 "GPIO0_CAM0_PWR_N", "GPIO1_CAM1_PWR_N",
 242                                 "GPIO2_CAM0_RST_N", "GPIO3_CAM1_RST_N",
 243                                 "GPIO4_HDA_RST_N", "GPIO5_PWM_OUT",
 244                                 "GPIO6_TACHIN", "GPIO7";
 245
 246                         interrupt-controller;
 247                         #interrupt-cells = <2>;
 248                 };
 249
 250                 sl28cpld_gpio1: gpio@15 {
 251                         compatible = "kontron,sl28cpld-gpio";
 252                         reg = <0x15>;
 253                         interrupts-extended = <&gpio2 6
 254                                                IRQ_TYPE_EDGE_FALLING>;
 255
 256                         gpio-controller;
 257                         #gpio-cells = <2>;
 258                         gpio-line-names =
 259                                 "GPIO8", "GPIO9", "GPIO10", "GPIO11",
 260                                 "", "", "", "";
 261
 262                         interrupt-controller;
 263                         #interrupt-cells = <2>;
 264                 };
 265
 266                 sl28cpld_gpio2: gpio@1a {
 267                         compatible = "kontron,sl28cpld-gpo";
 268                         reg = <0x1a>;
 269
 270                         gpio-controller;
 271                         #gpio-cells = <2>;
 272                         gpio-line-names =
 273                                 "LCD0 voltage enable",
 274                                 "LCD0 backlight enable",
 275                                 "eMMC reset", "LVDS bridge reset",
 276                                 "LVDS bridge power-down",
 277                                 "SDIO power enable",
 278                                 "", "";
 279                 };
 280
 281                 sl28cpld_gpio3: gpio@1b {
 282                         compatible = "kontron,sl28cpld-gpi";
 283                         reg = <0x1b>;
 284
 285                         gpio-controller;
 286                         #gpio-cells = <2>;
 287                         gpio-line-names =
 288                                 "Power button", "Force recovery", "Sleep",
 289                                 "Battery low", "Lid state", "Charging",
 290                                 "Charger present", "";
 291                 };
 292
 293                 sl28cpld_intc: interrupt-controller@1c {
 294                         compatible = "kontron,sl28cpld-intc";
 295                         reg = <0x1c>;
 296                         interrupts-extended = <&gpio2 6
 297                                                IRQ_TYPE_EDGE_FALLING>;
 298
 299                         interrupt-controller;
 300                         #interrupt-cells = <2>;
 301                 };
 302         };
 303
 304         eeprom@50 {
 305                 compatible = "atmel,24c32";
 306                 reg = <0x50>;
 307                 pagesize = <32>;
 308         };
 309 };
 310
 311 &i2c3 {
 312         status = "okay";
 313 };
 314
 315 &i2c4 {
 316         status = "okay";
 317
 318         eeprom@50 {
 319                 compatible = "atmel,24c32";
 320                 reg = <0x50>;
 321                 pagesize = <32>;
 322         };
 323 };
 324
 325 &lpuart1 {
 326         status = "okay";
 327 };