arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree file for Freescale LS1012A RDB Board.
   4  *
   5  * Copyright 2016 Freescale Semiconductor, Inc.
   6  *
   7  */
   8 /dts-v1/;
   9
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11 #include "fsl-ls1012a.dtsi"
  12
  13 / {
  14         model = "LS1012A RDB Board";
  15         compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
  16
  17         aliases {
  18                 mmc0 = &esdhc0;
  19                 mmc1 = &esdhc1;
  20         };
  21 };
  22
  23 &duart0 {
  24         status = "okay";
  25 };
  26
  27 &esdhc0 {
  28         sd-uhs-sdr104;
  29         sd-uhs-sdr50;
  30         sd-uhs-sdr25;
  31         sd-uhs-sdr12;
  32         status = "okay";
  33 };
  34
  35 &esdhc1 {
  36         mmc-hs200-1_8v;
  37         status = "okay";
  38 };
  39
  40 &i2c0 {
  41         status = "okay";
  42
  43         accelerometer@1e {
  44                 compatible = "nxp,fxos8700";
  45                 reg = <0x1e>;
  46                 interrupt-parent = <&gpio26>;
  47                 interrupts = <13 IRQ_TYPE_EDGE_RISING>;
  48                 interrupt-names = "INT1";
  49         };
  50
  51         gyroscope@20 {
  52                 compatible = "nxp,fxas21002c";
  53                 reg = <0x20>;
  54         };
  55
  56         gpio@24 {
  57                 compatible = "nxp,pcal9555a";
  58                 reg = <0x24>;
  59                 gpio-controller;
  60                 #gpio-cells = <2>;
  61         };
  62
  63         gpio@25 {
  64                 compatible = "nxp,pcal9555a";
  65                 reg = <0x25>;
  66                 gpio-controller;
  67                 #gpio-cells = <2>;
  68         };
  69
  70         gpio26: gpio@26 {
  71                 compatible = "nxp,pcal9555a";
  72                 reg = <0x26>;
  73                 interrupt-parent = <&gpio0>;
  74                 interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
  75                 interrupt-controller;
  76                 #interrupt-cells = <2>;
  77                 gpio-controller;
  78                 #gpio-cells = <2>;
  79         };
  80
  81         current-sensor@40 {
  82                 compatible = "ti,ina220";
  83                 reg = <0x40>;
  84                 shunt-resistor = <2000>;
  85         };
  86 };
  87
  88 &qspi {
  89         status = "okay";
  90
  91         s25fs512s0: flash@0 {
  92                 compatible = "jedec,spi-nor";
  93                 #address-cells = <1>;
  94                 #size-cells = <1>;
  95                 spi-max-frequency = <50000000>;
  96                 m25p,fast-read;
  97                 reg = <0>;
  98                 spi-rx-bus-width = <2>;
  99                 spi-tx-bus-width = <2>;
 100         };
 101 };
 102
 103 &sata {
 104         status = "okay";
 105 };