1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
21 mmc0 = &sd_emmc_b; /* SD card */
22 mmc1 = &sd_emmc_c; /* eMMC */
23 mmc2 = &sd_emmc_a; /* SDIO */
31 simplefb_cvbs: framebuffer-cvbs {
32 compatible = "amlogic,simple-framebuffer",
34 amlogic,pipeline = "vpu-cvbs";
35 clocks = <&clkc CLKID_HDMI>,
36 <&clkc CLKID_HTX_PCLK>,
37 <&clkc CLKID_VPU_INTR>;
41 simplefb_hdmi: framebuffer-hdmi {
42 compatible = "amlogic,simple-framebuffer",
44 amlogic,pipeline = "vpu-hdmi";
45 clocks = <&clkc CLKID_HDMI>,
46 <&clkc CLKID_HTX_PCLK>,
47 <&clkc CLKID_VPU_INTR>;
53 compatible = "amlogic,meson-gxbb-efuse";
54 clocks = <&clkc CLKID_EFUSE>;
58 secure-monitor = <&sm>;
61 gpu_opp_table: opp-table-gpu {
62 compatible = "operating-points-v2";
65 opp-hz = /bits/ 64 <124999998>;
66 opp-microvolt = <800000>;
69 opp-hz = /bits/ 64 <249999996>;
70 opp-microvolt = <800000>;
73 opp-hz = /bits/ 64 <285714281>;
74 opp-microvolt = <800000>;
77 opp-hz = /bits/ 64 <399999994>;
78 opp-microvolt = <800000>;
81 opp-hz = /bits/ 64 <499999992>;
82 opp-microvolt = <800000>;
85 opp-hz = /bits/ 64 <666666656>;
86 opp-microvolt = <800000>;
89 opp-hz = /bits/ 64 <799999987>;
90 opp-microvolt = <800000>;
95 compatible = "arm,psci-1.0";
100 #address-cells = <2>;
104 /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
105 secmon_reserved: secmon@5000000 {
106 reg = <0x0 0x05000000 0x0 0x300000>;
110 /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
111 secmon_reserved_bl32: secmon@5300000 {
112 reg = <0x0 0x05300000 0x0 0x2000000>;
117 compatible = "shared-dma-pool";
119 size = <0x0 0x10000000>;
120 alignment = <0x0 0x400000>;
126 compatible = "amlogic,meson-gxbb-sm";
130 compatible = "simple-bus";
131 #address-cells = <2>;
135 pcie: pcie@fc000000 {
136 compatible = "amlogic,g12a-pcie", "snps,dw-pcie";
137 reg = <0x0 0xfc000000 0x0 0x400000>,
138 <0x0 0xff648000 0x0 0x2000>,
139 <0x0 0xfc400000 0x0 0x200000>;
140 reg-names = "elbi", "cfg", "config";
141 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
142 #interrupt-cells = <1>;
143 interrupt-map-mask = <0 0 0 0>;
144 interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
145 bus-range = <0x0 0xff>;
146 #address-cells = <3>;
149 ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000>,
150 <0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
152 clocks = <&clkc CLKID_PCIE_PHY
153 &clkc CLKID_PCIE_COMB
154 &clkc CLKID_PCIE_PLL>;
155 clock-names = "general",
158 resets = <&reset RESET_PCIE_CTRL_A>,
159 <&reset RESET_PCIE_APB>;
160 reset-names = "port",
163 phys = <&usb3_pcie_phy PHY_TYPE_PCIE>;
168 ethmac: ethernet@ff3f0000 {
169 compatible = "amlogic,meson-g12a-dwmac",
172 reg = <0x0 0xff3f0000 0x0 0x10000>,
173 <0x0 0xff634540 0x0 0x8>;
174 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
175 interrupt-names = "macirq";
176 clocks = <&clkc CLKID_ETH>,
177 <&clkc CLKID_FCLK_DIV2>,
179 <&clkc CLKID_FCLK_DIV2>;
180 clock-names = "stmmaceth", "clkin0", "clkin1",
182 rx-fifo-depth = <4096>;
183 tx-fifo-depth = <2048>;
187 #address-cells = <1>;
189 compatible = "snps,dwmac-mdio";
194 compatible = "simple-bus";
195 reg = <0x0 0xff600000 0x0 0x200000>;
196 #address-cells = <2>;
198 ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
201 compatible = "amlogic,meson-g12a-dw-hdmi";
202 reg = <0x0 0x0 0x0 0x10000>;
203 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
204 resets = <&reset RESET_HDMITX_CAPB3>,
205 <&reset RESET_HDMITX_PHY>,
206 <&reset RESET_HDMITX>;
207 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
208 clocks = <&clkc CLKID_HDMI>,
209 <&clkc CLKID_HTX_PCLK>,
210 <&clkc CLKID_VPU_INTR>;
211 clock-names = "isfr", "iahb", "venci";
212 #address-cells = <1>;
214 #sound-dai-cells = <0>;
218 hdmi_tx_venc_port: port@0 {
221 hdmi_tx_in: endpoint {
222 remote-endpoint = <&hdmi_tx_out>;
227 hdmi_tx_tmds_port: port@1 {
232 apb_efuse: bus@30000 {
233 compatible = "simple-bus";
234 reg = <0x0 0x30000 0x0 0x2000>;
235 #address-cells = <2>;
237 ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;
240 compatible = "amlogic,meson-rng";
241 reg = <0x0 0x218 0x0 0x4>;
242 clocks = <&clkc CLKID_RNG0>;
243 clock-names = "core";
247 acodec: audio-controller@32000 {
248 compatible = "amlogic,t9015";
249 reg = <0x0 0x32000 0x0 0x14>;
250 #sound-dai-cells = <0>;
251 sound-name-prefix = "ACODEC";
252 clocks = <&clkc CLKID_AUDIO_CODEC>;
253 clock-names = "pclk";
254 resets = <&reset RESET_AUDIO_CODEC>;
259 compatible = "simple-bus";
260 reg = <0x0 0x34400 0x0 0x400>;
261 #address-cells = <2>;
263 ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
265 periphs_pinctrl: pinctrl@40 {
266 compatible = "amlogic,meson-g12a-periphs-pinctrl";
267 #address-cells = <2>;
272 reg = <0x0 0x40 0x0 0x4c>,
274 <0x0 0x120 0x0 0x18>,
275 <0x0 0x2c0 0x0 0x40>,
276 <0x0 0x340 0x0 0x1c>;
284 gpio-ranges = <&periphs_pinctrl 0 0 86>;
287 cec_ao_a_h_pins: cec_ao_a_h {
289 groups = "cec_ao_a_h";
290 function = "cec_ao_a_h";
295 cec_ao_b_h_pins: cec_ao_b_h {
297 groups = "cec_ao_b_h";
298 function = "cec_ao_b_h";
303 emmc_ctrl_pins: emmc-ctrl {
308 drive-strength-microamp = <4000>;
315 drive-strength-microamp = <4000>;
319 emmc_data_4b_pins: emmc-data-4b {
321 groups = "emmc_nand_d0",
327 drive-strength-microamp = <4000>;
331 emmc_data_8b_pins: emmc-data-8b {
333 groups = "emmc_nand_d0",
343 drive-strength-microamp = <4000>;
347 emmc_ds_pins: emmc-ds {
349 groups = "emmc_nand_ds";
352 drive-strength-microamp = <4000>;
356 emmc_clk_gate_pins: emmc_clk_gate {
359 function = "gpio_periphs";
361 drive-strength-microamp = <4000>;
365 hdmitx_ddc_pins: hdmitx_ddc {
367 groups = "hdmitx_sda",
371 drive-strength-microamp = <4000>;
375 hdmitx_hpd_pins: hdmitx_hpd {
377 groups = "hdmitx_hpd_in";
384 i2c0_sda_c_pins: i2c0-sda-c {
386 groups = "i2c0_sda_c";
389 drive-strength-microamp = <3000>;
394 i2c0_sck_c_pins: i2c0-sck-c {
396 groups = "i2c0_sck_c";
399 drive-strength-microamp = <3000>;
403 i2c0_sda_z0_pins: i2c0-sda-z0 {
405 groups = "i2c0_sda_z0";
408 drive-strength-microamp = <3000>;
412 i2c0_sck_z1_pins: i2c0-sck-z1 {
414 groups = "i2c0_sck_z1";
417 drive-strength-microamp = <3000>;
421 i2c0_sda_z7_pins: i2c0-sda-z7 {
423 groups = "i2c0_sda_z7";
426 drive-strength-microamp = <3000>;
430 i2c0_sda_z8_pins: i2c0-sda-z8 {
432 groups = "i2c0_sda_z8";
435 drive-strength-microamp = <3000>;
439 i2c1_sda_x_pins: i2c1-sda-x {
441 groups = "i2c1_sda_x";
444 drive-strength-microamp = <3000>;
448 i2c1_sck_x_pins: i2c1-sck-x {
450 groups = "i2c1_sck_x";
453 drive-strength-microamp = <3000>;
457 i2c1_sda_h2_pins: i2c1-sda-h2 {
459 groups = "i2c1_sda_h2";
462 drive-strength-microamp = <3000>;
466 i2c1_sck_h3_pins: i2c1-sck-h3 {
468 groups = "i2c1_sck_h3";
471 drive-strength-microamp = <3000>;
475 i2c1_sda_h6_pins: i2c1-sda-h6 {
477 groups = "i2c1_sda_h6";
480 drive-strength-microamp = <3000>;
484 i2c1_sck_h7_pins: i2c1-sck-h7 {
486 groups = "i2c1_sck_h7";
489 drive-strength-microamp = <3000>;
493 i2c2_sda_x_pins: i2c2-sda-x {
495 groups = "i2c2_sda_x";
498 drive-strength-microamp = <3000>;
502 i2c2_sck_x_pins: i2c2-sck-x {
504 groups = "i2c2_sck_x";
507 drive-strength-microamp = <3000>;
511 i2c2_sda_z_pins: i2c2-sda-z {
513 groups = "i2c2_sda_z";
516 drive-strength-microamp = <3000>;
520 i2c2_sck_z_pins: i2c2-sck-z {
522 groups = "i2c2_sck_z";
525 drive-strength-microamp = <3000>;
529 i2c3_sda_h_pins: i2c3-sda-h {
531 groups = "i2c3_sda_h";
534 drive-strength-microamp = <3000>;
538 i2c3_sck_h_pins: i2c3-sck-h {
540 groups = "i2c3_sck_h";
543 drive-strength-microamp = <3000>;
547 i2c3_sda_a_pins: i2c3-sda-a {
549 groups = "i2c3_sda_a";
552 drive-strength-microamp = <3000>;
556 i2c3_sck_a_pins: i2c3-sck-a {
558 groups = "i2c3_sck_a";
561 drive-strength-microamp = <3000>;
565 mclk0_a_pins: mclk0-a {
570 drive-strength-microamp = <3000>;
574 mclk1_a_pins: mclk1-a {
579 drive-strength-microamp = <3000>;
583 mclk1_x_pins: mclk1-x {
588 drive-strength-microamp = <3000>;
592 mclk1_z_pins: mclk1-z {
597 drive-strength-microamp = <3000>;
612 pdm_din0_a_pins: pdm-din0-a {
614 groups = "pdm_din0_a";
620 pdm_din0_c_pins: pdm-din0-c {
622 groups = "pdm_din0_c";
628 pdm_din0_x_pins: pdm-din0-x {
630 groups = "pdm_din0_x";
636 pdm_din0_z_pins: pdm-din0-z {
638 groups = "pdm_din0_z";
644 pdm_din1_a_pins: pdm-din1-a {
646 groups = "pdm_din1_a";
652 pdm_din1_c_pins: pdm-din1-c {
654 groups = "pdm_din1_c";
660 pdm_din1_x_pins: pdm-din1-x {
662 groups = "pdm_din1_x";
668 pdm_din1_z_pins: pdm-din1-z {
670 groups = "pdm_din1_z";
676 pdm_din2_a_pins: pdm-din2-a {
678 groups = "pdm_din2_a";
684 pdm_din2_c_pins: pdm-din2-c {
686 groups = "pdm_din2_c";
692 pdm_din2_x_pins: pdm-din2-x {
694 groups = "pdm_din2_x";
700 pdm_din2_z_pins: pdm-din2-z {
702 groups = "pdm_din2_z";
708 pdm_din3_a_pins: pdm-din3-a {
710 groups = "pdm_din3_a";
716 pdm_din3_c_pins: pdm-din3-c {
718 groups = "pdm_din3_c";
724 pdm_din3_x_pins: pdm-din3-x {
726 groups = "pdm_din3_x";
732 pdm_din3_z_pins: pdm-din3-z {
734 groups = "pdm_din3_z";
740 pdm_dclk_a_pins: pdm-dclk-a {
742 groups = "pdm_dclk_a";
745 drive-strength-microamp = <500>;
749 pdm_dclk_c_pins: pdm-dclk-c {
751 groups = "pdm_dclk_c";
754 drive-strength-microamp = <500>;
758 pdm_dclk_x_pins: pdm-dclk-x {
760 groups = "pdm_dclk_x";
763 drive-strength-microamp = <500>;
767 pdm_dclk_z_pins: pdm-dclk-z {
769 groups = "pdm_dclk_z";
772 drive-strength-microamp = <500>;
784 pwm_b_x7_pins: pwm-b-x7 {
792 pwm_b_x19_pins: pwm-b-x19 {
794 groups = "pwm_b_x19";
800 pwm_c_c_pins: pwm-c-c {
808 pwm_c_x5_pins: pwm-c-x5 {
816 pwm_c_x8_pins: pwm-c-x8 {
824 pwm_d_x3_pins: pwm-d-x3 {
832 pwm_d_x6_pins: pwm-d-x6 {
848 pwm_f_x_pins: pwm-f-x {
856 pwm_f_h_pins: pwm-f-h {
864 sdcard_c_pins: sdcard_c {
866 groups = "sdcard_d0_c",
873 drive-strength-microamp = <4000>;
877 groups = "sdcard_clk_c";
880 drive-strength-microamp = <4000>;
884 sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
887 function = "gpio_periphs";
889 drive-strength-microamp = <4000>;
893 sdcard_z_pins: sdcard_z {
895 groups = "sdcard_d0_z",
902 drive-strength-microamp = <4000>;
906 groups = "sdcard_clk_z";
909 drive-strength-microamp = <4000>;
913 sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
916 function = "gpio_periphs";
918 drive-strength-microamp = <4000>;
932 drive-strength-microamp = <4000>;
936 sdio_clk_gate_pins: sdio_clk_gate {
939 function = "gpio_periphs";
941 drive-strength-microamp = <4000>;
945 spdif_in_a10_pins: spdif-in-a10 {
947 groups = "spdif_in_a10";
948 function = "spdif_in";
953 spdif_in_a12_pins: spdif-in-a12 {
955 groups = "spdif_in_a12";
956 function = "spdif_in";
961 spdif_in_h_pins: spdif-in-h {
963 groups = "spdif_in_h";
964 function = "spdif_in";
969 spdif_out_h_pins: spdif-out-h {
971 groups = "spdif_out_h";
972 function = "spdif_out";
973 drive-strength-microamp = <500>;
978 spdif_out_a11_pins: spdif-out-a11 {
980 groups = "spdif_out_a11";
981 function = "spdif_out";
982 drive-strength-microamp = <500>;
987 spdif_out_a13_pins: spdif-out-a13 {
989 groups = "spdif_out_a13";
990 function = "spdif_out";
991 drive-strength-microamp = <500>;
996 spicc0_x_pins: spicc0-x {
998 groups = "spi0_mosi_x",
1002 drive-strength-microamp = <4000>;
1007 spicc0_ss0_x_pins: spicc0-ss0-x {
1009 groups = "spi0_ss0_x";
1011 drive-strength-microamp = <4000>;
1016 spicc0_c_pins: spicc0-c {
1018 groups = "spi0_mosi_c",
1023 drive-strength-microamp = <4000>;
1028 spicc1_pins: spicc1 {
1030 groups = "spi1_mosi",
1034 drive-strength-microamp = <4000>;
1038 spicc1_ss0_pins: spicc1-ss0 {
1040 groups = "spi1_ss0";
1042 drive-strength-microamp = <4000>;
1047 tdm_a_din0_pins: tdm-a-din0 {
1049 groups = "tdm_a_din0";
1056 tdm_a_din1_pins: tdm-a-din1 {
1058 groups = "tdm_a_din1";
1064 tdm_a_dout0_pins: tdm-a-dout0 {
1066 groups = "tdm_a_dout0";
1069 drive-strength-microamp = <3000>;
1073 tdm_a_dout1_pins: tdm-a-dout1 {
1075 groups = "tdm_a_dout1";
1078 drive-strength-microamp = <3000>;
1082 tdm_a_fs_pins: tdm-a-fs {
1084 groups = "tdm_a_fs";
1087 drive-strength-microamp = <3000>;
1091 tdm_a_sclk_pins: tdm-a-sclk {
1093 groups = "tdm_a_sclk";
1096 drive-strength-microamp = <3000>;
1100 tdm_a_slv_fs_pins: tdm-a-slv-fs {
1102 groups = "tdm_a_slv_fs";
1109 tdm_a_slv_sclk_pins: tdm-a-slv-sclk {
1111 groups = "tdm_a_slv_sclk";
1117 tdm_b_din0_pins: tdm-b-din0 {
1119 groups = "tdm_b_din0";
1125 tdm_b_din1_pins: tdm-b-din1 {
1127 groups = "tdm_b_din1";
1133 tdm_b_din2_pins: tdm-b-din2 {
1135 groups = "tdm_b_din2";
1141 tdm_b_din3_a_pins: tdm-b-din3-a {
1143 groups = "tdm_b_din3_a";
1149 tdm_b_din3_h_pins: tdm-b-din3-h {
1151 groups = "tdm_b_din3_h";
1157 tdm_b_dout0_pins: tdm-b-dout0 {
1159 groups = "tdm_b_dout0";
1162 drive-strength-microamp = <3000>;
1166 tdm_b_dout1_pins: tdm-b-dout1 {
1168 groups = "tdm_b_dout1";
1171 drive-strength-microamp = <3000>;
1175 tdm_b_dout2_pins: tdm-b-dout2 {
1177 groups = "tdm_b_dout2";
1180 drive-strength-microamp = <3000>;
1184 tdm_b_dout3_a_pins: tdm-b-dout3-a {
1186 groups = "tdm_b_dout3_a";
1189 drive-strength-microamp = <3000>;
1193 tdm_b_dout3_h_pins: tdm-b-dout3-h {
1195 groups = "tdm_b_dout3_h";
1198 drive-strength-microamp = <3000>;
1202 tdm_b_fs_pins: tdm-b-fs {
1204 groups = "tdm_b_fs";
1207 drive-strength-microamp = <3000>;
1211 tdm_b_sclk_pins: tdm-b-sclk {
1213 groups = "tdm_b_sclk";
1216 drive-strength-microamp = <3000>;
1220 tdm_b_slv_fs_pins: tdm-b-slv-fs {
1222 groups = "tdm_b_slv_fs";
1228 tdm_b_slv_sclk_pins: tdm-b-slv-sclk {
1230 groups = "tdm_b_slv_sclk";
1236 tdm_c_din0_a_pins: tdm-c-din0-a {
1238 groups = "tdm_c_din0_a";
1244 tdm_c_din0_z_pins: tdm-c-din0-z {
1246 groups = "tdm_c_din0_z";
1252 tdm_c_din1_a_pins: tdm-c-din1-a {
1254 groups = "tdm_c_din1_a";
1260 tdm_c_din1_z_pins: tdm-c-din1-z {
1262 groups = "tdm_c_din1_z";
1268 tdm_c_din2_a_pins: tdm-c-din2-a {
1270 groups = "tdm_c_din2_a";
1276 eth_leds_pins: eth-leds {
1278 groups = "eth_link_led",
1287 groups = "eth_mdio",
1297 drive-strength-microamp = <4000>;
1302 eth_rgmii_pins: eth-rgmii {
1304 groups = "eth_rxd2_rgmii",
1310 drive-strength-microamp = <4000>;
1315 tdm_c_din2_z_pins: tdm-c-din2-z {
1317 groups = "tdm_c_din2_z";
1323 tdm_c_din3_a_pins: tdm-c-din3-a {
1325 groups = "tdm_c_din3_a";
1331 tdm_c_din3_z_pins: tdm-c-din3-z {
1333 groups = "tdm_c_din3_z";
1339 tdm_c_dout0_a_pins: tdm-c-dout0-a {
1341 groups = "tdm_c_dout0_a";
1344 drive-strength-microamp = <3000>;
1348 tdm_c_dout0_z_pins: tdm-c-dout0-z {
1350 groups = "tdm_c_dout0_z";
1353 drive-strength-microamp = <3000>;
1357 tdm_c_dout1_a_pins: tdm-c-dout1-a {
1359 groups = "tdm_c_dout1_a";
1362 drive-strength-microamp = <3000>;
1366 tdm_c_dout1_z_pins: tdm-c-dout1-z {
1368 groups = "tdm_c_dout1_z";
1371 drive-strength-microamp = <3000>;
1375 tdm_c_dout2_a_pins: tdm-c-dout2-a {
1377 groups = "tdm_c_dout2_a";
1380 drive-strength-microamp = <3000>;
1384 tdm_c_dout2_z_pins: tdm-c-dout2-z {
1386 groups = "tdm_c_dout2_z";
1389 drive-strength-microamp = <3000>;
1393 tdm_c_dout3_a_pins: tdm-c-dout3-a {
1395 groups = "tdm_c_dout3_a";
1398 drive-strength-microamp = <3000>;
1402 tdm_c_dout3_z_pins: tdm-c-dout3-z {
1404 groups = "tdm_c_dout3_z";
1407 drive-strength-microamp = <3000>;
1411 tdm_c_fs_a_pins: tdm-c-fs-a {
1413 groups = "tdm_c_fs_a";
1416 drive-strength-microamp = <3000>;
1420 tdm_c_fs_z_pins: tdm-c-fs-z {
1422 groups = "tdm_c_fs_z";
1425 drive-strength-microamp = <3000>;
1429 tdm_c_sclk_a_pins: tdm-c-sclk-a {
1431 groups = "tdm_c_sclk_a";
1434 drive-strength-microamp = <3000>;
1438 tdm_c_sclk_z_pins: tdm-c-sclk-z {
1440 groups = "tdm_c_sclk_z";
1443 drive-strength-microamp = <3000>;
1447 tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a {
1449 groups = "tdm_c_slv_fs_a";
1455 tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z {
1457 groups = "tdm_c_slv_fs_z";
1463 tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a {
1465 groups = "tdm_c_slv_sclk_a";
1471 tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z {
1473 groups = "tdm_c_slv_sclk_z";
1479 uart_a_pins: uart-a {
1481 groups = "uart_a_tx",
1483 function = "uart_a";
1488 uart_a_cts_rts_pins: uart-a-cts-rts {
1490 groups = "uart_a_cts",
1492 function = "uart_a";
1497 uart_b_pins: uart-b {
1499 groups = "uart_b_tx",
1501 function = "uart_b";
1506 uart_c_pins: uart-c {
1508 groups = "uart_c_tx",
1510 function = "uart_c";
1515 uart_c_cts_rts_pins: uart-c-cts-rts {
1517 groups = "uart_c_cts",
1519 function = "uart_c";
1526 cpu_temp: temperature-sensor@34800 {
1527 compatible = "amlogic,g12a-cpu-thermal",
1528 "amlogic,g12a-thermal";
1529 reg = <0x0 0x34800 0x0 0x50>;
1530 interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
1531 clocks = <&clkc CLKID_TS>;
1532 #thermal-sensor-cells = <0>;
1533 amlogic,ao-secure = <&sec_AO>;
1536 ddr_temp: temperature-sensor@34c00 {
1537 compatible = "amlogic,g12a-ddr-thermal",
1538 "amlogic,g12a-thermal";
1539 reg = <0x0 0x34c00 0x0 0x50>;
1540 interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
1541 clocks = <&clkc CLKID_TS>;
1542 #thermal-sensor-cells = <0>;
1543 amlogic,ao-secure = <&sec_AO>;
1546 usb2_phy0: phy@36000 {
1547 compatible = "amlogic,g12a-usb2-phy";
1548 reg = <0x0 0x36000 0x0 0x2000>;
1550 clock-names = "xtal";
1551 resets = <&reset RESET_USB_PHY20>;
1552 reset-names = "phy";
1557 compatible = "simple-bus";
1558 reg = <0x0 0x38000 0x0 0x400>;
1559 #address-cells = <2>;
1561 ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>;
1563 canvas: video-lut@48 {
1564 compatible = "amlogic,canvas";
1565 reg = <0x0 0x48 0x0 0x14>;
1569 usb2_phy1: phy@3a000 {
1570 compatible = "amlogic,g12a-usb2-phy";
1571 reg = <0x0 0x3a000 0x0 0x2000>;
1573 clock-names = "xtal";
1574 resets = <&reset RESET_USB_PHY21>;
1575 reset-names = "phy";
1580 compatible = "simple-bus";
1581 reg = <0x0 0x3c000 0x0 0x1400>;
1582 #address-cells = <2>;
1584 ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
1586 hhi: system-controller@0 {
1587 compatible = "amlogic,meson-gx-hhi-sysctrl",
1588 "simple-mfd", "syscon";
1589 reg = <0 0 0 0x400>;
1591 clkc: clock-controller {
1592 compatible = "amlogic,g12a-clkc";
1595 clock-names = "xtal";
1598 pwrc: power-controller {
1599 compatible = "amlogic,meson-g12a-pwrc";
1600 #power-domain-cells = <1>;
1601 amlogic,ao-sysctrl = <&rti>;
1602 resets = <&reset RESET_VIU>,
1603 <&reset RESET_VENC>,
1604 <&reset RESET_VCBUS>,
1605 <&reset RESET_BT656>,
1606 <&reset RESET_RDMA>,
1607 <&reset RESET_VENCI>,
1608 <&reset RESET_VENCP>,
1609 <&reset RESET_VDAC>,
1610 <&reset RESET_VDI6>,
1611 <&reset RESET_VENCL>,
1612 <&reset RESET_VID_LOCK>;
1613 reset-names = "viu", "venc", "vcbus", "bt656",
1614 "rdma", "venci", "vencp", "vdac",
1615 "vdi6", "vencl", "vid_lock";
1616 clocks = <&clkc CLKID_VPU>,
1618 clock-names = "vpu", "vapb";
1620 * VPU clocking is provided by two identical clock paths
1621 * VPU_0 and VPU_1 muxed to a single clock by a glitch
1622 * free mux to safely change frequency while running.
1623 * Same for VAPB but with a final gate after the glitch free mux.
1625 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1626 <&clkc CLKID_VPU_0>,
1627 <&clkc CLKID_VPU>, /* Glitch free mux */
1628 <&clkc CLKID_VAPB_0_SEL>,
1629 <&clkc CLKID_VAPB_0>,
1630 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1631 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
1632 <0>, /* Do Nothing */
1633 <&clkc CLKID_VPU_0>,
1634 <&clkc CLKID_FCLK_DIV4>,
1635 <0>, /* Do Nothing */
1636 <&clkc CLKID_VAPB_0>;
1637 assigned-clock-rates = <0>, /* Do Nothing */
1639 <0>, /* Do Nothing */
1640 <0>, /* Do Nothing */
1642 <0>; /* Do Nothing */
1647 usb3_pcie_phy: phy@46000 {
1648 compatible = "amlogic,g12a-usb3-pcie-phy";
1649 reg = <0x0 0x46000 0x0 0x2000>;
1650 clocks = <&clkc CLKID_PCIE_PLL>;
1651 clock-names = "ref_clk";
1652 resets = <&reset RESET_PCIE_PHY>;
1653 reset-names = "phy";
1654 assigned-clocks = <&clkc CLKID_PCIE_PLL>;
1655 assigned-clock-rates = <100000000>;
1659 eth_phy: mdio-multiplexer@4c000 {
1660 compatible = "amlogic,g12a-mdio-mux";
1661 reg = <0x0 0x4c000 0x0 0xa4>;
1662 clocks = <&clkc CLKID_ETH_PHY>,
1664 <&clkc CLKID_MPLL_50M>;
1665 clock-names = "pclk", "clkin0", "clkin1";
1666 mdio-parent-bus = <&mdio0>;
1667 #address-cells = <1>;
1672 #address-cells = <1>;
1678 #address-cells = <1>;
1681 internal_ephy: ethernet_phy@8 {
1682 compatible = "ethernet-phy-id0180.3301",
1683 "ethernet-phy-ieee802.3-c22";
1684 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
1692 aobus: bus@ff800000 {
1693 compatible = "simple-bus";
1694 reg = <0x0 0xff800000 0x0 0x100000>;
1695 #address-cells = <2>;
1697 ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
1700 compatible = "amlogic,meson-gx-ao-sysctrl",
1701 "simple-mfd", "syscon";
1702 reg = <0x0 0x0 0x0 0x100>;
1703 #address-cells = <2>;
1705 ranges = <0x0 0x0 0x0 0x0 0x0 0x100>;
1707 clkc_AO: clock-controller {
1708 compatible = "amlogic,meson-g12a-aoclkc";
1711 clocks = <&xtal>, <&clkc CLKID_CLK81>;
1712 clock-names = "xtal", "mpeg-clk";
1715 ao_pinctrl: pinctrl@14 {
1716 compatible = "amlogic,meson-g12a-aobus-pinctrl";
1717 #address-cells = <2>;
1722 reg = <0x0 0x14 0x0 0x8>,
1724 <0x0 0x24 0x0 0x14>;
1730 gpio-ranges = <&ao_pinctrl 0 0 15>;
1733 i2c_ao_sck_pins: i2c_ao_sck_pins {
1735 groups = "i2c_ao_sck";
1736 function = "i2c_ao";
1738 drive-strength-microamp = <3000>;
1742 i2c_ao_sda_pins: i2c_ao_sda {
1744 groups = "i2c_ao_sda";
1745 function = "i2c_ao";
1747 drive-strength-microamp = <3000>;
1751 i2c_ao_sck_e_pins: i2c_ao_sck_e {
1753 groups = "i2c_ao_sck_e";
1754 function = "i2c_ao";
1756 drive-strength-microamp = <3000>;
1760 i2c_ao_sda_e_pins: i2c_ao_sda_e {
1762 groups = "i2c_ao_sda_e";
1763 function = "i2c_ao";
1765 drive-strength-microamp = <3000>;
1769 mclk0_ao_pins: mclk0-ao {
1771 groups = "mclk0_ao";
1772 function = "mclk0_ao";
1774 drive-strength-microamp = <3000>;
1778 tdm_ao_b_din0_pins: tdm-ao-b-din0 {
1780 groups = "tdm_ao_b_din0";
1781 function = "tdm_ao_b";
1786 spdif_ao_out_pins: spdif-ao-out {
1788 groups = "spdif_ao_out";
1789 function = "spdif_ao_out";
1790 drive-strength-microamp = <500>;
1795 tdm_ao_b_din1_pins: tdm-ao-b-din1 {
1797 groups = "tdm_ao_b_din1";
1798 function = "tdm_ao_b";
1803 tdm_ao_b_din2_pins: tdm-ao-b-din2 {
1805 groups = "tdm_ao_b_din2";
1806 function = "tdm_ao_b";
1811 tdm_ao_b_dout0_pins: tdm-ao-b-dout0 {
1813 groups = "tdm_ao_b_dout0";
1814 function = "tdm_ao_b";
1816 drive-strength-microamp = <3000>;
1820 tdm_ao_b_dout1_pins: tdm-ao-b-dout1 {
1822 groups = "tdm_ao_b_dout1";
1823 function = "tdm_ao_b";
1825 drive-strength-microamp = <3000>;
1829 tdm_ao_b_dout2_pins: tdm-ao-b-dout2 {
1831 groups = "tdm_ao_b_dout2";
1832 function = "tdm_ao_b";
1834 drive-strength-microamp = <3000>;
1838 tdm_ao_b_fs_pins: tdm-ao-b-fs {
1840 groups = "tdm_ao_b_fs";
1841 function = "tdm_ao_b";
1843 drive-strength-microamp = <3000>;
1847 tdm_ao_b_sclk_pins: tdm-ao-b-sclk {
1849 groups = "tdm_ao_b_sclk";
1850 function = "tdm_ao_b";
1852 drive-strength-microamp = <3000>;
1856 tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs {
1858 groups = "tdm_ao_b_slv_fs";
1859 function = "tdm_ao_b";
1864 tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk {
1866 groups = "tdm_ao_b_slv_sclk";
1867 function = "tdm_ao_b";
1872 uart_ao_a_pins: uart-a-ao {
1874 groups = "uart_ao_a_tx",
1876 function = "uart_ao_a";
1881 uart_ao_a_cts_rts_pins: uart-ao-a-cts-rts {
1883 groups = "uart_ao_a_cts",
1885 function = "uart_ao_a";
1890 pwm_a_e_pins: pwm-a-e {
1893 function = "pwm_a_e";
1898 pwm_ao_a_pins: pwm-ao-a {
1900 groups = "pwm_ao_a";
1901 function = "pwm_ao_a";
1906 pwm_ao_b_pins: pwm-ao-b {
1908 groups = "pwm_ao_b";
1909 function = "pwm_ao_b";
1914 pwm_ao_c_4_pins: pwm-ao-c-4 {
1916 groups = "pwm_ao_c_4";
1917 function = "pwm_ao_c";
1922 pwm_ao_c_6_pins: pwm-ao-c-6 {
1924 groups = "pwm_ao_c_6";
1925 function = "pwm_ao_c";
1930 pwm_ao_d_5_pins: pwm-ao-d-5 {
1932 groups = "pwm_ao_d_5";
1933 function = "pwm_ao_d";
1938 pwm_ao_d_10_pins: pwm-ao-d-10 {
1940 groups = "pwm_ao_d_10";
1941 function = "pwm_ao_d";
1946 pwm_ao_d_e_pins: pwm-ao-d-e {
1948 groups = "pwm_ao_d_e";
1949 function = "pwm_ao_d";
1953 remote_input_ao_pins: remote-input-ao {
1955 groups = "remote_ao_input";
1956 function = "remote_ao_input";
1964 compatible = "amlogic,meson-vrtc";
1965 reg = <0x0 0x000a8 0x0 0x4>;
1969 compatible = "amlogic,meson-gx-ao-cec";
1970 reg = <0x0 0x00100 0x0 0x14>;
1971 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
1972 clocks = <&clkc_AO CLKID_AO_CEC>;
1973 clock-names = "core";
1974 status = "disabled";
1977 sec_AO: ao-secure@140 {
1978 compatible = "amlogic,meson-gx-ao-secure", "syscon";
1979 reg = <0x0 0x140 0x0 0x140>;
1980 amlogic,has-chip-id;
1984 compatible = "amlogic,meson-g12a-ao-cec";
1985 reg = <0x0 0x00280 0x0 0x1c>;
1986 interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
1987 clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>;
1988 clock-names = "oscin";
1989 status = "disabled";
1992 pwm_AO_cd: pwm@2000 {
1993 compatible = "amlogic,meson-g12a-ao-pwm-cd";
1994 reg = <0x0 0x2000 0x0 0x20>;
1996 status = "disabled";
1999 uart_AO: serial@3000 {
2000 compatible = "amlogic,meson-gx-uart",
2001 "amlogic,meson-ao-uart";
2002 reg = <0x0 0x3000 0x0 0x18>;
2003 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
2004 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>;
2005 clock-names = "xtal", "pclk", "baud";
2006 status = "disabled";
2009 uart_AO_B: serial@4000 {
2010 compatible = "amlogic,meson-gx-uart",
2011 "amlogic,meson-ao-uart";
2012 reg = <0x0 0x4000 0x0 0x18>;
2013 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
2014 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
2015 clock-names = "xtal", "pclk", "baud";
2016 status = "disabled";
2020 compatible = "amlogic,meson-axg-i2c";
2021 status = "disabled";
2022 reg = <0x0 0x05000 0x0 0x20>;
2023 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
2024 #address-cells = <1>;
2026 clocks = <&clkc CLKID_I2C>;
2029 pwm_AO_ab: pwm@7000 {
2030 compatible = "amlogic,meson-g12a-ao-pwm-ab";
2031 reg = <0x0 0x7000 0x0 0x20>;
2033 status = "disabled";
2037 compatible = "amlogic,meson-gxbb-ir";
2038 reg = <0x0 0x8000 0x0 0x20>;
2039 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
2040 status = "disabled";
2044 compatible = "amlogic,meson-g12a-saradc",
2045 "amlogic,meson-saradc";
2046 reg = <0x0 0x9000 0x0 0x48>;
2047 #io-channel-cells = <1>;
2048 interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
2050 <&clkc_AO CLKID_AO_SAR_ADC>,
2051 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
2052 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
2053 clock-names = "clkin", "core", "adc_clk", "adc_sel";
2054 status = "disabled";
2058 vdec: video-decoder@ff620000 {
2059 compatible = "amlogic,g12a-vdec";
2060 reg = <0x0 0xff620000 0x0 0x10000>,
2061 <0x0 0xffd0e180 0x0 0xe4>;
2062 reg-names = "dos", "esparser";
2063 interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
2064 <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
2065 interrupt-names = "vdec", "esparser";
2067 amlogic,ao-sysctrl = <&rti>;
2068 amlogic,canvas = <&canvas>;
2070 clocks = <&clkc CLKID_PARSER>,
2072 <&clkc CLKID_VDEC_1>,
2073 <&clkc CLKID_VDEC_HEVC>,
2074 <&clkc CLKID_VDEC_HEVCF>;
2075 clock-names = "dos_parser", "dos", "vdec_1",
2076 "vdec_hevc", "vdec_hevcf";
2077 resets = <&reset RESET_PARSER>;
2078 reset-names = "esparser";
2082 compatible = "amlogic,meson-g12a-vpu";
2083 reg = <0x0 0xff900000 0x0 0x100000>,
2084 <0x0 0xff63c000 0x0 0x1000>;
2085 reg-names = "vpu", "hhi";
2086 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
2087 #address-cells = <1>;
2089 amlogic,canvas = <&canvas>;
2091 /* CVBS VDAC output port */
2092 cvbs_vdac_port: port@0 {
2096 /* HDMI-TX output port */
2097 hdmi_tx_port: port@1 {
2100 hdmi_tx_out: endpoint {
2101 remote-endpoint = <&hdmi_tx_in>;
2106 gic: interrupt-controller@ffc01000 {
2107 compatible = "arm,gic-400";
2108 reg = <0x0 0xffc01000 0 0x1000>,
2109 <0x0 0xffc02000 0 0x2000>,
2110 <0x0 0xffc04000 0 0x2000>,
2111 <0x0 0xffc06000 0 0x2000>;
2112 interrupt-controller;
2113 interrupts = <GIC_PPI 9
2114 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2115 #interrupt-cells = <3>;
2116 #address-cells = <0>;
2119 cbus: bus@ffd00000 {
2120 compatible = "simple-bus";
2121 reg = <0x0 0xffd00000 0x0 0x100000>;
2122 #address-cells = <2>;
2124 ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
2126 reset: reset-controller@1004 {
2127 compatible = "amlogic,meson-axg-reset";
2128 reg = <0x0 0x1004 0x0 0x9c>;
2132 gpio_intc: interrupt-controller@f080 {
2133 compatible = "amlogic,meson-g12a-gpio-intc",
2134 "amlogic,meson-gpio-intc";
2135 reg = <0x0 0xf080 0x0 0x10>;
2136 interrupt-controller;
2137 #interrupt-cells = <2>;
2138 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
2141 watchdog: watchdog@f0d0 {
2142 compatible = "amlogic,meson-gxbb-wdt";
2143 reg = <0x0 0xf0d0 0x0 0x10>;
2148 compatible = "amlogic,meson-g12a-spicc";
2149 reg = <0x0 0x13000 0x0 0x44>;
2150 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
2151 clocks = <&clkc CLKID_SPICC0>,
2152 <&clkc CLKID_SPICC0_SCLK>;
2153 clock-names = "core", "pclk";
2154 #address-cells = <1>;
2156 status = "disabled";
2160 compatible = "amlogic,meson-g12a-spicc";
2161 reg = <0x0 0x15000 0x0 0x44>;
2162 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
2163 clocks = <&clkc CLKID_SPICC1>,
2164 <&clkc CLKID_SPICC1_SCLK>;
2165 clock-names = "core", "pclk";
2166 #address-cells = <1>;
2168 status = "disabled";
2172 compatible = "amlogic,meson-gxbb-spifc";
2173 status = "disabled";
2174 reg = <0x0 0x14000 0x0 0x80>;
2175 #address-cells = <1>;
2177 clocks = <&clkc CLKID_CLK81>;
2181 compatible = "amlogic,meson-g12a-ee-pwm";
2182 reg = <0x0 0x19000 0x0 0x20>;
2184 status = "disabled";
2188 compatible = "amlogic,meson-g12a-ee-pwm";
2189 reg = <0x0 0x1a000 0x0 0x20>;
2191 status = "disabled";
2195 compatible = "amlogic,meson-g12a-ee-pwm";
2196 reg = <0x0 0x1b000 0x0 0x20>;
2198 status = "disabled";
2202 compatible = "amlogic,meson-axg-i2c";
2203 status = "disabled";
2204 reg = <0x0 0x1c000 0x0 0x20>;
2205 interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
2206 #address-cells = <1>;
2208 clocks = <&clkc CLKID_I2C>;
2212 compatible = "amlogic,meson-axg-i2c";
2213 status = "disabled";
2214 reg = <0x0 0x1d000 0x0 0x20>;
2215 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
2216 #address-cells = <1>;
2218 clocks = <&clkc CLKID_I2C>;
2222 compatible = "amlogic,meson-axg-i2c";
2223 status = "disabled";
2224 reg = <0x0 0x1e000 0x0 0x20>;
2225 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
2226 #address-cells = <1>;
2228 clocks = <&clkc CLKID_I2C>;
2232 compatible = "amlogic,meson-axg-i2c";
2233 status = "disabled";
2234 reg = <0x0 0x1f000 0x0 0x20>;
2235 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
2236 #address-cells = <1>;
2238 clocks = <&clkc CLKID_I2C>;
2241 clk_msr: clock-measure@18000 {
2242 compatible = "amlogic,meson-g12a-clk-measure";
2243 reg = <0x0 0x18000 0x0 0x10>;
2246 uart_C: serial@22000 {
2247 compatible = "amlogic,meson-gx-uart";
2248 reg = <0x0 0x22000 0x0 0x18>;
2249 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
2250 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
2251 clock-names = "xtal", "pclk", "baud";
2252 status = "disabled";
2255 uart_B: serial@23000 {
2256 compatible = "amlogic,meson-gx-uart";
2257 reg = <0x0 0x23000 0x0 0x18>;
2258 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
2259 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
2260 clock-names = "xtal", "pclk", "baud";
2261 status = "disabled";
2264 uart_A: serial@24000 {
2265 compatible = "amlogic,meson-gx-uart";
2266 reg = <0x0 0x24000 0x0 0x18>;
2267 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
2268 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
2269 clock-names = "xtal", "pclk", "baud";
2270 status = "disabled";
2275 sd_emmc_a: sd@ffe03000 {
2276 compatible = "amlogic,meson-axg-mmc";
2277 reg = <0x0 0xffe03000 0x0 0x800>;
2278 interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
2279 status = "disabled";
2280 clocks = <&clkc CLKID_SD_EMMC_A>,
2281 <&clkc CLKID_SD_EMMC_A_CLK0>,
2282 <&clkc CLKID_FCLK_DIV2>;
2283 clock-names = "core", "clkin0", "clkin1";
2284 resets = <&reset RESET_SD_EMMC_A>;
2287 sd_emmc_b: sd@ffe05000 {
2288 compatible = "amlogic,meson-axg-mmc";
2289 reg = <0x0 0xffe05000 0x0 0x800>;
2290 interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
2291 status = "disabled";
2292 clocks = <&clkc CLKID_SD_EMMC_B>,
2293 <&clkc CLKID_SD_EMMC_B_CLK0>,
2294 <&clkc CLKID_FCLK_DIV2>;
2295 clock-names = "core", "clkin0", "clkin1";
2296 resets = <&reset RESET_SD_EMMC_B>;
2299 sd_emmc_c: mmc@ffe07000 {
2300 compatible = "amlogic,meson-axg-mmc";
2301 reg = <0x0 0xffe07000 0x0 0x800>;
2302 interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;
2303 status = "disabled";
2304 clocks = <&clkc CLKID_SD_EMMC_C>,
2305 <&clkc CLKID_SD_EMMC_C_CLK0>,
2306 <&clkc CLKID_FCLK_DIV2>;
2307 clock-names = "core", "clkin0", "clkin1";
2308 resets = <&reset RESET_SD_EMMC_C>;
2312 status = "disabled";
2313 compatible = "amlogic,meson-g12a-usb-ctrl";
2314 reg = <0x0 0xffe09000 0x0 0xa0>;
2315 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2316 #address-cells = <2>;
2320 clocks = <&clkc CLKID_USB>;
2321 resets = <&reset RESET_USB>;
2325 phys = <&usb2_phy0>, <&usb2_phy1>,
2326 <&usb3_pcie_phy PHY_TYPE_USB3>;
2327 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
2329 dwc2: usb@ff400000 {
2330 compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
2331 reg = <0x0 0xff400000 0x0 0x40000>;
2332 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
2333 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
2334 clock-names = "otg";
2335 phys = <&usb2_phy1>;
2336 phy-names = "usb2-phy";
2337 dr_mode = "peripheral";
2338 g-rx-fifo-size = <192>;
2339 g-np-tx-fifo-size = <128>;
2340 g-tx-fifo-size = <128 128 16 16 16>;
2343 dwc3: usb@ff500000 {
2344 compatible = "snps,dwc3";
2345 reg = <0x0 0xff500000 0x0 0x100000>;
2346 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
2348 snps,dis_u2_susphy_quirk;
2349 snps,quirk-frame-length-adjustment = <0x20>;
2350 snps,parkmode-disable-ss-quirk;
2354 mali: gpu@ffe40000 {
2355 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
2356 reg = <0x0 0xffe40000 0x0 0x40000>;
2357 interrupt-parent = <&gic>;
2358 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
2359 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
2360 <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
2361 interrupt-names = "job", "mmu", "gpu";
2362 clocks = <&clkc CLKID_MALI>;
2363 resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
2364 operating-points-v2 = <&gpu_opp_table>;
2365 #cooling-cells = <2>;
2370 cpu_thermal: cpu-thermal {
2371 polling-delay = <1000>;
2372 polling-delay-passive = <100>;
2373 thermal-sensors = <&cpu_temp>;
2376 cpu_passive: cpu-passive {
2377 temperature = <85000>; /* millicelsius */
2378 hysteresis = <2000>; /* millicelsius */
2383 temperature = <95000>; /* millicelsius */
2384 hysteresis = <2000>; /* millicelsius */
2388 cpu_critical: cpu-critical {
2389 temperature = <110000>; /* millicelsius */
2390 hysteresis = <2000>; /* millicelsius */
2396 ddr_thermal: ddr-thermal {
2397 polling-delay = <1000>;
2398 polling-delay-passive = <100>;
2399 thermal-sensors = <&ddr_temp>;
2402 ddr_passive: ddr-passive {
2403 temperature = <85000>; /* millicelsius */
2404 hysteresis = <2000>; /* millicelsius */
2408 ddr_critical: ddr-critical {
2409 temperature = <110000>; /* millicelsius */
2410 hysteresis = <2000>; /* millicelsius */
2417 trip = <&ddr_passive>;
2418 cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
2425 compatible = "arm,armv8-timer";
2426 interrupts = <GIC_PPI 13
2427 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2429 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2431 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2433 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
2434 arm,no-tick-in-suspend;
2438 compatible = "fixed-clock";
2439 clock-frequency = <24000000>;
2440 clock-output-names = "xtal";