arch/arm/boot/dts/tegra20-ventana.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/thermal/thermal.h>
   6 #include "tegra20.dtsi"
   7 #include "tegra20-cpu-opp.dtsi"
   8 #include "tegra20-cpu-opp-microvolt.dtsi"
   9
  10 / {
  11         model = "NVIDIA Tegra20 Ventana evaluation board";
  12         compatible = "nvidia,ventana", "nvidia,tegra20";
  13
  14         aliases {
  15                 rtc0 = "/i2c@7000d000/tps6586x@34";
  16                 rtc1 = "/rtc@7000e000";
  17                 serial0 = &uartd;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22         };
  23
  24         memory@0 {
  25                 reg = <0x00000000 0x40000000>;
  26         };
  27
  28         host1x@50000000 {
  29                 dc@54200000 {
  30                         rgb {
  31                                 status = "okay";
  32
  33                                 nvidia,panel = <&panel>;
  34                         };
  35                 };
  36
  37                 hdmi@54280000 {
  38                         status = "okay";
  39
  40                         vdd-supply = <&hdmi_vdd_reg>;
  41                         pll-supply = <&hdmi_pll_reg>;
  42
  43                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  44                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  45                                 GPIO_ACTIVE_HIGH>;
  46                 };
  47         };
  48
  49         pinmux@70000014 {
  50                 pinctrl-names = "default";
  51                 pinctrl-0 = <&state_default>;
  52
  53                 state_default: pinmux {
  54                         ata {
  55                                 nvidia,pins = "ata";
  56                                 nvidia,function = "ide";
  57                         };
  58                         atb {
  59                                 nvidia,pins = "atb", "gma", "gme";
  60                                 nvidia,function = "sdio4";
  61                         };
  62                         atc {
  63                                 nvidia,pins = "atc";
  64                                 nvidia,function = "nand";
  65                         };
  66                         atd {
  67                                 nvidia,pins = "atd", "ate", "gmb", "spia",
  68                                         "spib", "spic";
  69                                 nvidia,function = "gmi";
  70                         };
  71                         cdev1 {
  72                                 nvidia,pins = "cdev1";
  73                                 nvidia,function = "plla_out";
  74                         };
  75                         cdev2 {
  76                                 nvidia,pins = "cdev2";
  77                                 nvidia,function = "pllp_out4";
  78                         };
  79                         crtp {
  80                                 nvidia,pins = "crtp", "lm1";
  81                                 nvidia,function = "crt";
  82                         };
  83                         csus {
  84                                 nvidia,pins = "csus";
  85                                 nvidia,function = "vi_sensor_clk";
  86                         };
  87                         dap1 {
  88                                 nvidia,pins = "dap1";
  89                                 nvidia,function = "dap1";
  90                         };
  91                         dap2 {
  92                                 nvidia,pins = "dap2";
  93                                 nvidia,function = "dap2";
  94                         };
  95                         dap3 {
  96                                 nvidia,pins = "dap3";
  97                                 nvidia,function = "dap3";
  98                         };
  99                         dap4 {
 100                                 nvidia,pins = "dap4";
 101                                 nvidia,function = "dap4";
 102                         };
 103                         dta {
 104                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
 105                                 nvidia,function = "vi";
 106                         };
 107                         dtf {
 108                                 nvidia,pins = "dtf";
 109                                 nvidia,function = "i2c3";
 110                         };
 111                         gmc {
 112                                 nvidia,pins = "gmc";
 113                                 nvidia,function = "uartd";
 114                         };
 115                         gmd {
 116                                 nvidia,pins = "gmd";
 117                                 nvidia,function = "sflash";
 118                         };
 119                         gpu {
 120                                 nvidia,pins = "gpu";
 121                                 nvidia,function = "pwm";
 122                         };
 123                         gpu7 {
 124                                 nvidia,pins = "gpu7";
 125                                 nvidia,function = "rtck";
 126                         };
 127                         gpv {
 128                                 nvidia,pins = "gpv", "slxa", "slxk";
 129                                 nvidia,function = "pcie";
 130                         };
 131                         hdint {
 132                                 nvidia,pins = "hdint";
 133                                 nvidia,function = "hdmi";
 134                         };
 135                         i2cp {
 136                                 nvidia,pins = "i2cp";
 137                                 nvidia,function = "i2cp";
 138                         };
 139                         irrx {
 140                                 nvidia,pins = "irrx", "irtx";
 141                                 nvidia,function = "uartb";
 142                         };
 143                         kbca {
 144                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 145                                         "kbce", "kbcf";
 146                                 nvidia,function = "kbc";
 147                         };
 148                         lcsn {
 149                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
 150                                         "lsdi", "lvp0";
 151                                 nvidia,function = "rsvd4";
 152                         };
 153                         ld0 {
 154                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 155                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 156                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 157                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 158                                         "lhp1", "lhp2", "lhs", "lpp", "lpw0",
 159                                         "lpw2", "lsc0", "lsc1", "lsck", "lsda",
 160                                         "lspi", "lvp1", "lvs";
 161                                 nvidia,function = "displaya";
 162                         };
 163                         owc {
 164                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
 165                                 nvidia,function = "rsvd2";
 166                         };
 167                         pmc {
 168                                 nvidia,pins = "pmc";
 169                                 nvidia,function = "pwr_on";
 170                         };
 171                         rm {
 172                                 nvidia,pins = "rm";
 173                                 nvidia,function = "i2c1";
 174                         };
 175                         sdb {
 176                                 nvidia,pins = "sdb", "sdc", "sdd", "slxc";
 177                                 nvidia,function = "sdio3";
 178                         };
 179                         sdio1 {
 180                                 nvidia,pins = "sdio1";
 181                                 nvidia,function = "sdio1";
 182                         };
 183                         slxd {
 184                                 nvidia,pins = "slxd";
 185                                 nvidia,function = "spdif";
 186                         };
 187                         spid {
 188                                 nvidia,pins = "spid", "spie", "spif";
 189                                 nvidia,function = "spi1";
 190                         };
 191                         spig {
 192                                 nvidia,pins = "spig", "spih";
 193                                 nvidia,function = "spi2_alt";
 194                         };
 195                         uaa {
 196                                 nvidia,pins = "uaa", "uab", "uda";
 197                                 nvidia,function = "ulpi";
 198                         };
 199                         uad {
 200                                 nvidia,pins = "uad";
 201                                 nvidia,function = "irda";
 202                         };
 203                         uca {
 204                                 nvidia,pins = "uca", "ucb";
 205                                 nvidia,function = "uartc";
 206                         };
 207                         conf_ata {
 208                                 nvidia,pins = "ata", "atb", "atc", "atd",
 209                                         "cdev1", "cdev2", "dap1", "dap2",
 210                                         "dap4", "ddc", "dtf", "gma", "gmc",
 211                                         "gme", "gpu", "gpu7", "i2cp", "irrx",
 212                                         "irtx", "pta", "rm", "sdc", "sdd",
 213                                         "slxc", "slxd", "slxk", "spdi", "spdo",
 214                                         "uac", "uad", "uca", "ucb", "uda";
 215                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 216                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 217                         };
 218                         conf_ate {
 219                                 nvidia,pins = "ate", "csus", "dap3", "gmd",
 220                                         "gpv", "owc", "spia", "spib", "spic",
 221                                         "spid", "spie", "spig";
 222                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 223                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 224                         };
 225                         conf_ck32 {
 226                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 227                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 228                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 229                         };
 230                         conf_crtp {
 231                                 nvidia,pins = "crtp", "gmb", "slxa", "spih";
 232                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 233                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 234                         };
 235                         conf_dta {
 236                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
 237                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 238                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 239                         };
 240                         conf_dte {
 241                                 nvidia,pins = "dte", "spif";
 242                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 243                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 244                         };
 245                         conf_hdint {
 246                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 247                                         "lpw1", "lsck", "lsda", "lsdi", "lvp0";
 248                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 249                         };
 250                         conf_kbca {
 251                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 252                                         "kbce", "kbcf", "sdio1", "uaa", "uab";
 253                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 254                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 255                         };
 256                         conf_lc {
 257                                 nvidia,pins = "lc", "ls";
 258                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 259                         };
 260                         conf_ld0 {
 261                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 262                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 263                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 264                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 265                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
 266                                         "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
 267                                         "lvp1", "lvs", "pmc", "sdb";
 268                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 269                         };
 270                         conf_ld17_0 {
 271                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 272                                         "ld23_22";
 273                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 274                         };
 275                         drive_sdio1 {
 276                                 nvidia,pins = "drive_sdio1";
 277                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 278                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
 279                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 280                                 nvidia,pull-down-strength = <31>;
 281                                 nvidia,pull-up-strength = <31>;
 282                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 283                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 284                         };
 285                 };
 286
 287                 state_i2cmux_ddc: pinmux_i2cmux_ddc {
 288                         ddc {
 289                                 nvidia,pins = "ddc";
 290                                 nvidia,function = "i2c2";
 291                         };
 292                         pta {
 293                                 nvidia,pins = "pta";
 294                                 nvidia,function = "rsvd4";
 295                         };
 296                 };
 297
 298                 state_i2cmux_pta: pinmux_i2cmux_pta {
 299                         ddc {
 300                                 nvidia,pins = "ddc";
 301                                 nvidia,function = "rsvd4";
 302                         };
 303                         pta {
 304                                 nvidia,pins = "pta";
 305                                 nvidia,function = "i2c2";
 306                         };
 307                 };
 308
 309                 state_i2cmux_idle: pinmux_i2cmux_idle {
 310                         ddc {
 311                                 nvidia,pins = "ddc";
 312                                 nvidia,function = "rsvd4";
 313                         };
 314                         pta {
 315                                 nvidia,pins = "pta";
 316                                 nvidia,function = "rsvd4";
 317                         };
 318                 };
 319         };
 320
 321         i2s@70002800 {
 322                 status = "okay";
 323         };
 324
 325         serial@70006300 {
 326                 status = "okay";
 327         };
 328
 329         pwm: pwm@7000a000 {
 330                 status = "okay";
 331         };
 332
 333         i2c@7000c000 {
 334                 status = "okay";
 335                 clock-frequency = <400000>;
 336
 337                 wm8903: wm8903@1a {
 338                         compatible = "wlf,wm8903";
 339                         reg = <0x1a>;
 340                         interrupt-parent = <&gpio>;
 341                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
 342
 343                         gpio-controller;
 344                         #gpio-cells = <2>;
 345
 346                         micdet-cfg = <0>;
 347                         micdet-delay = <100>;
 348                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 349                 };
 350
 351                 /* ALS and proximity sensor */
 352                 isl29018@44 {
 353                         compatible = "isil,isl29018";
 354                         reg = <0x44>;
 355                         interrupt-parent = <&gpio>;
 356                         interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
 357                 };
 358         };
 359
 360         i2c@7000c400 {
 361                 status = "okay";
 362                 clock-frequency = <100000>;
 363         };
 364
 365         i2cmux {
 366                 compatible = "i2c-mux-pinctrl";
 367                 #address-cells = <1>;
 368                 #size-cells = <0>;
 369
 370                 i2c-parent = <&{/i2c@7000c400}>;
 371
 372                 pinctrl-names = "ddc", "pta", "idle";
 373                 pinctrl-0 = <&state_i2cmux_ddc>;
 374                 pinctrl-1 = <&state_i2cmux_pta>;
 375                 pinctrl-2 = <&state_i2cmux_idle>;
 376
 377                 hdmi_ddc: i2c@0 {
 378                         reg = <0>;
 379                         #address-cells = <1>;
 380                         #size-cells = <0>;
 381                 };
 382
 383                 lvds_ddc: i2c@1 {
 384                         reg = <1>;
 385                         #address-cells = <1>;
 386                         #size-cells = <0>;
 387                 };
 388         };
 389
 390         i2c@7000c500 {
 391                 status = "okay";
 392                 clock-frequency = <400000>;
 393         };
 394
 395         i2c@7000d000 {
 396                 status = "okay";
 397                 clock-frequency = <400000>;
 398
 399                 pmic: tps6586x@34 {
 400                         compatible = "ti,tps6586x";
 401                         reg = <0x34>;
 402                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 403
 404                         ti,system-power-controller;
 405
 406                         #gpio-cells = <2>;
 407                         gpio-controller;
 408
 409                         sys-supply = <&vdd_5v0_reg>;
 410                         vin-sm0-supply = <&sys_reg>;
 411                         vin-sm1-supply = <&sys_reg>;
 412                         vin-sm2-supply = <&sys_reg>;
 413                         vinldo01-supply = <&sm2_reg>;
 414                         vinldo23-supply = <&sm2_reg>;
 415                         vinldo4-supply = <&sm2_reg>;
 416                         vinldo678-supply = <&sm2_reg>;
 417                         vinldo9-supply = <&sm2_reg>;
 418
 419                         regulators {
 420                                 sys_reg: sys {
 421                                         regulator-name = "vdd_sys";
 422                                         regulator-always-on;
 423                                 };
 424
 425                                 vdd_core: sm0 {
 426                                         regulator-name = "vdd_sm0,vdd_core";
 427                                         regulator-min-microvolt = <950000>;
 428                                         regulator-max-microvolt = <1300000>;
 429                                         regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
 430                                         regulator-coupled-max-spread = <170000 550000>;
 431                                         regulator-always-on;
 432                                         regulator-boot-on;
 433
 434                                         nvidia,tegra-core-regulator;
 435                                 };
 436
 437                                 vdd_cpu: sm1 {
 438                                         regulator-name = "vdd_sm1,vdd_cpu";
 439                                         regulator-min-microvolt = <750000>;
 440                                         regulator-max-microvolt = <1125000>;
 441                                         regulator-coupled-with = <&vdd_core &rtc_vdd>;
 442                                         regulator-coupled-max-spread = <550000 550000>;
 443                                         regulator-always-on;
 444                                         regulator-boot-on;
 445
 446                                         nvidia,tegra-cpu-regulator;
 447                                 };
 448
 449                                 sm2_reg: sm2 {
 450                                         regulator-name = "vdd_sm2,vin_ldo*";
 451                                         regulator-min-microvolt = <3700000>;
 452                                         regulator-max-microvolt = <3700000>;
 453                                         regulator-always-on;
 454                                 };
 455
 456                                 /* LDO0 is not connected to anything */
 457
 458                                 ldo1 {
 459                                         regulator-name = "vdd_ldo1,avdd_pll*";
 460                                         regulator-min-microvolt = <1100000>;
 461                                         regulator-max-microvolt = <1100000>;
 462                                         regulator-always-on;
 463                                 };
 464
 465                                 rtc_vdd: ldo2 {
 466                                         regulator-name = "vdd_ldo2,vdd_rtc";
 467                                         regulator-min-microvolt = <950000>;
 468                                         regulator-max-microvolt = <1300000>;
 469                                         regulator-coupled-with = <&vdd_core &vdd_cpu>;
 470                                         regulator-coupled-max-spread = <170000 550000>;
 471                                         regulator-always-on;
 472                                         regulator-boot-on;
 473
 474                                         nvidia,tegra-rtc-regulator;
 475                                 };
 476
 477                                 ldo3 {
 478                                         regulator-name = "vdd_ldo3,avdd_usb*";
 479                                         regulator-min-microvolt = <3300000>;
 480                                         regulator-max-microvolt = <3300000>;
 481                                         regulator-always-on;
 482                                 };
 483
 484                                 ldo4 {
 485                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 486                                         regulator-min-microvolt = <1800000>;
 487                                         regulator-max-microvolt = <1800000>;
 488                                         regulator-always-on;
 489                                 };
 490
 491                                 ldo5 {
 492                                         regulator-name = "vdd_ldo5,vcore_mmc";
 493                                         regulator-min-microvolt = <2850000>;
 494                                         regulator-max-microvolt = <2850000>;
 495                                         regulator-always-on;
 496                                 };
 497
 498                                 ldo6 {
 499                                         regulator-name = "vdd_ldo6,avdd_vdac";
 500                                         regulator-min-microvolt = <1800000>;
 501                                         regulator-max-microvolt = <1800000>;
 502                                 };
 503
 504                                 hdmi_vdd_reg: ldo7 {
 505                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
 506                                         regulator-min-microvolt = <3300000>;
 507                                         regulator-max-microvolt = <3300000>;
 508                                 };
 509
 510                                 hdmi_pll_reg: ldo8 {
 511                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 512                                         regulator-min-microvolt = <1800000>;
 513                                         regulator-max-microvolt = <1800000>;
 514                                 };
 515
 516                                 ldo9 {
 517                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 518                                         regulator-min-microvolt = <2850000>;
 519                                         regulator-max-microvolt = <2850000>;
 520                                         regulator-always-on;
 521                                 };
 522
 523                                 ldo_rtc {
 524                                         regulator-name = "vdd_rtc_out,vdd_cell";
 525                                         regulator-min-microvolt = <3300000>;
 526                                         regulator-max-microvolt = <3300000>;
 527                                         regulator-always-on;
 528                                 };
 529                         };
 530                 };
 531
 532                 nct1008: temperature-sensor@4c {
 533                         compatible = "onnn,nct1008";
 534                         reg = <0x4c>;
 535                         #thermal-sensor-cells = <1>;
 536                 };
 537         };
 538
 539         pmc@7000e400 {
 540                 nvidia,invert-interrupt;
 541                 nvidia,suspend-mode = <1>;
 542                 nvidia,cpu-pwr-good-time = <2000>;
 543                 nvidia,cpu-pwr-off-time = <100>;
 544                 nvidia,core-pwr-good-time = <3845 3845>;
 545                 nvidia,core-pwr-off-time = <458>;
 546                 nvidia,sys-clock-req-active-high;
 547         };
 548
 549         usb@c5000000 {
 550                 status = "okay";
 551         };
 552
 553         usb-phy@c5000000 {
 554                 status = "okay";
 555         };
 556
 557         usb@c5004000 {
 558                 status = "okay";
 559                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 560                         GPIO_ACTIVE_LOW>;
 561         };
 562
 563         usb-phy@c5004000 {
 564                 status = "okay";
 565                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 566                         GPIO_ACTIVE_LOW>;
 567         };
 568
 569         usb@c5008000 {
 570                 status = "okay";
 571         };
 572
 573         usb-phy@c5008000 {
 574                 status = "okay";
 575         };
 576
 577         mmc@c8000000 {
 578                 status = "okay";
 579                 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
 580                 bus-width = <4>;
 581                 keep-power-in-suspend;
 582         };
 583
 584         mmc@c8000400 {
 585                 status = "okay";
 586                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 587                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
 588                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
 589                 bus-width = <4>;
 590         };
 591
 592         mmc@c8000600 {
 593                 status = "okay";
 594                 bus-width = <8>;
 595                 non-removable;
 596         };
 597
 598         backlight: backlight {
 599                 compatible = "pwm-backlight";
 600
 601                 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
 602                 power-supply = <&vdd_bl_reg>;
 603                 pwms = <&pwm 2 5000000>;
 604
 605                 brightness-levels = <0 4 8 16 32 64 128 255>;
 606                 default-brightness-level = <6>;
 607         };
 608
 609         clk32k_in: clock@0 {
 610                 compatible = "fixed-clock";
 611                 clock-frequency = <32768>;
 612                 #clock-cells = <0>;
 613         };
 614
 615         cpus {
 616                 cpu0: cpu@0 {
 617                         cpu-supply = <&vdd_cpu>;
 618                         operating-points-v2 = <&cpu0_opp_table>;
 619                         #cooling-cells = <2>;
 620                 };
 621
 622                 cpu1: cpu@1 {
 623                         cpu-supply = <&vdd_cpu>;
 624                         operating-points-v2 = <&cpu0_opp_table>;
 625                         #cooling-cells = <2>;
 626                 };
 627         };
 628
 629         gpio-keys {
 630                 compatible = "gpio-keys";
 631
 632                 power {
 633                         label = "Power";
 634                         gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
 635                         linux,code = <KEY_POWER>;
 636                         wakeup-source;
 637                 };
 638         };
 639
 640         panel: panel {
 641                 compatible = "chunghwa,claa101wa01a";
 642
 643                 power-supply = <&vdd_pnl_reg>;
 644                 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
 645
 646                 backlight = <&backlight>;
 647                 ddc-i2c-bus = <&lvds_ddc>;
 648         };
 649
 650         vdd_5v0_reg: regulator@0 {
 651                 compatible = "regulator-fixed";
 652                 regulator-name = "vdd_5v0";
 653                 regulator-min-microvolt = <5000000>;
 654                 regulator-max-microvolt = <5000000>;
 655                 regulator-always-on;
 656         };
 657
 658         regulator@1 {
 659                 compatible = "regulator-fixed";
 660                 regulator-name = "vdd_1v5";
 661                 regulator-min-microvolt = <1500000>;
 662                 regulator-max-microvolt = <1500000>;
 663                 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
 664         };
 665
 666         regulator@2 {
 667                 compatible = "regulator-fixed";
 668                 regulator-name = "vdd_1v2";
 669                 regulator-min-microvolt = <1200000>;
 670                 regulator-max-microvolt = <1200000>;
 671                 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
 672                 enable-active-high;
 673         };
 674
 675         vdd_pnl_reg: regulator@3 {
 676                 compatible = "regulator-fixed";
 677                 regulator-name = "vdd_pnl";
 678                 regulator-min-microvolt = <2800000>;
 679                 regulator-max-microvolt = <2800000>;
 680                 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
 681                 enable-active-high;
 682         };
 683
 684         vdd_bl_reg: regulator@4 {
 685                 compatible = "regulator-fixed";
 686                 regulator-name = "vdd_bl";
 687                 regulator-min-microvolt = <2800000>;
 688                 regulator-max-microvolt = <2800000>;
 689                 gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
 690                 enable-active-high;
 691         };
 692
 693         sound {
 694                 compatible = "nvidia,tegra-audio-wm8903-ventana",
 695                              "nvidia,tegra-audio-wm8903";
 696                 nvidia,model = "NVIDIA Tegra Ventana";
 697
 698                 nvidia,audio-routing =
 699                         "Headphone Jack", "HPOUTR",
 700                         "Headphone Jack", "HPOUTL",
 701                         "Int Spk", "ROP",
 702                         "Int Spk", "RON",
 703                         "Int Spk", "LOP",
 704                         "Int Spk", "LON",
 705                         "Mic Jack", "MICBIAS",
 706                         "IN1L", "Mic Jack";
 707
 708                 nvidia,i2s-controller = <&tegra_i2s1>;
 709                 nvidia,audio-codec = <&wm8903>;
 710
 711                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
 712                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
 713                 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
 714                         GPIO_ACTIVE_HIGH>;
 715                 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
 716                         GPIO_ACTIVE_HIGH>;
 717
 718                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
 719                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
 720                          <&tegra_car TEGRA20_CLK_CDEV1>;
 721                 clock-names = "pll_a", "pll_a_out0", "mclk";
 722         };
 723
 724         thermal-zones {
 725                 cpu-thermal {
 726                         polling-delay-passive = <1000>; /* milliseconds */
 727                         polling-delay = <5000>; /* milliseconds */
 728
 729                         thermal-sensors = <&nct1008 1>;
 730
 731                         trips {
 732                                 trip0: cpu-alert0 {
 733                                         /* start throttling at 50C */
 734                                         temperature = <50000>;
 735                                         hysteresis = <200>;
 736                                         type = "passive";
 737                                 };
 738
 739                                 trip1: cpu-crit {
 740                                         /* shut down at 60C */
 741                                         temperature = <60000>;
 742                                         hysteresis = <2000>;
 743                                         type = "critical";
 744                                 };
 745                         };
 746
 747                         cooling-maps {
 748                                 map0 {
 749                                         trip = <&trip0>;
 750                                         cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 751                                                          <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 752                                 };
 753                         };
 754                 };
 755         };
 756 };