arch/arm/boot/dts/tegra20-acer-a500-picasso.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include <dt-bindings/input/atmel-maxtouch.h>
   5 #include <dt-bindings/input/gpio-keys.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/thermal/thermal.h>
   8
   9 #include "tegra20.dtsi"
  10 #include "tegra20-cpu-opp.dtsi"
  11 #include "tegra20-cpu-opp-microvolt.dtsi"
  12
  13 / {
  14         model = "Acer Iconia Tab A500";
  15         compatible = "acer,picasso", "nvidia,tegra20";
  16
  17         aliases {
  18                 mmc0 = &sdmmc4; /* eMMC */
  19                 mmc1 = &sdmmc3; /* MicroSD */
  20                 mmc2 = &sdmmc1; /* WiFi */
  21
  22                 rtc0 = &pmic;
  23                 rtc1 = "/rtc@7000e000";
  24
  25                 serial0 = &uartd; /* Docking station */
  26                 serial1 = &uartc; /* Bluetooth */
  27                 serial2 = &uartb; /* GPS */
  28         };
  29
  30         /*
  31          * The decompressor and also some bootloaders rely on a
  32          * pre-existing /chosen node to be available to insert the
  33          * command line and merge other ATAGS info.
  34          */
  35         chosen {};
  36
  37         memory@0 {
  38                 reg = <0x00000000 0x40000000>;
  39         };
  40
  41         reserved-memory {
  42                 #address-cells = <1>;
  43                 #size-cells = <1>;
  44                 ranges;
  45
  46                 ramoops@2ffe0000 {
  47                         compatible = "ramoops";
  48                         reg = <0x2ffe0000 0x10000>;     /* 64kB */
  49                         console-size = <0x8000>;        /* 32kB */
  50                         record-size = <0x400>;          /*  1kB */
  51                         ecc-size = <16>;
  52                 };
  53
  54                 linux,cma@30000000 {
  55                         compatible = "shared-dma-pool";
  56                         alloc-ranges = <0x30000000 0x10000000>;
  57                         size = <0x10000000>; /* 256MiB */
  58                         linux,cma-default;
  59                         reusable;
  60                 };
  61         };
  62
  63         host1x@50000000 {
  64                 dc@54200000 {
  65                         rgb {
  66                                 status = "okay";
  67
  68                                 port@0 {
  69                                         lcd_output: endpoint {
  70                                                 remote-endpoint = <&lvds_encoder_input>;
  71                                                 bus-width = <18>;
  72                                         };
  73                                 };
  74                         };
  75                 };
  76
  77                 hdmi@54280000 {
  78                         status = "okay";
  79
  80                         vdd-supply = <&hdmi_vdd_reg>;
  81                         pll-supply = <&hdmi_pll_reg>;
  82                         hdmi-supply = <&vdd_5v0_sys>;
  83
  84                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  85                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  86                                 GPIO_ACTIVE_HIGH>;
  87                 };
  88         };
  89
  90         pinmux@70000014 {
  91                 pinctrl-names = "default";
  92                 pinctrl-0 = <&state_default>;
  93
  94                 state_default: pinmux {
  95                         ata {
  96                                 nvidia,pins = "ata";
  97                                 nvidia,function = "ide";
  98                         };
  99                         atb {
 100                                 nvidia,pins = "atb", "gma", "gme";
 101                                 nvidia,function = "sdio4";
 102                         };
 103                         atc {
 104                                 nvidia,pins = "atc";
 105                                 nvidia,function = "nand";
 106                         };
 107                         atd {
 108                                 nvidia,pins = "atd", "ate", "gmb", "spia",
 109                                         "spib", "spic";
 110                                 nvidia,function = "gmi";
 111                         };
 112                         cdev1 {
 113                                 nvidia,pins = "cdev1";
 114                                 nvidia,function = "plla_out";
 115                         };
 116                         cdev2 {
 117                                 nvidia,pins = "cdev2";
 118                                 nvidia,function = "pllp_out4";
 119                         };
 120                         crtp {
 121                                 nvidia,pins = "crtp", "lm1";
 122                                 nvidia,function = "crt";
 123                         };
 124                         csus {
 125                                 nvidia,pins = "csus";
 126                                 nvidia,function = "vi_sensor_clk";
 127                         };
 128                         dap1 {
 129                                 nvidia,pins = "dap1";
 130                                 nvidia,function = "dap1";
 131                         };
 132                         dap2 {
 133                                 nvidia,pins = "dap2";
 134                                 nvidia,function = "dap2";
 135                         };
 136                         dap3 {
 137                                 nvidia,pins = "dap3";
 138                                 nvidia,function = "dap3";
 139                         };
 140                         dap4 {
 141                                 nvidia,pins = "dap4";
 142                                 nvidia,function = "dap4";
 143                         };
 144                         dta {
 145                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
 146                                 nvidia,function = "vi";
 147                         };
 148                         dtf {
 149                                 nvidia,pins = "dtf";
 150                                 nvidia,function = "i2c3";
 151                         };
 152                         gmc {
 153                                 nvidia,pins = "gmc";
 154                                 nvidia,function = "uartd";
 155                         };
 156                         gmd {
 157                                 nvidia,pins = "gmd";
 158                                 nvidia,function = "sflash";
 159                         };
 160                         gpu {
 161                                 nvidia,pins = "gpu";
 162                                 nvidia,function = "pwm";
 163                         };
 164                         gpu7 {
 165                                 nvidia,pins = "gpu7";
 166                                 nvidia,function = "rtck";
 167                         };
 168                         gpv {
 169                                 nvidia,pins = "gpv", "slxa";
 170                                 nvidia,function = "pcie";
 171                         };
 172                         hdint {
 173                                 nvidia,pins = "hdint";
 174                                 nvidia,function = "hdmi";
 175                         };
 176                         i2cp {
 177                                 nvidia,pins = "i2cp";
 178                                 nvidia,function = "i2cp";
 179                         };
 180                         irrx {
 181                                 nvidia,pins = "irrx", "irtx";
 182                                 nvidia,function = "uartb";
 183                         };
 184                         kbca {
 185                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 186                                         "kbce", "kbcf";
 187                                 nvidia,function = "kbc";
 188                         };
 189                         lcsn {
 190                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
 191                                         "lsdi", "lvp0";
 192                                 nvidia,function = "rsvd4";
 193                         };
 194                         ld0 {
 195                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 196                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 197                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 198                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 199                                         "lhp1", "lhp2", "lhs", "lpp", "lsc0",
 200                                         "lsc1", "lsck", "lsda", "lspi", "lvp1",
 201                                         "lvs";
 202                                 nvidia,function = "displaya";
 203                         };
 204                         owc {
 205                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
 206                                 nvidia,function = "rsvd2";
 207                         };
 208                         pmc {
 209                                 nvidia,pins = "pmc";
 210                                 nvidia,function = "pwr_on";
 211                         };
 212                         rm {
 213                                 nvidia,pins = "rm";
 214                                 nvidia,function = "i2c1";
 215                         };
 216                         sdb {
 217                                 nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk";
 218                                 nvidia,function = "sdio3";
 219                         };
 220                         sdio1 {
 221                                 nvidia,pins = "sdio1";
 222                                 nvidia,function = "sdio1";
 223                         };
 224                         slxd {
 225                                 nvidia,pins = "slxd";
 226                                 nvidia,function = "spdif";
 227                         };
 228                         spid {
 229                                 nvidia,pins = "spid", "spie", "spif";
 230                                 nvidia,function = "spi1";
 231                         };
 232                         spig {
 233                                 nvidia,pins = "spig", "spih";
 234                                 nvidia,function = "spi2_alt";
 235                         };
 236                         uaa {
 237                                 nvidia,pins = "uaa", "uab", "uda";
 238                                 nvidia,function = "ulpi";
 239                         };
 240                         uad {
 241                                 nvidia,pins = "uad";
 242                                 nvidia,function = "irda";
 243                         };
 244                         uca {
 245                                 nvidia,pins = "uca", "ucb";
 246                                 nvidia,function = "uartc";
 247                         };
 248                         conf_ata {
 249                                 nvidia,pins = "ata", "atb", "atc", "atd",
 250                                         "cdev1", "cdev2", "csus", "dap1",
 251                                         "dap4", "dte", "dtf", "gma", "gmc",
 252                                         "gme", "gpu", "gpu7", "gpv", "i2cp",
 253                                         "irrx", "irtx", "pta", "rm",
 254                                         "sdc", "sdd", "slxc", "slxd", "slxk",
 255                                         "spdi", "spdo", "uac", "uad", "uda";
 256                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 257                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 258                         };
 259                         conf_ate {
 260                                 nvidia,pins = "ate", "dap2", "dap3",
 261                                         "gmd", "owc", "spia", "spib", "spic",
 262                                         "spid", "spie";
 263                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 264                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 265                         };
 266                         conf_ck32 {
 267                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 268                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 269                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 270                         };
 271                         conf_crtp {
 272                                 nvidia,pins = "crtp", "gmb", "slxa", "spig",
 273                                         "spih";
 274                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 275                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 276                         };
 277                         conf_dta {
 278                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "kbcb";
 279                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 280                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 281                         };
 282                         conf_dte {
 283                                 nvidia,pins = "spif";
 284                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 285                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 286                         };
 287                         conf_hdint {
 288                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 289                                         "lpw1", "lsck", "lsda", "lsdi",
 290                                         "lvp0";
 291                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 292                         };
 293                         conf_kbca {
 294                                 nvidia,pins = "kbca", "kbcc", "kbcd",
 295                                         "kbce", "kbcf", "sdio1", "uaa",
 296                                         "uab", "uca", "ucb";
 297                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 298                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 299                         };
 300                         conf_lc {
 301                                 nvidia,pins = "lc", "ls";
 302                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 303                         };
 304                         conf_ld0 {
 305                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 306                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 307                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 308                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 309                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
 310                                         "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
 311                                         "lvp1", "lvs", "pmc", "sdb";
 312                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 313                         };
 314                         conf_ld17_0 {
 315                                 nvidia,pins = "ld17_0";
 316                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 317                         };
 318                         drive_ddc {
 319                                 nvidia,pins = "drive_ddc",
 320                                                 "drive_vi1",
 321                                                 "drive_sdio1";
 322                                 nvidia,pull-up-strength = <31>;
 323                                 nvidia,pull-down-strength = <31>;
 324                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
 325                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 326                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 327                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 328                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 329                         };
 330                         drive_dbg {
 331                                 nvidia,pins = "drive_dbg",
 332                                                 "drive_vi2",
 333                                                 "drive_at1",
 334                                                 "drive_ao1";
 335                                 nvidia,pull-up-strength = <31>;
 336                                 nvidia,pull-down-strength = <31>;
 337                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
 338                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 339                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 340                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 341                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 342                         };
 343                 };
 344
 345                 state_i2cmux_ddc: pinmux_i2cmux_ddc {
 346                         ddc {
 347                                 nvidia,pins = "ddc";
 348                                 nvidia,function = "i2c2";
 349                         };
 350                         pta {
 351                                 nvidia,pins = "pta";
 352                                 nvidia,function = "rsvd4";
 353                         };
 354                 };
 355
 356                 state_i2cmux_pta: pinmux_i2cmux_pta {
 357                         ddc {
 358                                 nvidia,pins = "ddc";
 359                                 nvidia,function = "rsvd4";
 360                         };
 361                         pta {
 362                                 nvidia,pins = "pta";
 363                                 nvidia,function = "i2c2";
 364                         };
 365                 };
 366
 367                 state_i2cmux_idle: pinmux_i2cmux_idle {
 368                         ddc {
 369                                 nvidia,pins = "ddc";
 370                                 nvidia,function = "rsvd4";
 371                         };
 372                         pta {
 373                                 nvidia,pins = "pta";
 374                                 nvidia,function = "rsvd4";
 375                         };
 376                 };
 377         };
 378
 379         tegra_i2s1: i2s@70002800 {
 380                 status = "okay";
 381         };
 382
 383         uartb: serial@70006040 {
 384                 compatible = "nvidia,tegra20-hsuart";
 385                 /* GPS BCM4751 */
 386         };
 387
 388         uartc: serial@70006200 {
 389                 compatible = "nvidia,tegra20-hsuart";
 390                 status = "okay";
 391
 392                 /* Azurewave AW-NH665 BCM4329B1 */
 393                 bluetooth {
 394                         compatible = "brcm,bcm4329-bt";
 395
 396                         /* PLLP 216MHz / 16 / 4 */
 397                         max-speed = <3375000>;
 398
 399                         clocks = <&rtc_32k_wifi>;
 400                         clock-names = "txco";
 401
 402                         vbat-supply  = <&vdd_3v3_sys>;
 403                         vddio-supply = <&vdd_1v8_sys>;
 404
 405                         device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
 406                         host-wakeup-gpios =   <&gpio TEGRA_GPIO(U, 6) GPIO_ACTIVE_HIGH>;
 407                         shutdown-gpios =      <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
 408                 };
 409         };
 410
 411         uartd: serial@70006300 {
 412                 /* Docking station */
 413         };
 414
 415         i2c@7000c000 {
 416                 clock-frequency = <400000>;
 417                 status = "okay";
 418
 419                 wm8903: audio-codec@1a {
 420                         compatible = "wlf,wm8903";
 421                         reg = <0x1a>;
 422
 423                         interrupt-parent = <&gpio>;
 424                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_EDGE_BOTH>;
 425
 426                         gpio-controller;
 427                         #gpio-cells = <2>;
 428
 429                         micdet-cfg = <0>;
 430                         micdet-delay = <100>;
 431
 432                         gpio-cfg = <
 433                                 0x0000 /* MIC_LR_OUT#    GPIO, output, low */
 434                                 0x0000 /* FM2018-enable  GPIO, output, low */
 435                                 0x0000 /* Speaker-enable GPIO, output, low */
 436                                 0x0200 /* Interrupt, output */
 437                                 0x01a0 /* BCLK, input, active high */
 438                         >;
 439
 440                         AVDD-supply  = <&vdd_1v8_sys>;
 441                         CPVDD-supply = <&vdd_1v8_sys>;
 442                         DBVDD-supply = <&vdd_1v8_sys>;
 443                         DCVDD-supply = <&vdd_1v8_sys>;
 444                 };
 445
 446                 touchscreen@4c {
 447                         compatible = "atmel,maxtouch";
 448                         reg = <0x4c>;
 449
 450                         interrupt-parent = <&gpio>;
 451                         interrupts = <TEGRA_GPIO(V, 6) IRQ_TYPE_LEVEL_LOW>;
 452
 453                         reset-gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
 454
 455                         vdda-supply = <&vdd_3v3_sys>;
 456                         vdd-supply  = <&vdd_3v3_sys>;
 457
 458                         atmel,wakeup-method = <ATMEL_MXT_WAKEUP_I2C_SCL>;
 459                 };
 460
 461                 gyroscope@68 {
 462                         compatible = "invensense,mpu3050";
 463                         reg = <0x68>;
 464
 465                         interrupt-parent = <&gpio>;
 466                         interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_EDGE_RISING>;
 467
 468                         vdd-supply    = <&vdd_3v3_sys>;
 469                         vlogic-supply = <&vdd_1v8_sys>;
 470
 471                         mount-matrix =   "0",  "1",  "0",
 472                                          "1",  "0",  "0",
 473                                          "0",  "0", "-1";
 474
 475                         i2c-gate {
 476                                 #address-cells = <1>;
 477                                 #size-cells = <0>;
 478
 479                                 accelerometer@f {
 480                                         compatible = "kionix,kxtf9";
 481                                         reg = <0x0f>;
 482
 483                                         interrupt-parent = <&gpio>;
 484                                         interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>;
 485
 486                                         vdd-supply   = <&vdd_1v8_sys>;
 487                                         vddio-supply = <&vdd_1v8_sys>;
 488
 489                                         mount-matrix =   "0",  "1",  "0",
 490                                                          "1",  "0",  "0",
 491                                                          "0",  "0", "-1";
 492                                 };
 493                         };
 494                 };
 495         };
 496
 497         i2c@7000c400 {
 498                 clock-frequency = <10000>;
 499                 status = "okay";
 500         };
 501
 502         i2cmux {
 503                 compatible = "i2c-mux-pinctrl";
 504                 #address-cells = <1>;
 505                 #size-cells = <0>;
 506
 507                 i2c-parent = <&{/i2c@7000c400}>;
 508
 509                 pinctrl-names = "ddc", "pta", "idle";
 510                 pinctrl-0 = <&state_i2cmux_ddc>;
 511                 pinctrl-1 = <&state_i2cmux_pta>;
 512                 pinctrl-2 = <&state_i2cmux_idle>;
 513
 514                 hdmi_ddc: i2c@0 {
 515                         reg = <0>;
 516                         #address-cells = <1>;
 517                         #size-cells = <0>;
 518                 };
 519
 520                 panel_ddc: i2c@1 {
 521                         reg = <1>;
 522                         #address-cells = <1>;
 523                         #size-cells = <0>;
 524
 525                         embedded-controller@58 {
 526                                 compatible = "acer,a500-iconia-ec", "ene,kb930";
 527                                 reg = <0x58>;
 528
 529                                 system-power-controller;
 530
 531                                 monitored-battery = <&bat1010>;
 532                                 power-supplies = <&mains>;
 533                         };
 534                 };
 535         };
 536
 537         pwm: pwm@7000a000 {
 538                 status = "okay";
 539         };
 540
 541         i2c@7000d000 {
 542                 clock-frequency = <100000>;
 543                 status = "okay";
 544
 545                 magnetometer@c {
 546                         compatible = "ak,ak8975";
 547                         reg = <0x0c>;
 548
 549                         interrupt-parent = <&gpio>;
 550                         interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_EDGE_RISING>;
 551
 552                         vdd-supply = <&vdd_3v3_sys>;
 553                         vid-supply = <&vdd_1v8_sys>;
 554
 555                         mount-matrix =  "1",  "0",  "0",
 556                                         "0", "-1",  "0",
 557                                         "0",  "0", "-1";
 558                 };
 559
 560                 pmic: pmic@34 {
 561                         compatible = "ti,tps6586x";
 562                         reg = <0x34>;
 563
 564                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 565
 566                         #gpio-cells = <2>;
 567                         gpio-controller;
 568
 569                         sys-supply       = <&vdd_5v0_sys>;
 570                         vin-sm0-supply   = <&sys_reg>;
 571                         vin-sm1-supply   = <&sys_reg>;
 572                         vin-sm2-supply   = <&sys_reg>;
 573                         vinldo01-supply  = <&sm2_reg>;
 574                         vinldo23-supply  = <&sm2_reg>;
 575                         vinldo4-supply   = <&sm2_reg>;
 576                         vinldo678-supply = <&sm2_reg>;
 577                         vinldo9-supply   = <&sm2_reg>;
 578
 579                         regulators {
 580                                 sys_reg: sys {
 581                                         regulator-name = "vdd_sys";
 582                                         regulator-always-on;
 583                                 };
 584
 585                                 vdd_core: sm0 {
 586                                         regulator-name = "vdd_sm0,vdd_core";
 587                                         regulator-min-microvolt = <950000>;
 588                                         regulator-max-microvolt = <1300000>;
 589                                         regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
 590                                         regulator-coupled-max-spread = <170000 550000>;
 591                                         regulator-always-on;
 592                                         regulator-boot-on;
 593
 594                                         nvidia,tegra-core-regulator;
 595                                 };
 596
 597                                 vdd_cpu: sm1 {
 598                                         regulator-name = "vdd_sm1,vdd_cpu";
 599                                         regulator-min-microvolt = <750000>;
 600                                         regulator-max-microvolt = <1125000>;
 601                                         regulator-coupled-with = <&vdd_core &rtc_vdd>;
 602                                         regulator-coupled-max-spread = <550000 550000>;
 603                                         regulator-always-on;
 604                                         regulator-boot-on;
 605
 606                                         nvidia,tegra-cpu-regulator;
 607                                 };
 608
 609                                 sm2_reg: sm2 {
 610                                         regulator-name = "vdd_sm2,vin_ldo*";
 611                                         regulator-min-microvolt = <3700000>;
 612                                         regulator-max-microvolt = <3700000>;
 613                                         regulator-always-on;
 614                                 };
 615
 616                                 /* LDO0 is not connected to anything */
 617
 618                                 ldo1 {
 619                                         regulator-name = "vdd_ldo1,avdd_pll*";
 620                                         regulator-min-microvolt = <1100000>;
 621                                         regulator-max-microvolt = <1100000>;
 622                                         regulator-always-on;
 623                                         regulator-boot-on;
 624                                 };
 625
 626                                 rtc_vdd: ldo2 {
 627                                         regulator-name = "vdd_ldo2,vdd_rtc";
 628                                         regulator-min-microvolt = <950000>;
 629                                         regulator-max-microvolt = <1300000>;
 630                                         regulator-coupled-with = <&vdd_core &vdd_cpu>;
 631                                         regulator-coupled-max-spread = <170000 550000>;
 632                                         regulator-always-on;
 633                                         regulator-boot-on;
 634
 635                                         nvidia,tegra-rtc-regulator;
 636                                 };
 637
 638                                 ldo3 {
 639                                         regulator-name = "vdd_ldo3,avdd_usb*";
 640                                         regulator-min-microvolt = <3300000>;
 641                                         regulator-max-microvolt = <3300000>;
 642                                         regulator-always-on;
 643                                 };
 644
 645                                 ldo4 {
 646                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 647                                         regulator-min-microvolt = <1800000>;
 648                                         regulator-max-microvolt = <1800000>;
 649                                         regulator-always-on;
 650                                         regulator-boot-on;
 651                                 };
 652
 653                                 vcore_emmc: ldo5 {
 654                                         regulator-name = "vdd_ldo5,vcore_mmc";
 655                                         regulator-min-microvolt = <2850000>;
 656                                         regulator-max-microvolt = <2850000>;
 657                                         regulator-always-on;
 658                                 };
 659
 660                                 avdd_vdac_reg: ldo6 {
 661                                         regulator-name = "vdd_ldo6,avdd_vdac";
 662                                         regulator-min-microvolt = <2850000>;
 663                                         regulator-max-microvolt = <2850000>;
 664                                 };
 665
 666                                 hdmi_vdd_reg: ldo7 {
 667                                         regulator-name = "vdd_ldo7,avdd_hdmi";
 668                                         regulator-min-microvolt = <3300000>;
 669                                         regulator-max-microvolt = <3300000>;
 670                                 };
 671
 672                                 hdmi_pll_reg: ldo8 {
 673                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 674                                         regulator-min-microvolt = <1800000>;
 675                                         regulator-max-microvolt = <1800000>;
 676                                 };
 677
 678                                 ldo9 {
 679                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 680                                         regulator-min-microvolt = <2850000>;
 681                                         regulator-max-microvolt = <2850000>;
 682                                         regulator-always-on;
 683                                         regulator-boot-on;
 684                                 };
 685
 686                                 ldo_rtc {
 687                                         regulator-name = "vdd_rtc_out,vdd_cell";
 688                                         regulator-min-microvolt = <3300000>;
 689                                         regulator-max-microvolt = <3300000>;
 690                                         regulator-always-on;
 691                                         regulator-boot-on;
 692                                 };
 693                         };
 694                 };
 695
 696                 nct1008: temperature-sensor@4c {
 697                         compatible = "onnn,nct1008";
 698                         reg = <0x4c>;
 699                         vcc-supply = <&vdd_3v3_sys>;
 700
 701                         interrupt-parent = <&gpio>;
 702                         interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
 703
 704                         #thermal-sensor-cells = <1>;
 705                 };
 706         };
 707
 708         pmc@7000e400 {
 709                 nvidia,invert-interrupt;
 710                 nvidia,suspend-mode = <1>;
 711                 nvidia,cpu-pwr-good-time = <2000>;
 712                 nvidia,cpu-pwr-off-time = <100>;
 713                 nvidia,core-pwr-good-time = <3845 3845>;
 714                 nvidia,core-pwr-off-time = <458>;
 715                 nvidia,sys-clock-req-active-high;
 716         };
 717
 718         usb@c5000000 {
 719                 compatible = "nvidia,tegra20-udc";
 720                 status = "okay";
 721                 dr_mode = "peripheral";
 722         };
 723
 724         usb-phy@c5000000 {
 725                 status = "okay";
 726                 dr_mode = "peripheral";
 727                 nvidia,xcvr-setup-use-fuses;
 728                 nvidia,xcvr-lsfslew = <2>;
 729                 nvidia,xcvr-lsrslew = <2>;
 730         };
 731
 732         usb@c5008000 {
 733                 status = "okay";
 734         };
 735
 736         usb-phy@c5008000 {
 737                 status = "okay";
 738                 nvidia,xcvr-setup-use-fuses;
 739                 nvidia,xcvr-lsfslew = <2>;
 740                 nvidia,xcvr-lsrslew = <2>;
 741                 vbus-supply = <&vdd_5v0_sys>;
 742         };
 743
 744         brcm_wifi_pwrseq: wifi-pwrseq {
 745                 compatible = "mmc-pwrseq-simple";
 746
 747                 clocks = <&rtc_32k_wifi>;
 748                 clock-names = "ext_clock";
 749
 750                 reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
 751                 post-power-on-delay-ms = <300>;
 752                 power-off-delay-us = <300>;
 753         };
 754
 755         sdmmc1: mmc@c8000000 {
 756                 status = "okay";
 757
 758                 #address-cells = <1>;
 759                 #size-cells = <0>;
 760
 761                 assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
 762                 assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
 763                 assigned-clock-rates = <50000000>;
 764
 765                 max-frequency = <50000000>;
 766                 keep-power-in-suspend;
 767                 bus-width = <4>;
 768                 non-removable;
 769
 770                 mmc-pwrseq = <&brcm_wifi_pwrseq>;
 771                 vmmc-supply = <&vdd_3v3_sys>;
 772                 vqmmc-supply = <&vdd_1v8_sys>;
 773
 774                 /* Azurewave AW-NH611 BCM4329 */
 775                 wifi@1 {
 776                         reg = <1>;
 777                         compatible = "brcm,bcm4329-fmac";
 778                         interrupt-parent = <&gpio>;
 779                         interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
 780                         interrupt-names = "host-wake";
 781                 };
 782         };
 783
 784         sdmmc3: mmc@c8000400 {
 785                 status = "okay";
 786                 bus-width = <4>;
 787                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 788                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
 789                 vmmc-supply = <&vdd_3v3_sys>;
 790                 vqmmc-supply = <&vdd_3v3_sys>;
 791         };
 792
 793         sdmmc4: mmc@c8000600 {
 794                 status = "okay";
 795                 bus-width = <8>;
 796                 vmmc-supply = <&vcore_emmc>;
 797                 vqmmc-supply = <&vdd_3v3_sys>;
 798                 non-removable;
 799         };
 800
 801         mains: ac-adapter-detect {
 802                 compatible = "gpio-charger";
 803                 charger-type = "mains";
 804                 gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
 805         };
 806
 807         backlight: backlight {
 808                 compatible = "pwm-backlight";
 809
 810                 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
 811                 power-supply = <&vdd_3v3_sys>;
 812                 pwms = <&pwm 2 41667>;
 813
 814                 brightness-levels = <7 255>;
 815                 num-interpolated-steps = <248>;
 816                 default-brightness-level = <20>;
 817         };
 818
 819         bat1010: battery-2s1p {
 820                 compatible = "simple-battery";
 821                 charge-full-design-microamp-hours = <3260000>;
 822                 energy-full-design-microwatt-hours = <24000000>;
 823                 operating-range-celsius = <0 40>;
 824         };
 825
 826         /* PMIC has a built-in 32KHz oscillator which is used by PMC */
 827         clk32k_in: clock@0 {
 828                 compatible = "fixed-clock";
 829                 #clock-cells = <0>;
 830                 clock-frequency = <32768>;
 831                 clock-output-names = "tps658621-out32k";
 832         };
 833
 834         /*
 835          * This standalone onboard fixed-clock always-ON 32KHz
 836          * oscillator is used as a reference clock-source by the
 837          * Azurewave WiFi/BT module.
 838          */
 839         rtc_32k_wifi: clock@1 {
 840                 compatible = "fixed-clock";
 841                 #clock-cells = <0>;
 842                 clock-frequency = <32768>;
 843                 clock-output-names = "kk3270032";
 844         };
 845
 846         cpus {
 847                 cpu0: cpu@0 {
 848                         cpu-supply = <&vdd_cpu>;
 849                         operating-points-v2 = <&cpu0_opp_table>;
 850                         #cooling-cells = <2>;
 851                 };
 852
 853                 cpu1: cpu@1 {
 854                         cpu-supply = <&vdd_cpu>;
 855                         operating-points-v2 = <&cpu0_opp_table>;
 856                         #cooling-cells = <2>;
 857                 };
 858         };
 859
 860         display-panel {
 861                 compatible = "auo,b101ew05", "panel-lvds";
 862
 863                 ddc-i2c-bus = <&panel_ddc>;
 864                 power-supply = <&vdd_pnl>;
 865                 backlight = <&backlight>;
 866
 867                 width-mm = <218>;
 868                 height-mm = <135>;
 869
 870                 data-mapping = "jeida-18";
 871
 872                 panel-timing {
 873                         clock-frequency = <71200000>;
 874                         hactive = <1280>;
 875                         vactive = <800>;
 876                         hfront-porch = <8>;
 877                         hback-porch = <18>;
 878                         hsync-len = <184>;
 879                         vsync-len = <3>;
 880                         vfront-porch = <4>;
 881                         vback-porch = <8>;
 882                 };
 883
 884                 port {
 885                         panel_input: endpoint {
 886                                 remote-endpoint = <&lvds_encoder_output>;
 887                         };
 888                 };
 889         };
 890
 891         gpio-keys {
 892                 compatible = "gpio-keys";
 893
 894                 power {
 895                         label = "Power";
 896                         gpios = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
 897                         linux,code = <KEY_POWER>;
 898                         debounce-interval = <10>;
 899                         wakeup-event-action = <EV_ACT_ASSERTED>;
 900                         wakeup-source;
 901                 };
 902
 903                 rotation-lock {
 904                         label = "Rotate-lock";
 905                         gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_HIGH>;
 906                         linux,code = <SW_ROTATE_LOCK>;
 907                         linux,input-type = <EV_SW>;
 908                         debounce-interval = <10>;
 909                 };
 910
 911                 volume-up {
 912                         label = "Volume Up";
 913                         gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
 914                         linux,code = <KEY_VOLUMEUP>;
 915                         debounce-interval = <10>;
 916                         wakeup-event-action = <EV_ACT_ASSERTED>;
 917                         wakeup-source;
 918                 };
 919
 920                 volume-down {
 921                         label = "Volume Down";
 922                         gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
 923                         linux,code = <KEY_VOLUMEDOWN>;
 924                         debounce-interval = <10>;
 925                         wakeup-event-action = <EV_ACT_ASSERTED>;
 926                         wakeup-source;
 927                 };
 928         };
 929
 930         haptic-feedback {
 931                 compatible = "gpio-vibrator";
 932                 enable-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
 933                 vcc-supply = <&vdd_3v3_sys>;
 934         };
 935
 936         lvds-encoder {
 937                 compatible = "ti,sn75lvds83", "lvds-encoder";
 938
 939                 powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
 940                 power-supply = <&vdd_3v3_sys>;
 941
 942                 ports {
 943                         #address-cells = <1>;
 944                         #size-cells = <0>;
 945
 946                         port@0 {
 947                                 reg = <0>;
 948
 949                                 lvds_encoder_input: endpoint {
 950                                         remote-endpoint = <&lcd_output>;
 951                                 };
 952                         };
 953
 954                         port@1 {
 955                                 reg = <1>;
 956
 957                                 lvds_encoder_output: endpoint {
 958                                         remote-endpoint = <&panel_input>;
 959                                 };
 960                         };
 961                 };
 962         };
 963
 964         vdd_5v0_sys: regulator@0 {
 965                 compatible = "regulator-fixed";
 966                 regulator-name = "vdd_5v0";
 967                 regulator-min-microvolt = <5000000>;
 968                 regulator-max-microvolt = <5000000>;
 969                 regulator-always-on;
 970         };
 971
 972         vdd_3v3_sys: regulator@1 {
 973                 compatible = "regulator-fixed";
 974                 regulator-name = "vdd_3v3_vs";
 975                 regulator-min-microvolt = <3300000>;
 976                 regulator-max-microvolt = <3300000>;
 977                 regulator-always-on;
 978                 vin-supply = <&vdd_5v0_sys>;
 979         };
 980
 981         vdd_1v8_sys: regulator@2 {
 982                 compatible = "regulator-fixed";
 983                 regulator-name = "vdd_1v8_vs";
 984                 regulator-min-microvolt = <1800000>;
 985                 regulator-max-microvolt = <1800000>;
 986                 regulator-always-on;
 987                 vin-supply = <&vdd_5v0_sys>;
 988         };
 989
 990         vdd_pnl: regulator@3 {
 991                 compatible = "regulator-fixed";
 992                 regulator-name = "vdd_panel";
 993                 regulator-min-microvolt = <3300000>;
 994                 regulator-max-microvolt = <3300000>;
 995                 regulator-enable-ramp-delay = <300000>;
 996                 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
 997                 enable-active-high;
 998                 vin-supply = <&vdd_5v0_sys>;
 999         };
1000
1001         sound {
1002                 compatible = "nvidia,tegra-audio-wm8903-picasso",
1003                              "nvidia,tegra-audio-wm8903";
1004                 nvidia,model = "Acer Iconia Tab A500 WM8903";
1005
1006                 nvidia,audio-routing =
1007                         "Headphone Jack", "HPOUTR",
1008                         "Headphone Jack", "HPOUTL",
1009                         "Int Spk", "LINEOUTL",
1010                         "Int Spk", "LINEOUTR",
1011                         "Mic Jack", "MICBIAS",
1012                         "IN2L", "Mic Jack",
1013                         "IN2R", "Mic Jack",
1014                         "IN1L", "Int Mic",
1015                         "IN1R", "Int Mic";
1016
1017                 nvidia,i2s-controller = <&tegra_i2s1>;
1018                 nvidia,audio-codec = <&wm8903>;
1019
1020                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
1021                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
1022                 nvidia,int-mic-en-gpios = <&wm8903 1 GPIO_ACTIVE_HIGH>;
1023                 nvidia,headset;
1024
1025                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
1026                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
1027                          <&tegra_car TEGRA20_CLK_CDEV1>;
1028                 clock-names = "pll_a", "pll_a_out0", "mclk";
1029         };
1030
1031         thermal-zones {
1032                 skin-thermal {
1033                         polling-delay-passive = <1000>; /* milliseconds */
1034                         polling-delay = <0>; /* milliseconds */
1035
1036                         thermal-sensors = <&nct1008 0>;
1037                 };
1038
1039                 cpu-thermal {
1040                         polling-delay-passive = <1000>; /* milliseconds */
1041                         polling-delay = <5000>; /* milliseconds */
1042
1043                         thermal-sensors = <&nct1008 1>;
1044
1045                         trips {
1046                                 trip0: cpu-alert0 {
1047                                         /* start throttling at 60C */
1048                                         temperature = <60000>;
1049                                         hysteresis = <200>;
1050                                         type = "passive";
1051                                 };
1052
1053                                 trip1: cpu-crit {
1054                                         /* shut down at 70C */
1055                                         temperature = <70000>;
1056                                         hysteresis = <2000>;
1057                                         type = "critical";
1058                                 };
1059                         };
1060
1061                         cooling-maps {
1062                                 map0 {
1063                                         trip = <&trip0>;
1064                                         cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1065                                                          <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1066                                 };
1067                         };
1068                 };
1069         };
1070
1071         memory-controller@7000f400 {
1072                 nvidia,use-ram-code;
1073
1074                 emc-tables@0 {
1075                         nvidia,ram-code = <0>; /* elpida-8gb */
1076                         reg = <0>;
1077
1078                         #address-cells = <1>;
1079                         #size-cells = <0>;
1080
1081                         emc-table@25000 {
1082                                 reg = <25000>;
1083                                 compatible = "nvidia,tegra20-emc-table";
1084                                 clock-frequency = <25000>;
1085                                 nvidia,emc-registers = <0x00000002 0x00000006
1086                                         0x00000003 0x00000003 0x00000006 0x00000004
1087                                         0x00000002 0x00000009 0x00000003 0x00000003
1088                                         0x00000002 0x00000002 0x00000002 0x00000004
1089                                         0x00000003 0x00000008 0x0000000b 0x0000004d
1090                                         0x00000000 0x00000003 0x00000003 0x00000003
1091                                         0x00000008 0x00000001 0x0000000a 0x00000004
1092                                         0x00000003 0x00000008 0x00000004 0x00000006
1093                                         0x00000002 0x00000068 0x00000000 0x00000003
1094                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1095                                         0x00070000 0x00000000 0x00000000 0x00000003
1096                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1097                         };
1098
1099                         emc-table@50000 {
1100                                 reg = <50000>;
1101                                 compatible = "nvidia,tegra20-emc-table";
1102                                 clock-frequency = <50000>;
1103                                 nvidia,emc-registers = <0x00000003 0x00000007
1104                                         0x00000003 0x00000003 0x00000006 0x00000004
1105                                         0x00000002 0x00000009 0x00000003 0x00000003
1106                                         0x00000002 0x00000002 0x00000002 0x00000005
1107                                         0x00000003 0x00000008 0x0000000b 0x0000009f
1108                                         0x00000000 0x00000003 0x00000003 0x00000003
1109                                         0x00000008 0x00000001 0x0000000a 0x00000007
1110                                         0x00000003 0x00000008 0x00000004 0x00000006
1111                                         0x00000002 0x000000d0 0x00000000 0x00000000
1112                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1113                                         0x00070000 0x00000000 0x00000000 0x00000005
1114                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1115                         };
1116
1117                         emc-table@75000 {
1118                                 reg = <75000>;
1119                                 compatible = "nvidia,tegra20-emc-table";
1120                                 clock-frequency = <75000>;
1121                                 nvidia,emc-registers = <0x00000005 0x0000000a
1122                                         0x00000004 0x00000003 0x00000006 0x00000004
1123                                         0x00000002 0x00000009 0x00000003 0x00000003
1124                                         0x00000002 0x00000002 0x00000002 0x00000005
1125                                         0x00000003 0x00000008 0x0000000b 0x000000ff
1126                                         0x00000000 0x00000003 0x00000003 0x00000003
1127                                         0x00000008 0x00000001 0x0000000a 0x0000000b
1128                                         0x00000003 0x00000008 0x00000004 0x00000006
1129                                         0x00000002 0x00000138 0x00000000 0x00000000
1130                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1131                                         0x00070000 0x00000000 0x00000000 0x00000007
1132                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1133                         };
1134
1135                         emc-table@150000 {
1136                                 reg = <150000>;
1137                                 compatible = "nvidia,tegra20-emc-table";
1138                                 clock-frequency = <150000>;
1139                                 nvidia,emc-registers = <0x00000009 0x00000014
1140                                         0x00000007 0x00000003 0x00000006 0x00000004
1141                                         0x00000002 0x00000009 0x00000003 0x00000003
1142                                         0x00000002 0x00000002 0x00000002 0x00000005
1143                                         0x00000003 0x00000008 0x0000000b 0x0000021f
1144                                         0x00000000 0x00000003 0x00000003 0x00000003
1145                                         0x00000008 0x00000001 0x0000000a 0x00000015
1146                                         0x00000003 0x00000008 0x00000004 0x00000006
1147                                         0x00000002 0x00000270 0x00000000 0x00000001
1148                                         0x00000000 0x00000000 0x00000282 0xa07c04ae
1149                                         0x007dd510 0x00000000 0x00000000 0x0000000e
1150                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1151                         };
1152
1153                         emc-table@300000 {
1154                                 reg = <300000>;
1155                                 compatible = "nvidia,tegra20-emc-table";
1156                                 clock-frequency = <300000>;
1157                                 nvidia,emc-registers = <0x00000012 0x00000027
1158                                         0x0000000d 0x00000006 0x00000007 0x00000005
1159                                         0x00000003 0x00000009 0x00000006 0x00000006
1160                                         0x00000003 0x00000003 0x00000002 0x00000006
1161                                         0x00000003 0x00000009 0x0000000c 0x0000045f
1162                                         0x00000000 0x00000004 0x00000004 0x00000006
1163                                         0x00000008 0x00000001 0x0000000e 0x0000002a
1164                                         0x00000003 0x0000000f 0x00000007 0x00000005
1165                                         0x00000002 0x000004e1 0x00000005 0x00000002
1166                                         0x00000000 0x00000000 0x00000282 0xe059048b
1167                                         0x007e1510 0x00000000 0x00000000 0x0000001b
1168                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1169                         };
1170                 };
1171
1172                 emc-tables@1 {
1173                         nvidia,ram-code = <1>; /* elpida-4gb */
1174                         reg = <1>;
1175
1176                         #address-cells = <1>;
1177                         #size-cells = <0>;
1178
1179                         emc-table@25000 {
1180                                 reg = <25000>;
1181                                 compatible = "nvidia,tegra20-emc-table";
1182                                 clock-frequency = <25000>;
1183                                 nvidia,emc-registers = <0x00000002 0x00000006
1184                                         0x00000003 0x00000003 0x00000006 0x00000004
1185                                         0x00000002 0x00000009 0x00000003 0x00000003
1186                                         0x00000002 0x00000002 0x00000002 0x00000004
1187                                         0x00000003 0x00000008 0x0000000b 0x0000004d
1188                                         0x00000000 0x00000003 0x00000003 0x00000003
1189                                         0x00000008 0x00000001 0x0000000a 0x00000004
1190                                         0x00000003 0x00000008 0x00000004 0x00000006
1191                                         0x00000002 0x00000068 0x00000000 0x00000003
1192                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1193                                         0x0007c000 0x00000000 0x00000000 0x00000003
1194                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1195                         };
1196
1197                         emc-table@50000 {
1198                                 reg = <50000>;
1199                                 compatible = "nvidia,tegra20-emc-table";
1200                                 clock-frequency = <50000>;
1201                                 nvidia,emc-registers = <0x00000003 0x00000007
1202                                         0x00000003 0x00000003 0x00000006 0x00000004
1203                                         0x00000002 0x00000009 0x00000003 0x00000003
1204                                         0x00000002 0x00000002 0x00000002 0x00000005
1205                                         0x00000003 0x00000008 0x0000000b 0x0000009f
1206                                         0x00000000 0x00000003 0x00000003 0x00000003
1207                                         0x00000008 0x00000001 0x0000000a 0x00000007
1208                                         0x00000003 0x00000008 0x00000004 0x00000006
1209                                         0x00000002 0x000000d0 0x00000000 0x00000000
1210                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1211                                         0x0007c000 0x00000000 0x00000000 0x00000005
1212                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1213                         };
1214
1215                         emc-table@75000 {
1216                                 reg = <75000>;
1217                                 compatible = "nvidia,tegra20-emc-table";
1218                                 clock-frequency = <75000>;
1219                                 nvidia,emc-registers = <0x00000005 0x0000000a
1220                                         0x00000004 0x00000003 0x00000006 0x00000004
1221                                         0x00000002 0x00000009 0x00000003 0x00000003
1222                                         0x00000002 0x00000002 0x00000002 0x00000005
1223                                         0x00000003 0x00000008 0x0000000b 0x000000ff
1224                                         0x00000000 0x00000003 0x00000003 0x00000003
1225                                         0x00000008 0x00000001 0x0000000a 0x0000000b
1226                                         0x00000003 0x00000008 0x00000004 0x00000006
1227                                         0x00000002 0x00000138 0x00000000 0x00000000
1228                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1229                                         0x0007c000 0x00000000 0x00000000 0x00000007
1230                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1231                         };
1232
1233                         emc-table@150000 {
1234                                 reg = <150000>;
1235                                 compatible = "nvidia,tegra20-emc-table";
1236                                 clock-frequency = <150000>;
1237                                 nvidia,emc-registers = <0x00000009 0x00000014
1238                                         0x00000007 0x00000003 0x00000006 0x00000004
1239                                         0x00000002 0x00000009 0x00000003 0x00000003
1240                                         0x00000002 0x00000002 0x00000002 0x00000005
1241                                         0x00000003 0x00000008 0x0000000b 0x0000021f
1242                                         0x00000000 0x00000003 0x00000003 0x00000003
1243                                         0x00000008 0x00000001 0x0000000a 0x00000015
1244                                         0x00000003 0x00000008 0x00000004 0x00000006
1245                                         0x00000002 0x00000270 0x00000000 0x00000001
1246                                         0x00000000 0x00000000 0x00000282 0xa07c04ae
1247                                         0x007e4010 0x00000000 0x00000000 0x0000000e
1248                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1249                         };
1250
1251                         emc-table@300000 {
1252                                 reg = <300000>;
1253                                 compatible = "nvidia,tegra20-emc-table";
1254                                 clock-frequency = <300000>;
1255                                 nvidia,emc-registers = <0x00000012 0x00000027
1256                                         0x0000000d 0x00000006 0x00000007 0x00000005
1257                                         0x00000003 0x00000009 0x00000006 0x00000006
1258                                         0x00000003 0x00000003 0x00000002 0x00000006
1259                                         0x00000003 0x00000009 0x0000000c 0x0000045f
1260                                         0x00000000 0x00000004 0x00000004 0x00000006
1261                                         0x00000008 0x00000001 0x0000000e 0x0000002a
1262                                         0x00000003 0x0000000f 0x00000007 0x00000005
1263                                         0x00000002 0x000004e1 0x00000005 0x00000002
1264                                         0x00000000 0x00000000 0x00000282 0xe059048b
1265                                         0x007e0010 0x00000000 0x00000000 0x0000001b
1266                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1267                         };
1268                 };
1269
1270                 emc-tables@2 {
1271                         nvidia,ram-code = <2>; /* hynix-8gb */
1272                         reg = <2>;
1273
1274                         #address-cells = <1>;
1275                         #size-cells = <0>;
1276
1277                         emc-table@25000 {
1278                                 reg = <25000>;
1279                                 compatible = "nvidia,tegra20-emc-table";
1280                                 clock-frequency = <25000>;
1281                                 nvidia,emc-registers = <0x00000002 0x00000006
1282                                         0x00000003 0x00000003 0x00000006 0x00000004
1283                                         0x00000002 0x00000009 0x00000003 0x00000003
1284                                         0x00000002 0x00000002 0x00000002 0x00000004
1285                                         0x00000003 0x00000008 0x0000000b 0x0000004d
1286                                         0x00000000 0x00000003 0x00000003 0x00000003
1287                                         0x00000008 0x00000001 0x0000000a 0x00000004
1288                                         0x00000003 0x00000008 0x00000004 0x00000006
1289                                         0x00000002 0x00000068 0x00000000 0x00000003
1290                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1291                                         0x00070000 0x00000000 0x00000000 0x00000003
1292                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1293                         };
1294
1295                         emc-table@50000 {
1296                                 reg = <50000>;
1297                                 compatible = "nvidia,tegra20-emc-table";
1298                                 clock-frequency = <50000>;
1299                                 nvidia,emc-registers = <0x00000003 0x00000007
1300                                         0x00000003 0x00000003 0x00000006 0x00000004
1301                                         0x00000002 0x00000009 0x00000003 0x00000003
1302                                         0x00000002 0x00000002 0x00000002 0x00000005
1303                                         0x00000003 0x00000008 0x0000000b 0x0000009f
1304                                         0x00000000 0x00000003 0x00000003 0x00000003
1305                                         0x00000008 0x00000001 0x0000000a 0x00000007
1306                                         0x00000003 0x00000008 0x00000004 0x00000006
1307                                         0x00000002 0x000000d0 0x00000000 0x00000000
1308                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1309                                         0x00070000 0x00000000 0x00000000 0x00000005
1310                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1311                         };
1312
1313                         emc-table@75000 {
1314                                 reg = <75000>;
1315                                 compatible = "nvidia,tegra20-emc-table";
1316                                 clock-frequency = <75000>;
1317                                 nvidia,emc-registers = <0x00000005 0x0000000a
1318                                         0x00000004 0x00000003 0x00000006 0x00000004
1319                                         0x00000002 0x00000009 0x00000003 0x00000003
1320                                         0x00000002 0x00000002 0x00000002 0x00000005
1321                                         0x00000003 0x00000008 0x0000000b 0x000000ff
1322                                         0x00000000 0x00000003 0x00000003 0x00000003
1323                                         0x00000008 0x00000001 0x0000000a 0x0000000b
1324                                         0x00000003 0x00000008 0x00000004 0x00000006
1325                                         0x00000002 0x00000138 0x00000000 0x00000000
1326                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1327                                         0x00070000 0x00000000 0x00000000 0x00000007
1328                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1329                         };
1330
1331                         emc-table@150000 {
1332                                 reg = <150000>;
1333                                 compatible = "nvidia,tegra20-emc-table";
1334                                 clock-frequency = <150000>;
1335                                 nvidia,emc-registers = <0x00000009 0x00000014
1336                                         0x00000007 0x00000003 0x00000006 0x00000004
1337                                         0x00000002 0x00000009 0x00000003 0x00000003
1338                                         0x00000002 0x00000002 0x00000002 0x00000005
1339                                         0x00000003 0x00000008 0x0000000b 0x0000021f
1340                                         0x00000000 0x00000003 0x00000003 0x00000003
1341                                         0x00000008 0x00000001 0x0000000a 0x00000015
1342                                         0x00000003 0x00000008 0x00000004 0x00000006
1343                                         0x00000002 0x00000270 0x00000000 0x00000001
1344                                         0x00000000 0x00000000 0x00000282 0xa07c04ae
1345                                         0x007dd010 0x00000000 0x00000000 0x0000000e
1346                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1347                         };
1348
1349                         emc-table@300000 {
1350                                 reg = <300000>;
1351                                 compatible = "nvidia,tegra20-emc-table";
1352                                 clock-frequency = <300000>;
1353                                 nvidia,emc-registers = <0x00000012 0x00000027
1354                                         0x0000000d 0x00000006 0x00000007 0x00000005
1355                                         0x00000003 0x00000009 0x00000006 0x00000006
1356                                         0x00000003 0x00000003 0x00000002 0x00000006
1357                                         0x00000003 0x00000009 0x0000000c 0x0000045f
1358                                         0x00000000 0x00000004 0x00000004 0x00000006
1359                                         0x00000008 0x00000001 0x0000000e 0x0000002a
1360                                         0x00000003 0x0000000f 0x00000007 0x00000005
1361                                         0x00000002 0x000004e1 0x00000005 0x00000002
1362                                         0x00000000 0x00000000 0x00000282 0xe059048b
1363                                         0x007e2010 0x00000000 0x00000000 0x0000001b
1364                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1365                         };
1366                 };
1367
1368                 emc-tables@3 {
1369                         nvidia,ram-code = <3>; /* hynix-4gb */
1370                         reg = <3>;
1371
1372                         #address-cells = <1>;
1373                         #size-cells = <0>;
1374
1375                         emc-table@25000 {
1376                                 reg = <25000>;
1377                                 compatible = "nvidia,tegra20-emc-table";
1378                                 clock-frequency = <25000>;
1379                                 nvidia,emc-registers = <0x00000002 0x00000006
1380                                         0x00000003 0x00000003 0x00000006 0x00000004
1381                                         0x00000002 0x00000009 0x00000003 0x00000003
1382                                         0x00000002 0x00000002 0x00000002 0x00000004
1383                                         0x00000003 0x00000008 0x0000000b 0x0000004d
1384                                         0x00000000 0x00000003 0x00000003 0x00000003
1385                                         0x00000008 0x00000001 0x0000000a 0x00000004
1386                                         0x00000003 0x00000008 0x00000004 0x00000006
1387                                         0x00000002 0x00000068 0x00000000 0x00000003
1388                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1389                                         0x0007c000 0x00000000 0x00000000 0x00000003
1390                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1391                         };
1392
1393                         emc-table@50000 {
1394                                 reg = <50000>;
1395                                 compatible = "nvidia,tegra20-emc-table";
1396                                 clock-frequency = <50000>;
1397                                 nvidia,emc-registers = <0x00000003 0x00000007
1398                                         0x00000003 0x00000003 0x00000006 0x00000004
1399                                         0x00000002 0x00000009 0x00000003 0x00000003
1400                                         0x00000002 0x00000002 0x00000002 0x00000005
1401                                         0x00000003 0x00000008 0x0000000b 0x0000009f
1402                                         0x00000000 0x00000003 0x00000003 0x00000003
1403                                         0x00000008 0x00000001 0x0000000a 0x00000007
1404                                         0x00000003 0x00000008 0x00000004 0x00000006
1405                                         0x00000002 0x000000d0 0x00000000 0x00000000
1406                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1407                                         0x0007c000 0x00078000 0x00000000 0x00000005
1408                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1409                         };
1410
1411                         emc-table@75000 {
1412                                 reg = <75000>;
1413                                 compatible = "nvidia,tegra20-emc-table";
1414                                 clock-frequency = <75000>;
1415                                 nvidia,emc-registers = <0x00000005 0x0000000a
1416                                         0x00000004 0x00000003 0x00000006 0x00000004
1417                                         0x00000002 0x00000009 0x00000003 0x00000003
1418                                         0x00000002 0x00000002 0x00000002 0x00000005
1419                                         0x00000003 0x00000008 0x0000000b 0x000000ff
1420                                         0x00000000 0x00000003 0x00000003 0x00000003
1421                                         0x00000008 0x00000001 0x0000000a 0x0000000b
1422                                         0x00000003 0x00000008 0x00000004 0x00000006
1423                                         0x00000002 0x00000138 0x00000000 0x00000000
1424                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1425                                         0x0007c000 0x00000000 0x00000000 0x00000007
1426                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1427                         };
1428
1429                         emc-table@150000 {
1430                                 reg = <150000>;
1431                                 compatible = "nvidia,tegra20-emc-table";
1432                                 clock-frequency = <150000>;
1433                                 nvidia,emc-registers = <0x00000009 0x00000014
1434                                         0x00000007 0x00000003 0x00000006 0x00000004
1435                                         0x00000002 0x00000009 0x00000003 0x00000003
1436                                         0x00000002 0x00000002 0x00000002 0x00000005
1437                                         0x00000003 0x00000008 0x0000000b 0x0000021f
1438                                         0x00000000 0x00000003 0x00000003 0x00000003
1439                                         0x00000008 0x00000001 0x0000000a 0x00000015
1440                                         0x00000003 0x00000008 0x00000004 0x00000006
1441                                         0x00000002 0x00000270 0x00000000 0x00000001
1442                                         0x00000000 0x00000000 0x00000282 0xa07c04ae
1443                                         0x007e4010 0x00000000 0x00000000 0x0000000e
1444                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1445                         };
1446
1447                         emc-table@300000 {
1448                                 reg = <300000>;
1449                                 compatible = "nvidia,tegra20-emc-table";
1450                                 clock-frequency = <300000>;
1451                                 nvidia,emc-registers = <0x00000012 0x00000027
1452                                         0x0000000d 0x00000006 0x00000007 0x00000005
1453                                         0x00000003 0x00000009 0x00000006 0x00000006
1454                                         0x00000003 0x00000003 0x00000002 0x00000006
1455                                         0x00000003 0x00000009 0x0000000c 0x0000045f
1456                                         0x00000000 0x00000004 0x00000004 0x00000006
1457                                         0x00000008 0x00000001 0x0000000e 0x0000002a
1458                                         0x00000003 0x0000000f 0x00000007 0x00000005
1459                                         0x00000002 0x000004e1 0x00000005 0x00000002
1460                                         0x00000000 0x00000000 0x00000282 0xe059048b
1461                                         0x007e0010 0x00000000 0x00000000 0x0000001b
1462                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1463                         };
1464                 };
1465         };
1466 };
1467
1468 &emc_icc_dvfs_opp_table {
1469         /delete-node/ opp@666000000;
1470         /delete-node/ opp@760000000;
1471 };