arch/arm/boot/dts/tegra20-acer-a500-picasso.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include <dt-bindings/input/gpio-keys.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/thermal/thermal.h>
   7
   8 #include "tegra20.dtsi"
   9 #include "tegra20-cpu-opp.dtsi"
  10 #include "tegra20-cpu-opp-microvolt.dtsi"
  11
  12 / {
  13         model = "Acer Iconia Tab A500";
  14         compatible = "acer,picasso", "nvidia,tegra20";
  15
  16         aliases {
  17                 mmc0 = &sdmmc4; /* eMMC */
  18                 mmc1 = &sdmmc3; /* MicroSD */
  19                 mmc2 = &sdmmc1; /* WiFi */
  20
  21                 rtc0 = &pmic;
  22                 rtc1 = "/rtc@7000e000";
  23
  24                 serial0 = &uartd; /* Docking station */
  25                 serial1 = &uartc; /* Bluetooth */
  26                 serial2 = &uartb; /* GPS */
  27         };
  28
  29         /*
  30          * The decompressor and also some bootloaders rely on a
  31          * pre-existing /chosen node to be available to insert the
  32          * command line and merge other ATAGS info.
  33          */
  34         chosen {};
  35
  36         memory@0 {
  37                 reg = <0x00000000 0x40000000>;
  38         };
  39
  40         reserved-memory {
  41                 #address-cells = <1>;
  42                 #size-cells = <1>;
  43                 ranges;
  44
  45                 ramoops@2ffe0000 {
  46                         compatible = "ramoops";
  47                         reg = <0x2ffe0000 0x10000>;     /* 64kB */
  48                         console-size = <0x8000>;        /* 32kB */
  49                         record-size = <0x400>;          /*  1kB */
  50                         ecc-size = <16>;
  51                 };
  52
  53                 linux,cma@30000000 {
  54                         compatible = "shared-dma-pool";
  55                         alloc-ranges = <0x30000000 0x10000000>;
  56                         size = <0x10000000>; /* 256MiB */
  57                         linux,cma-default;
  58                         reusable;
  59                 };
  60         };
  61
  62         host1x@50000000 {
  63                 dc@54200000 {
  64                         rgb {
  65                                 status = "okay";
  66
  67                                 port@0 {
  68                                         lcd_output: endpoint {
  69                                                 remote-endpoint = <&lvds_encoder_input>;
  70                                                 bus-width = <18>;
  71                                         };
  72                                 };
  73                         };
  74                 };
  75
  76                 hdmi@54280000 {
  77                         status = "okay";
  78
  79                         vdd-supply = <&hdmi_vdd_reg>;
  80                         pll-supply = <&hdmi_pll_reg>;
  81                         hdmi-supply = <&vdd_5v0_sys>;
  82
  83                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  84                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  85                                 GPIO_ACTIVE_HIGH>;
  86                 };
  87         };
  88
  89         pinmux@70000014 {
  90                 pinctrl-names = "default";
  91                 pinctrl-0 = <&state_default>;
  92
  93                 state_default: pinmux {
  94                         ata {
  95                                 nvidia,pins = "ata";
  96                                 nvidia,function = "ide";
  97                         };
  98                         atb {
  99                                 nvidia,pins = "atb", "gma", "gme";
 100                                 nvidia,function = "sdio4";
 101                         };
 102                         atc {
 103                                 nvidia,pins = "atc";
 104                                 nvidia,function = "nand";
 105                         };
 106                         atd {
 107                                 nvidia,pins = "atd", "ate", "gmb", "spia",
 108                                         "spib", "spic";
 109                                 nvidia,function = "gmi";
 110                         };
 111                         cdev1 {
 112                                 nvidia,pins = "cdev1";
 113                                 nvidia,function = "plla_out";
 114                         };
 115                         cdev2 {
 116                                 nvidia,pins = "cdev2";
 117                                 nvidia,function = "pllp_out4";
 118                         };
 119                         crtp {
 120                                 nvidia,pins = "crtp", "lm1";
 121                                 nvidia,function = "crt";
 122                         };
 123                         csus {
 124                                 nvidia,pins = "csus";
 125                                 nvidia,function = "vi_sensor_clk";
 126                         };
 127                         dap1 {
 128                                 nvidia,pins = "dap1";
 129                                 nvidia,function = "dap1";
 130                         };
 131                         dap2 {
 132                                 nvidia,pins = "dap2";
 133                                 nvidia,function = "dap2";
 134                         };
 135                         dap3 {
 136                                 nvidia,pins = "dap3";
 137                                 nvidia,function = "dap3";
 138                         };
 139                         dap4 {
 140                                 nvidia,pins = "dap4";
 141                                 nvidia,function = "dap4";
 142                         };
 143                         dta {
 144                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
 145                                 nvidia,function = "vi";
 146                         };
 147                         dtf {
 148                                 nvidia,pins = "dtf";
 149                                 nvidia,function = "i2c3";
 150                         };
 151                         gmc {
 152                                 nvidia,pins = "gmc";
 153                                 nvidia,function = "uartd";
 154                         };
 155                         gmd {
 156                                 nvidia,pins = "gmd";
 157                                 nvidia,function = "sflash";
 158                         };
 159                         gpu {
 160                                 nvidia,pins = "gpu";
 161                                 nvidia,function = "pwm";
 162                         };
 163                         gpu7 {
 164                                 nvidia,pins = "gpu7";
 165                                 nvidia,function = "rtck";
 166                         };
 167                         gpv {
 168                                 nvidia,pins = "gpv", "slxa";
 169                                 nvidia,function = "pcie";
 170                         };
 171                         hdint {
 172                                 nvidia,pins = "hdint";
 173                                 nvidia,function = "hdmi";
 174                         };
 175                         i2cp {
 176                                 nvidia,pins = "i2cp";
 177                                 nvidia,function = "i2cp";
 178                         };
 179                         irrx {
 180                                 nvidia,pins = "irrx", "irtx";
 181                                 nvidia,function = "uartb";
 182                         };
 183                         kbca {
 184                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 185                                         "kbce", "kbcf";
 186                                 nvidia,function = "kbc";
 187                         };
 188                         lcsn {
 189                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
 190                                         "lsdi", "lvp0";
 191                                 nvidia,function = "rsvd4";
 192                         };
 193                         ld0 {
 194                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 195                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 196                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 197                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 198                                         "lhp1", "lhp2", "lhs", "lpp", "lsc0",
 199                                         "lsc1", "lsck", "lsda", "lspi", "lvp1",
 200                                         "lvs";
 201                                 nvidia,function = "displaya";
 202                         };
 203                         owc {
 204                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
 205                                 nvidia,function = "rsvd2";
 206                         };
 207                         pmc {
 208                                 nvidia,pins = "pmc";
 209                                 nvidia,function = "pwr_on";
 210                         };
 211                         rm {
 212                                 nvidia,pins = "rm";
 213                                 nvidia,function = "i2c1";
 214                         };
 215                         sdb {
 216                                 nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk";
 217                                 nvidia,function = "sdio3";
 218                         };
 219                         sdio1 {
 220                                 nvidia,pins = "sdio1";
 221                                 nvidia,function = "sdio1";
 222                         };
 223                         slxd {
 224                                 nvidia,pins = "slxd";
 225                                 nvidia,function = "spdif";
 226                         };
 227                         spid {
 228                                 nvidia,pins = "spid", "spie", "spif";
 229                                 nvidia,function = "spi1";
 230                         };
 231                         spig {
 232                                 nvidia,pins = "spig", "spih";
 233                                 nvidia,function = "spi2_alt";
 234                         };
 235                         uaa {
 236                                 nvidia,pins = "uaa", "uab", "uda";
 237                                 nvidia,function = "ulpi";
 238                         };
 239                         uad {
 240                                 nvidia,pins = "uad";
 241                                 nvidia,function = "irda";
 242                         };
 243                         uca {
 244                                 nvidia,pins = "uca", "ucb";
 245                                 nvidia,function = "uartc";
 246                         };
 247                         conf_ata {
 248                                 nvidia,pins = "ata", "atb", "atc", "atd",
 249                                         "cdev1", "cdev2", "csus", "dap1",
 250                                         "dap4", "dte", "dtf", "gma", "gmc",
 251                                         "gme", "gpu", "gpu7", "gpv", "i2cp",
 252                                         "irrx", "irtx", "pta", "rm",
 253                                         "sdc", "sdd", "slxc", "slxd", "slxk",
 254                                         "spdi", "spdo", "uac", "uad", "uda";
 255                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 256                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 257                         };
 258                         conf_ate {
 259                                 nvidia,pins = "ate", "dap2", "dap3",
 260                                         "gmd", "owc", "spia", "spib", "spic",
 261                                         "spid", "spie";
 262                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 263                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 264                         };
 265                         conf_ck32 {
 266                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 267                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 268                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 269                         };
 270                         conf_crtp {
 271                                 nvidia,pins = "crtp", "gmb", "slxa", "spig",
 272                                         "spih";
 273                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 274                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 275                         };
 276                         conf_dta {
 277                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "kbcb";
 278                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 279                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 280                         };
 281                         conf_dte {
 282                                 nvidia,pins = "spif";
 283                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 284                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 285                         };
 286                         conf_hdint {
 287                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 288                                         "lpw1", "lsck", "lsda", "lsdi",
 289                                         "lvp0";
 290                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 291                         };
 292                         conf_kbca {
 293                                 nvidia,pins = "kbca", "kbcc", "kbcd",
 294                                         "kbce", "kbcf", "sdio1", "uaa",
 295                                         "uab", "uca", "ucb";
 296                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 297                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 298                         };
 299                         conf_lc {
 300                                 nvidia,pins = "lc", "ls";
 301                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 302                         };
 303                         conf_ld0 {
 304                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 305                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 306                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 307                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 308                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
 309                                         "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
 310                                         "lvp1", "lvs", "pmc", "sdb";
 311                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 312                         };
 313                         conf_ld17_0 {
 314                                 nvidia,pins = "ld17_0";
 315                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 316                         };
 317                         drive_ddc {
 318                                 nvidia,pins = "drive_ddc",
 319                                                 "drive_vi1",
 320                                                 "drive_sdio1";
 321                                 nvidia,pull-up-strength = <31>;
 322                                 nvidia,pull-down-strength = <31>;
 323                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
 324                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 325                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 326                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 327                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 328                         };
 329                         drive_dbg {
 330                                 nvidia,pins = "drive_dbg",
 331                                                 "drive_vi2",
 332                                                 "drive_at1",
 333                                                 "drive_ao1";
 334                                 nvidia,pull-up-strength = <31>;
 335                                 nvidia,pull-down-strength = <31>;
 336                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
 337                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 338                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 339                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 340                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 341                         };
 342                 };
 343
 344                 state_i2cmux_ddc: pinmux_i2cmux_ddc {
 345                         ddc {
 346                                 nvidia,pins = "ddc";
 347                                 nvidia,function = "i2c2";
 348                         };
 349                         pta {
 350                                 nvidia,pins = "pta";
 351                                 nvidia,function = "rsvd4";
 352                         };
 353                 };
 354
 355                 state_i2cmux_pta: pinmux_i2cmux_pta {
 356                         ddc {
 357                                 nvidia,pins = "ddc";
 358                                 nvidia,function = "rsvd4";
 359                         };
 360                         pta {
 361                                 nvidia,pins = "pta";
 362                                 nvidia,function = "i2c2";
 363                         };
 364                 };
 365
 366                 state_i2cmux_idle: pinmux_i2cmux_idle {
 367                         ddc {
 368                                 nvidia,pins = "ddc";
 369                                 nvidia,function = "rsvd4";
 370                         };
 371                         pta {
 372                                 nvidia,pins = "pta";
 373                                 nvidia,function = "rsvd4";
 374                         };
 375                 };
 376         };
 377
 378         tegra_i2s1: i2s@70002800 {
 379                 status = "okay";
 380         };
 381
 382         uartb: serial@70006040 {
 383                 compatible = "nvidia,tegra20-hsuart";
 384                 /* GPS BCM4751 */
 385         };
 386
 387         uartc: serial@70006200 {
 388                 compatible = "nvidia,tegra20-hsuart";
 389                 status = "okay";
 390
 391                 /* Azurewave AW-NH665 BCM4329B1 */
 392                 bluetooth {
 393                         compatible = "brcm,bcm4329-bt";
 394
 395                         /* PLLP 216MHz / 16 / 4 */
 396                         max-speed = <3375000>;
 397
 398                         clocks = <&rtc_32k_wifi>;
 399                         clock-names = "txco";
 400
 401                         vbat-supply  = <&vdd_3v3_sys>;
 402                         vddio-supply = <&vdd_1v8_sys>;
 403
 404                         device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
 405                         host-wakeup-gpios =   <&gpio TEGRA_GPIO(U, 6) GPIO_ACTIVE_HIGH>;
 406                         shutdown-gpios =      <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
 407                 };
 408         };
 409
 410         uartd: serial@70006300 {
 411                 /* Docking station */
 412         };
 413
 414         i2c@7000c000 {
 415                 clock-frequency = <400000>;
 416                 status = "okay";
 417
 418                 wm8903: audio-codec@1a {
 419                         compatible = "wlf,wm8903";
 420                         reg = <0x1a>;
 421
 422                         interrupt-parent = <&gpio>;
 423                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
 424
 425                         gpio-controller;
 426                         #gpio-cells = <2>;
 427
 428                         gpio-cfg = <
 429                                 0x0000 /* MIC_LR_OUT#    GPIO, output, low */
 430                                 0x0000 /* FM2018-enable  GPIO, output, low */
 431                                 0x0000 /* Speaker-enable GPIO, output, low */
 432                                 0x0200 /* Interrupt, output */
 433                                 0x01a0 /* BCLK, input, active high */
 434                         >;
 435
 436                         AVDD-supply  = <&vdd_1v8_sys>;
 437                         CPVDD-supply = <&vdd_1v8_sys>;
 438                         DBVDD-supply = <&vdd_1v8_sys>;
 439                         DCVDD-supply = <&vdd_1v8_sys>;
 440                 };
 441
 442                 touchscreen@4c {
 443                         compatible = "atmel,maxtouch";
 444                         reg = <0x4c>;
 445
 446                         interrupt-parent = <&gpio>;
 447                         interrupts = <TEGRA_GPIO(V, 6) IRQ_TYPE_LEVEL_LOW>;
 448
 449                         reset-gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
 450
 451                         avdd-supply = <&vdd_3v3_sys>;
 452                         vdd-supply  = <&vdd_3v3_sys>;
 453                 };
 454
 455                 gyroscope@68 {
 456                         compatible = "invensense,mpu3050";
 457                         reg = <0x68>;
 458
 459                         interrupt-parent = <&gpio>;
 460                         interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_EDGE_RISING>;
 461
 462                         vdd-supply    = <&vdd_3v3_sys>;
 463                         vlogic-supply = <&vdd_1v8_sys>;
 464
 465                         mount-matrix =   "0",  "1",  "0",
 466                                          "1",  "0",  "0",
 467                                          "0",  "0", "-1";
 468
 469                         i2c-gate {
 470                                 #address-cells = <1>;
 471                                 #size-cells = <0>;
 472
 473                                 accelerometer@f {
 474                                         compatible = "kionix,kxtf9";
 475                                         reg = <0x0f>;
 476
 477                                         interrupt-parent = <&gpio>;
 478                                         interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>;
 479
 480                                         mount-matrix =   "0",  "1",  "0",
 481                                                          "1",  "0",  "0",
 482                                                          "0",  "0", "-1";
 483                                 };
 484                         };
 485                 };
 486         };
 487
 488         i2c@7000c400 {
 489                 clock-frequency = <10000>;
 490                 status = "okay";
 491         };
 492
 493         i2cmux {
 494                 compatible = "i2c-mux-pinctrl";
 495                 #address-cells = <1>;
 496                 #size-cells = <0>;
 497
 498                 i2c-parent = <&{/i2c@7000c400}>;
 499
 500                 pinctrl-names = "ddc", "pta", "idle";
 501                 pinctrl-0 = <&state_i2cmux_ddc>;
 502                 pinctrl-1 = <&state_i2cmux_pta>;
 503                 pinctrl-2 = <&state_i2cmux_idle>;
 504
 505                 hdmi_ddc: i2c@0 {
 506                         reg = <0>;
 507                         #address-cells = <1>;
 508                         #size-cells = <0>;
 509                 };
 510
 511                 panel_ddc: i2c@1 {
 512                         reg = <1>;
 513                         #address-cells = <1>;
 514                         #size-cells = <0>;
 515                 };
 516         };
 517
 518         pwm: pwm@7000a000 {
 519                 status = "okay";
 520         };
 521
 522         i2c@7000d000 {
 523                 clock-frequency = <100000>;
 524                 status = "okay";
 525
 526                 magnetometer@c {
 527                         compatible = "ak,ak8975";
 528                         reg = <0x0c>;
 529
 530                         interrupt-parent = <&gpio>;
 531                         interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_EDGE_RISING>;
 532
 533                         vdd-supply = <&vdd_3v3_sys>;
 534                         vid-supply = <&vdd_1v8_sys>;
 535
 536                         mount-matrix =  "1",  "0",  "0",
 537                                         "0", "-1",  "0",
 538                                         "0",  "0", "-1";
 539                 };
 540
 541                 pmic: pmic@34 {
 542                         compatible = "ti,tps6586x";
 543                         reg = <0x34>;
 544
 545                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 546
 547                         #gpio-cells = <2>;
 548                         gpio-controller;
 549
 550                         sys-supply       = <&vdd_5v0_sys>;
 551                         vin-sm0-supply   = <&sys_reg>;
 552                         vin-sm1-supply   = <&sys_reg>;
 553                         vin-sm2-supply   = <&sys_reg>;
 554                         vinldo01-supply  = <&sm2_reg>;
 555                         vinldo23-supply  = <&sm2_reg>;
 556                         vinldo4-supply   = <&sm2_reg>;
 557                         vinldo678-supply = <&sm2_reg>;
 558                         vinldo9-supply   = <&sm2_reg>;
 559
 560                         regulators {
 561                                 sys_reg: sys {
 562                                         regulator-name = "vdd_sys";
 563                                         regulator-always-on;
 564                                 };
 565
 566                                 vdd_core: sm0 {
 567                                         regulator-name = "vdd_sm0,vdd_core";
 568                                         regulator-min-microvolt = <1200000>;
 569                                         regulator-max-microvolt = <1300000>;
 570                                         regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
 571                                         regulator-coupled-max-spread = <170000 550000>;
 572                                         regulator-always-on;
 573                                         regulator-boot-on;
 574
 575                                         nvidia,tegra-core-regulator;
 576                                 };
 577
 578                                 vdd_cpu: sm1 {
 579                                         regulator-name = "vdd_sm1,vdd_cpu";
 580                                         regulator-min-microvolt = <750000>;
 581                                         regulator-max-microvolt = <1125000>;
 582                                         regulator-coupled-with = <&vdd_core &rtc_vdd>;
 583                                         regulator-coupled-max-spread = <550000 550000>;
 584                                         regulator-always-on;
 585                                         regulator-boot-on;
 586
 587                                         nvidia,tegra-cpu-regulator;
 588                                 };
 589
 590                                 sm2_reg: sm2 {
 591                                         regulator-name = "vdd_sm2,vin_ldo*";
 592                                         regulator-min-microvolt = <3700000>;
 593                                         regulator-max-microvolt = <3700000>;
 594                                         regulator-always-on;
 595                                 };
 596
 597                                 /* LDO0 is not connected to anything */
 598
 599                                 ldo1 {
 600                                         regulator-name = "vdd_ldo1,avdd_pll*";
 601                                         regulator-min-microvolt = <1100000>;
 602                                         regulator-max-microvolt = <1100000>;
 603                                         regulator-always-on;
 604                                         regulator-boot-on;
 605                                 };
 606
 607                                 rtc_vdd: ldo2 {
 608                                         regulator-name = "vdd_ldo2,vdd_rtc";
 609                                         regulator-min-microvolt = <1200000>;
 610                                         regulator-max-microvolt = <1300000>;
 611                                         regulator-coupled-with = <&vdd_core &vdd_cpu>;
 612                                         regulator-coupled-max-spread = <170000 550000>;
 613                                         regulator-always-on;
 614                                         regulator-boot-on;
 615
 616                                         nvidia,tegra-rtc-regulator;
 617                                 };
 618
 619                                 ldo3 {
 620                                         regulator-name = "vdd_ldo3,avdd_usb*";
 621                                         regulator-min-microvolt = <3300000>;
 622                                         regulator-max-microvolt = <3300000>;
 623                                         regulator-always-on;
 624                                 };
 625
 626                                 ldo4 {
 627                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 628                                         regulator-min-microvolt = <1800000>;
 629                                         regulator-max-microvolt = <1800000>;
 630                                         regulator-always-on;
 631                                         regulator-boot-on;
 632                                 };
 633
 634                                 vcore_emmc: ldo5 {
 635                                         regulator-name = "vdd_ldo5,vcore_mmc";
 636                                         regulator-min-microvolt = <2850000>;
 637                                         regulator-max-microvolt = <2850000>;
 638                                         regulator-always-on;
 639                                 };
 640
 641                                 avdd_vdac_reg: ldo6 {
 642                                         regulator-name = "vdd_ldo6,avdd_vdac";
 643                                         regulator-min-microvolt = <2850000>;
 644                                         regulator-max-microvolt = <2850000>;
 645                                 };
 646
 647                                 hdmi_vdd_reg: ldo7 {
 648                                         regulator-name = "vdd_ldo7,avdd_hdmi";
 649                                         regulator-min-microvolt = <3300000>;
 650                                         regulator-max-microvolt = <3300000>;
 651                                 };
 652
 653                                 hdmi_pll_reg: ldo8 {
 654                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 655                                         regulator-min-microvolt = <1800000>;
 656                                         regulator-max-microvolt = <1800000>;
 657                                 };
 658
 659                                 ldo9 {
 660                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 661                                         regulator-min-microvolt = <2850000>;
 662                                         regulator-max-microvolt = <2850000>;
 663                                         regulator-always-on;
 664                                         regulator-boot-on;
 665                                 };
 666
 667                                 ldo_rtc {
 668                                         regulator-name = "vdd_rtc_out,vdd_cell";
 669                                         regulator-min-microvolt = <3300000>;
 670                                         regulator-max-microvolt = <3300000>;
 671                                         regulator-always-on;
 672                                         regulator-boot-on;
 673                                 };
 674                         };
 675                 };
 676
 677                 nct1008: temperature-sensor@4c {
 678                         compatible = "onnn,nct1008";
 679                         reg = <0x4c>;
 680                         vcc-supply = <&vdd_3v3_sys>;
 681                         #thermal-sensor-cells = <1>;
 682                 };
 683         };
 684
 685         pmc@7000e400 {
 686                 nvidia,invert-interrupt;
 687                 nvidia,suspend-mode = <1>;
 688                 nvidia,cpu-pwr-good-time = <2000>;
 689                 nvidia,cpu-pwr-off-time = <100>;
 690                 nvidia,core-pwr-good-time = <3845 3845>;
 691                 nvidia,core-pwr-off-time = <458>;
 692                 nvidia,sys-clock-req-active-high;
 693         };
 694
 695         usb@c5000000 {
 696                 compatible = "nvidia,tegra20-udc";
 697                 status = "okay";
 698                 dr_mode = "peripheral";
 699         };
 700
 701         usb-phy@c5000000 {
 702                 status = "okay";
 703                 dr_mode = "peripheral";
 704                 nvidia,xcvr-setup-use-fuses;
 705                 nvidia,xcvr-lsfslew = <2>;
 706                 nvidia,xcvr-lsrslew = <2>;
 707                 vbus-supply = <&vdd_vbus1>;
 708         };
 709
 710         usb@c5008000 {
 711                 status = "okay";
 712         };
 713
 714         usb-phy@c5008000 {
 715                 status = "okay";
 716                 nvidia,xcvr-setup-use-fuses;
 717                 nvidia,xcvr-lsfslew = <2>;
 718                 nvidia,xcvr-lsrslew = <2>;
 719                 vbus-supply = <&vdd_vbus3>;
 720         };
 721
 722         brcm_wifi_pwrseq: wifi-pwrseq {
 723                 compatible = "mmc-pwrseq-simple";
 724
 725                 clocks = <&rtc_32k_wifi>;
 726                 clock-names = "ext_clock";
 727
 728                 reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
 729                 post-power-on-delay-ms = <300>;
 730                 power-off-delay-us = <300>;
 731         };
 732
 733         sdmmc1: mmc@c8000000 {
 734                 status = "okay";
 735
 736                 #address-cells = <1>;
 737                 #size-cells = <0>;
 738
 739                 assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
 740                 assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
 741                 assigned-clock-rates = <50000000>;
 742
 743                 max-frequency = <50000000>;
 744                 keep-power-in-suspend;
 745                 bus-width = <4>;
 746                 non-removable;
 747
 748                 mmc-pwrseq = <&brcm_wifi_pwrseq>;
 749                 vmmc-supply = <&vdd_3v3_sys>;
 750                 vqmmc-supply = <&vdd_3v3_sys>;
 751
 752                 /* Azurewave AW-NH611 BCM4329 */
 753                 wifi@1 {
 754                         reg = <1>;
 755                         compatible = "brcm,bcm4329-fmac";
 756                         interrupt-parent = <&gpio>;
 757                         interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
 758                         interrupt-names = "host-wake";
 759                 };
 760         };
 761
 762         sdmmc3: mmc@c8000400 {
 763                 status = "okay";
 764                 bus-width = <4>;
 765                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 766                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
 767                 vmmc-supply = <&vdd_3v3_sys>;
 768                 vqmmc-supply = <&vdd_3v3_sys>;
 769         };
 770
 771         sdmmc4: mmc@c8000600 {
 772                 status = "okay";
 773                 bus-width = <8>;
 774                 vmmc-supply = <&vcore_emmc>;
 775                 vqmmc-supply = <&vdd_3v3_sys>;
 776                 non-removable;
 777         };
 778
 779         mains: ac-adapter-detect {
 780                 compatible = "gpio-charger";
 781                 charger-type = "mains";
 782                 gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
 783         };
 784
 785         backlight: backlight {
 786                 compatible = "pwm-backlight";
 787
 788                 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
 789                 power-supply = <&vdd_3v3_sys>;
 790                 pwms = <&pwm 2 41667>;
 791
 792                 brightness-levels = <7 255>;
 793                 num-interpolated-steps = <248>;
 794                 default-brightness-level = <20>;
 795         };
 796
 797         /* PMIC has a built-in 32KHz oscillator which is used by PMC */
 798         clk32k_in: clock@0 {
 799                 compatible = "fixed-clock";
 800                 #clock-cells = <0>;
 801                 clock-frequency = <32768>;
 802                 clock-output-names = "tps658621-out32k";
 803         };
 804
 805         /*
 806          * This standalone onboard fixed-clock always-ON 32KHz
 807          * oscillator is used as a reference clock-source by the
 808          * Azurewave WiFi/BT module.
 809          */
 810         rtc_32k_wifi: clock@1 {
 811                 compatible = "fixed-clock";
 812                 #clock-cells = <0>;
 813                 clock-frequency = <32768>;
 814                 clock-output-names = "kk3270032";
 815         };
 816
 817         cpus {
 818                 cpu0: cpu@0 {
 819                         cpu-supply = <&vdd_cpu>;
 820                         operating-points-v2 = <&cpu0_opp_table>;
 821                         #cooling-cells = <2>;
 822                 };
 823
 824                 cpu@1 {
 825                         cpu-supply = <&vdd_cpu>;
 826                         operating-points-v2 = <&cpu0_opp_table>;
 827                 };
 828         };
 829
 830         display-panel {
 831                 compatible = "auo,b101ew05", "panel-lvds";
 832
 833                 ddc-i2c-bus = <&panel_ddc>;
 834                 power-supply = <&vdd_pnl>;
 835                 backlight = <&backlight>;
 836
 837                 width-mm = <218>;
 838                 height-mm = <135>;
 839
 840                 data-mapping = "jeida-18";
 841
 842                 panel-timing {
 843                         clock-frequency = <71200000>;
 844                         hactive = <1280>;
 845                         vactive = <800>;
 846                         hfront-porch = <8>;
 847                         hback-porch = <18>;
 848                         hsync-len = <184>;
 849                         vsync-len = <3>;
 850                         vfront-porch = <4>;
 851                         vback-porch = <8>;
 852                 };
 853
 854                 port {
 855                         panel_input: endpoint {
 856                                 remote-endpoint = <&lvds_encoder_output>;
 857                         };
 858                 };
 859         };
 860
 861         gpio-keys {
 862                 compatible = "gpio-keys";
 863
 864                 power {
 865                         label = "Power";
 866                         gpios = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
 867                         linux,code = <KEY_POWER>;
 868                         debounce-interval = <10>;
 869                         wakeup-event-action = <EV_ACT_ASSERTED>;
 870                         wakeup-source;
 871                 };
 872
 873                 rotation-lock {
 874                         label = "Rotate-lock";
 875                         gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_HIGH>;
 876                         linux,code = <SW_ROTATE_LOCK>;
 877                         linux,input-type = <EV_SW>;
 878                         debounce-interval = <10>;
 879                 };
 880
 881                 volume-up {
 882                         label = "Volume Up";
 883                         gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
 884                         linux,code = <KEY_VOLUMEUP>;
 885                         debounce-interval = <10>;
 886                         wakeup-event-action = <EV_ACT_ASSERTED>;
 887                         wakeup-source;
 888                 };
 889
 890                 volume-down {
 891                         label = "Volume Down";
 892                         gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
 893                         linux,code = <KEY_VOLUMEDOWN>;
 894                         debounce-interval = <10>;
 895                         wakeup-event-action = <EV_ACT_ASSERTED>;
 896                         wakeup-source;
 897                 };
 898         };
 899
 900         haptic-feedback {
 901                 compatible = "gpio-vibrator";
 902                 enable-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
 903                 vcc-supply = <&vdd_3v3_sys>;
 904         };
 905
 906         lvds-encoder {
 907                 compatible = "ti,sn75lvds83", "lvds-encoder";
 908
 909                 powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
 910
 911                 ports {
 912                         #address-cells = <1>;
 913                         #size-cells = <0>;
 914
 915                         port@0 {
 916                                 reg = <0>;
 917
 918                                 lvds_encoder_input: endpoint {
 919                                         remote-endpoint = <&lcd_output>;
 920                                 };
 921                         };
 922
 923                         port@1 {
 924                                 reg = <1>;
 925
 926                                 lvds_encoder_output: endpoint {
 927                                         remote-endpoint = <&panel_input>;
 928                                 };
 929                         };
 930                 };
 931         };
 932
 933         vdd_5v0_sys: regulator@0 {
 934                 compatible = "regulator-fixed";
 935                 regulator-name = "vdd_5v0";
 936                 regulator-min-microvolt = <5000000>;
 937                 regulator-max-microvolt = <5000000>;
 938                 regulator-always-on;
 939         };
 940
 941         vdd_3v3_sys: regulator@1 {
 942                 compatible = "regulator-fixed";
 943                 regulator-name = "vdd_3v3_vs";
 944                 regulator-min-microvolt = <3300000>;
 945                 regulator-max-microvolt = <3300000>;
 946                 regulator-always-on;
 947                 vin-supply = <&vdd_5v0_sys>;
 948         };
 949
 950         vdd_1v8_sys: regulator@2 {
 951                 compatible = "regulator-fixed";
 952                 regulator-name = "vdd_1v8_vs";
 953                 regulator-min-microvolt = <1800000>;
 954                 regulator-max-microvolt = <1800000>;
 955                 regulator-always-on;
 956                 vin-supply = <&vdd_5v0_sys>;
 957         };
 958
 959         vdd_pnl: regulator@3 {
 960                 compatible = "regulator-fixed";
 961                 regulator-name = "vdd_panel";
 962                 regulator-min-microvolt = <3300000>;
 963                 regulator-max-microvolt = <3300000>;
 964                 regulator-enable-ramp-delay = <300000>;
 965                 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
 966                 enable-active-high;
 967                 vin-supply = <&vdd_5v0_sys>;
 968         };
 969
 970         vdd_vbus1: regulator@4 {
 971                 compatible = "regulator-fixed";
 972                 regulator-name = "vdd_usb1_vbus";
 973                 regulator-min-microvolt = <5000000>;
 974                 regulator-max-microvolt = <5000000>;
 975                 regulator-always-on;
 976                 gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 977                 enable-active-high;
 978                 vin-supply = <&vdd_5v0_sys>;
 979         };
 980
 981         vdd_vbus3: regulator@5 {
 982                 compatible = "regulator-fixed";
 983                 regulator-name = "vdd_usb3_vbus";
 984                 regulator-min-microvolt = <5000000>;
 985                 regulator-max-microvolt = <5000000>;
 986                 regulator-always-on;
 987                 gpio = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
 988                 enable-active-high;
 989                 vin-supply = <&vdd_5v0_sys>;
 990         };
 991
 992         sound {
 993                 compatible = "nvidia,tegra-audio-wm8903-picasso",
 994                              "nvidia,tegra-audio-wm8903";
 995                 nvidia,model = "Acer Iconia Tab A500 WM8903";
 996
 997                 nvidia,audio-routing =
 998                         "Headphone Jack", "HPOUTR",
 999                         "Headphone Jack", "HPOUTL",
1000                         "Int Spk", "LINEOUTL",
1001                         "Int Spk", "LINEOUTR",
1002                         "Mic Jack", "MICBIAS",
1003                         "IN2L", "Mic Jack",
1004                         "IN2R", "Mic Jack",
1005                         "IN1L", "Int Mic",
1006                         "IN1R", "Int Mic";
1007
1008                 nvidia,i2s-controller = <&tegra_i2s1>;
1009                 nvidia,audio-codec = <&wm8903>;
1010
1011                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
1012                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
1013                 nvidia,int-mic-en-gpios = <&wm8903 1 GPIO_ACTIVE_HIGH>;
1014                 nvidia,headset;
1015
1016                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
1017                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
1018                          <&tegra_car TEGRA20_CLK_CDEV1>;
1019                 clock-names = "pll_a", "pll_a_out0", "mclk";
1020         };
1021
1022         thermal-zones {
1023                 nct1008-local {
1024                         polling-delay-passive = <1000>; /* milliseconds */
1025                         polling-delay = <0>; /* milliseconds */
1026
1027                         thermal-sensors = <&nct1008 0>;
1028                 };
1029
1030                 nct1008-remote {
1031                         polling-delay-passive = <1000>; /* milliseconds */
1032                         polling-delay = <5000>; /* milliseconds */
1033
1034                         thermal-sensors = <&nct1008 1>;
1035
1036                         trips {
1037                                 trip0: cpu-alert0 {
1038                                         /* start throttling at 50C */
1039                                         temperature = <50000>;
1040                                         hysteresis = <3000>;
1041                                         type = "passive";
1042                                 };
1043
1044                                 trip1: cpu-crit {
1045                                         /* shut down at 60C */
1046                                         temperature = <60000>;
1047                                         hysteresis = <2000>;
1048                                         type = "critical";
1049                                 };
1050                         };
1051
1052                         cooling-maps {
1053                                 map0 {
1054                                         trip = <&trip0>;
1055                                         cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1056                                 };
1057                         };
1058                 };
1059         };
1060
1061         memory-controller@7000f400 {
1062                 nvidia,use-ram-code;
1063
1064                 emc-tables@0 {
1065                         nvidia,ram-code = <0>; /* elpida-8gb */
1066
1067                         #address-cells = <1>;
1068                         #size-cells = <0>;
1069
1070                         emc-table@25000 {
1071                                 reg = <25000>;
1072                                 compatible = "nvidia,tegra20-emc-table";
1073                                 clock-frequency = <25000>;
1074                                 nvidia,emc-registers = <0x00000002 0x00000006
1075                                         0x00000003 0x00000003 0x00000006 0x00000004
1076                                         0x00000002 0x00000009 0x00000003 0x00000003
1077                                         0x00000002 0x00000002 0x00000002 0x00000004
1078                                         0x00000003 0x00000008 0x0000000b 0x0000004d
1079                                         0x00000000 0x00000003 0x00000003 0x00000003
1080                                         0x00000008 0x00000001 0x0000000a 0x00000004
1081                                         0x00000003 0x00000008 0x00000004 0x00000006
1082                                         0x00000002 0x00000068 0x00000000 0x00000003
1083                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1084                                         0x00070000 0x00000000 0x00000000 0x00000003
1085                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1086                         };
1087
1088                         emc-table@50000 {
1089                                 reg = <50000>;
1090                                 compatible = "nvidia,tegra20-emc-table";
1091                                 clock-frequency = <50000>;
1092                                 nvidia,emc-registers = <0x00000003 0x00000007
1093                                         0x00000003 0x00000003 0x00000006 0x00000004
1094                                         0x00000002 0x00000009 0x00000003 0x00000003
1095                                         0x00000002 0x00000002 0x00000002 0x00000005
1096                                         0x00000003 0x00000008 0x0000000b 0x0000009f
1097                                         0x00000000 0x00000003 0x00000003 0x00000003
1098                                         0x00000008 0x00000001 0x0000000a 0x00000007
1099                                         0x00000003 0x00000008 0x00000004 0x00000006
1100                                         0x00000002 0x000000d0 0x00000000 0x00000000
1101                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1102                                         0x00070000 0x00000000 0x00000000 0x00000005
1103                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1104                         };
1105
1106                         emc-table@75000 {
1107                                 reg = <75000>;
1108                                 compatible = "nvidia,tegra20-emc-table";
1109                                 clock-frequency = <75000>;
1110                                 nvidia,emc-registers = <0x00000005 0x0000000a
1111                                         0x00000004 0x00000003 0x00000006 0x00000004
1112                                         0x00000002 0x00000009 0x00000003 0x00000003
1113                                         0x00000002 0x00000002 0x00000002 0x00000005
1114                                         0x00000003 0x00000008 0x0000000b 0x000000ff
1115                                         0x00000000 0x00000003 0x00000003 0x00000003
1116                                         0x00000008 0x00000001 0x0000000a 0x0000000b
1117                                         0x00000003 0x00000008 0x00000004 0x00000006
1118                                         0x00000002 0x00000138 0x00000000 0x00000000
1119                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1120                                         0x00070000 0x00000000 0x00000000 0x00000007
1121                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1122                         };
1123
1124                         emc-table@150000 {
1125                                 reg = <150000>;
1126                                 compatible = "nvidia,tegra20-emc-table";
1127                                 clock-frequency = <150000>;
1128                                 nvidia,emc-registers = <0x00000009 0x00000014
1129                                         0x00000007 0x00000003 0x00000006 0x00000004
1130                                         0x00000002 0x00000009 0x00000003 0x00000003
1131                                         0x00000002 0x00000002 0x00000002 0x00000005
1132                                         0x00000003 0x00000008 0x0000000b 0x0000021f
1133                                         0x00000000 0x00000003 0x00000003 0x00000003
1134                                         0x00000008 0x00000001 0x0000000a 0x00000015
1135                                         0x00000003 0x00000008 0x00000004 0x00000006
1136                                         0x00000002 0x00000270 0x00000000 0x00000001
1137                                         0x00000000 0x00000000 0x00000282 0xa07c04ae
1138                                         0x007dd510 0x00000000 0x00000000 0x0000000e
1139                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1140                         };
1141
1142                         emc-table@300000 {
1143                                 reg = <300000>;
1144                                 compatible = "nvidia,tegra20-emc-table";
1145                                 clock-frequency = <300000>;
1146                                 nvidia,emc-registers = <0x00000012 0x00000027
1147                                         0x0000000d 0x00000006 0x00000007 0x00000005
1148                                         0x00000003 0x00000009 0x00000006 0x00000006
1149                                         0x00000003 0x00000003 0x00000002 0x00000006
1150                                         0x00000003 0x00000009 0x0000000c 0x0000045f
1151                                         0x00000000 0x00000004 0x00000004 0x00000006
1152                                         0x00000008 0x00000001 0x0000000e 0x0000002a
1153                                         0x00000003 0x0000000f 0x00000007 0x00000005
1154                                         0x00000002 0x000004e1 0x00000005 0x00000002
1155                                         0x00000000 0x00000000 0x00000282 0xe059048b
1156                                         0x007e1510 0x00000000 0x00000000 0x0000001b
1157                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1158                         };
1159                 };
1160
1161                 emc-tables@1 {
1162                         nvidia,ram-code = <1>; /* elpida-4gb */
1163
1164                         #address-cells = <1>;
1165                         #size-cells = <0>;
1166
1167                         emc-table@25000 {
1168                                 reg = <25000>;
1169                                 compatible = "nvidia,tegra20-emc-table";
1170                                 clock-frequency = <25000>;
1171                                 nvidia,emc-registers = <0x00000002 0x00000006
1172                                         0x00000003 0x00000003 0x00000006 0x00000004
1173                                         0x00000002 0x00000009 0x00000003 0x00000003
1174                                         0x00000002 0x00000002 0x00000002 0x00000004
1175                                         0x00000003 0x00000008 0x0000000b 0x0000004d
1176                                         0x00000000 0x00000003 0x00000003 0x00000003
1177                                         0x00000008 0x00000001 0x0000000a 0x00000004
1178                                         0x00000003 0x00000008 0x00000004 0x00000006
1179                                         0x00000002 0x00000068 0x00000000 0x00000003
1180                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1181                                         0x0007c000 0x00000000 0x00000000 0x00000003
1182                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1183                         };
1184
1185                         emc-table@50000 {
1186                                 reg = <50000>;
1187                                 compatible = "nvidia,tegra20-emc-table";
1188                                 clock-frequency = <50000>;
1189                                 nvidia,emc-registers = <0x00000003 0x00000007
1190                                         0x00000003 0x00000003 0x00000006 0x00000004
1191                                         0x00000002 0x00000009 0x00000003 0x00000003
1192                                         0x00000002 0x00000002 0x00000002 0x00000005
1193                                         0x00000003 0x00000008 0x0000000b 0x0000009f
1194                                         0x00000000 0x00000003 0x00000003 0x00000003
1195                                         0x00000008 0x00000001 0x0000000a 0x00000007
1196                                         0x00000003 0x00000008 0x00000004 0x00000006
1197                                         0x00000002 0x000000d0 0x00000000 0x00000000
1198                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1199                                         0x0007c000 0x00000000 0x00000000 0x00000005
1200                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1201                         };
1202
1203                         emc-table@75000 {
1204                                 reg = <75000>;
1205                                 compatible = "nvidia,tegra20-emc-table";
1206                                 clock-frequency = <75000>;
1207                                 nvidia,emc-registers = <0x00000005 0x0000000a
1208                                         0x00000004 0x00000003 0x00000006 0x00000004
1209                                         0x00000002 0x00000009 0x00000003 0x00000003
1210                                         0x00000002 0x00000002 0x00000002 0x00000005
1211                                         0x00000003 0x00000008 0x0000000b 0x000000ff
1212                                         0x00000000 0x00000003 0x00000003 0x00000003
1213                                         0x00000008 0x00000001 0x0000000a 0x0000000b
1214                                         0x00000003 0x00000008 0x00000004 0x00000006
1215                                         0x00000002 0x00000138 0x00000000 0x00000000
1216                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1217                                         0x0007c000 0x00000000 0x00000000 0x00000007
1218                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1219                         };
1220
1221                         emc-table@150000 {
1222                                 reg = <150000>;
1223                                 compatible = "nvidia,tegra20-emc-table";
1224                                 clock-frequency = <150000>;
1225                                 nvidia,emc-registers = <0x00000009 0x00000014
1226                                         0x00000007 0x00000003 0x00000006 0x00000004
1227                                         0x00000002 0x00000009 0x00000003 0x00000003
1228                                         0x00000002 0x00000002 0x00000002 0x00000005
1229                                         0x00000003 0x00000008 0x0000000b 0x0000021f
1230                                         0x00000000 0x00000003 0x00000003 0x00000003
1231                                         0x00000008 0x00000001 0x0000000a 0x00000015
1232                                         0x00000003 0x00000008 0x00000004 0x00000006
1233                                         0x00000002 0x00000270 0x00000000 0x00000001
1234                                         0x00000000 0x00000000 0x00000282 0xa07c04ae
1235                                         0x007e4010 0x00000000 0x00000000 0x0000000e
1236                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1237                         };
1238
1239                         emc-table@300000 {
1240                                 reg = <300000>;
1241                                 compatible = "nvidia,tegra20-emc-table";
1242                                 clock-frequency = <300000>;
1243                                 nvidia,emc-registers = <0x00000012 0x00000027
1244                                         0x0000000d 0x00000006 0x00000007 0x00000005
1245                                         0x00000003 0x00000009 0x00000006 0x00000006
1246                                         0x00000003 0x00000003 0x00000002 0x00000006
1247                                         0x00000003 0x00000009 0x0000000c 0x0000045f
1248                                         0x00000000 0x00000004 0x00000004 0x00000006
1249                                         0x00000008 0x00000001 0x0000000e 0x0000002a
1250                                         0x00000003 0x0000000f 0x00000007 0x00000005
1251                                         0x00000002 0x000004e1 0x00000005 0x00000002
1252                                         0x00000000 0x00000000 0x00000282 0xe059048b
1253                                         0x007e0010 0x00000000 0x00000000 0x0000001b
1254                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1255                         };
1256                 };
1257
1258                 emc-tables@2 {
1259                         nvidia,ram-code = <2>; /* hynix-8gb */
1260
1261                         #address-cells = <1>;
1262                         #size-cells = <0>;
1263
1264                         emc-table@25000 {
1265                                 reg = <25000>;
1266                                 compatible = "nvidia,tegra20-emc-table";
1267                                 clock-frequency = <25000>;
1268                                 nvidia,emc-registers = <0x00000002 0x00000006
1269                                         0x00000003 0x00000003 0x00000006 0x00000004
1270                                         0x00000002 0x00000009 0x00000003 0x00000003
1271                                         0x00000002 0x00000002 0x00000002 0x00000004
1272                                         0x00000003 0x00000008 0x0000000b 0x0000004d
1273                                         0x00000000 0x00000003 0x00000003 0x00000003
1274                                         0x00000008 0x00000001 0x0000000a 0x00000004
1275                                         0x00000003 0x00000008 0x00000004 0x00000006
1276                                         0x00000002 0x00000068 0x00000000 0x00000003
1277                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1278                                         0x00070000 0x00000000 0x00000000 0x00000003
1279                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1280                         };
1281
1282                         emc-table@50000 {
1283                                 reg = <50000>;
1284                                 compatible = "nvidia,tegra20-emc-table";
1285                                 clock-frequency = <50000>;
1286                                 nvidia,emc-registers = <0x00000003 0x00000007
1287                                         0x00000003 0x00000003 0x00000006 0x00000004
1288                                         0x00000002 0x00000009 0x00000003 0x00000003
1289                                         0x00000002 0x00000002 0x00000002 0x00000005
1290                                         0x00000003 0x00000008 0x0000000b 0x0000009f
1291                                         0x00000000 0x00000003 0x00000003 0x00000003
1292                                         0x00000008 0x00000001 0x0000000a 0x00000007
1293                                         0x00000003 0x00000008 0x00000004 0x00000006
1294                                         0x00000002 0x000000d0 0x00000000 0x00000000
1295                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1296                                         0x00070000 0x00000000 0x00000000 0x00000005
1297                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1298                         };
1299
1300                         emc-table@75000 {
1301                                 reg = <75000>;
1302                                 compatible = "nvidia,tegra20-emc-table";
1303                                 clock-frequency = <75000>;
1304                                 nvidia,emc-registers = <0x00000005 0x0000000a
1305                                         0x00000004 0x00000003 0x00000006 0x00000004
1306                                         0x00000002 0x00000009 0x00000003 0x00000003
1307                                         0x00000002 0x00000002 0x00000002 0x00000005
1308                                         0x00000003 0x00000008 0x0000000b 0x000000ff
1309                                         0x00000000 0x00000003 0x00000003 0x00000003
1310                                         0x00000008 0x00000001 0x0000000a 0x0000000b
1311                                         0x00000003 0x00000008 0x00000004 0x00000006
1312                                         0x00000002 0x00000138 0x00000000 0x00000000
1313                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1314                                         0x00070000 0x00000000 0x00000000 0x00000007
1315                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1316                         };
1317
1318                         emc-table@150000 {
1319                                 reg = <150000>;
1320                                 compatible = "nvidia,tegra20-emc-table";
1321                                 clock-frequency = <150000>;
1322                                 nvidia,emc-registers = <0x00000009 0x00000014
1323                                         0x00000007 0x00000003 0x00000006 0x00000004
1324                                         0x00000002 0x00000009 0x00000003 0x00000003
1325                                         0x00000002 0x00000002 0x00000002 0x00000005
1326                                         0x00000003 0x00000008 0x0000000b 0x0000021f
1327                                         0x00000000 0x00000003 0x00000003 0x00000003
1328                                         0x00000008 0x00000001 0x0000000a 0x00000015
1329                                         0x00000003 0x00000008 0x00000004 0x00000006
1330                                         0x00000002 0x00000270 0x00000000 0x00000001
1331                                         0x00000000 0x00000000 0x00000282 0xa07c04ae
1332                                         0x007dd010 0x00000000 0x00000000 0x0000000e
1333                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1334                         };
1335
1336                         emc-table@300000 {
1337                                 reg = <300000>;
1338                                 compatible = "nvidia,tegra20-emc-table";
1339                                 clock-frequency = <300000>;
1340                                 nvidia,emc-registers = <0x00000012 0x00000027
1341                                         0x0000000d 0x00000006 0x00000007 0x00000005
1342                                         0x00000003 0x00000009 0x00000006 0x00000006
1343                                         0x00000003 0x00000003 0x00000002 0x00000006
1344                                         0x00000003 0x00000009 0x0000000c 0x0000045f
1345                                         0x00000000 0x00000004 0x00000004 0x00000006
1346                                         0x00000008 0x00000001 0x0000000e 0x0000002a
1347                                         0x00000003 0x0000000f 0x00000007 0x00000005
1348                                         0x00000002 0x000004e1 0x00000005 0x00000002
1349                                         0x00000000 0x00000000 0x00000282 0xe059048b
1350                                         0x007e2010 0x00000000 0x00000000 0x0000001b
1351                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1352                         };
1353                 };
1354
1355                 emc-tables@3 {
1356                         nvidia,ram-code = <3>; /* hynix-4gb */
1357
1358                         #address-cells = <1>;
1359                         #size-cells = <0>;
1360
1361                         emc-table@25000 {
1362                                 reg = <25000>;
1363                                 compatible = "nvidia,tegra20-emc-table";
1364                                 clock-frequency = <25000>;
1365                                 nvidia,emc-registers = <0x00000002 0x00000006
1366                                         0x00000003 0x00000003 0x00000006 0x00000004
1367                                         0x00000002 0x00000009 0x00000003 0x00000003
1368                                         0x00000002 0x00000002 0x00000002 0x00000004
1369                                         0x00000003 0x00000008 0x0000000b 0x0000004d
1370                                         0x00000000 0x00000003 0x00000003 0x00000003
1371                                         0x00000008 0x00000001 0x0000000a 0x00000004
1372                                         0x00000003 0x00000008 0x00000004 0x00000006
1373                                         0x00000002 0x00000068 0x00000000 0x00000003
1374                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1375                                         0x0007c000 0x00000000 0x00000000 0x00000003
1376                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1377                         };
1378
1379                         emc-table@50000 {
1380                                 reg = <50000>;
1381                                 compatible = "nvidia,tegra20-emc-table";
1382                                 clock-frequency = <50000>;
1383                                 nvidia,emc-registers = <0x00000003 0x00000007
1384                                         0x00000003 0x00000003 0x00000006 0x00000004
1385                                         0x00000002 0x00000009 0x00000003 0x00000003
1386                                         0x00000002 0x00000002 0x00000002 0x00000005
1387                                         0x00000003 0x00000008 0x0000000b 0x0000009f
1388                                         0x00000000 0x00000003 0x00000003 0x00000003
1389                                         0x00000008 0x00000001 0x0000000a 0x00000007
1390                                         0x00000003 0x00000008 0x00000004 0x00000006
1391                                         0x00000002 0x000000d0 0x00000000 0x00000000
1392                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1393                                         0x0007c000 0x00078000 0x00000000 0x00000005
1394                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1395                         };
1396
1397                         emc-table@75000 {
1398                                 reg = <75000>;
1399                                 compatible = "nvidia,tegra20-emc-table";
1400                                 clock-frequency = <75000>;
1401                                 nvidia,emc-registers = <0x00000005 0x0000000a
1402                                         0x00000004 0x00000003 0x00000006 0x00000004
1403                                         0x00000002 0x00000009 0x00000003 0x00000003
1404                                         0x00000002 0x00000002 0x00000002 0x00000005
1405                                         0x00000003 0x00000008 0x0000000b 0x000000ff
1406                                         0x00000000 0x00000003 0x00000003 0x00000003
1407                                         0x00000008 0x00000001 0x0000000a 0x0000000b
1408                                         0x00000003 0x00000008 0x00000004 0x00000006
1409                                         0x00000002 0x00000138 0x00000000 0x00000000
1410                                         0x00000000 0x00000000 0x00000282 0xa0ae04ae
1411                                         0x0007c000 0x00000000 0x00000000 0x00000007
1412                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1413                         };
1414
1415                         emc-table@150000 {
1416                                 reg = <150000>;
1417                                 compatible = "nvidia,tegra20-emc-table";
1418                                 clock-frequency = <150000>;
1419                                 nvidia,emc-registers = <0x00000009 0x00000014
1420                                         0x00000007 0x00000003 0x00000006 0x00000004
1421                                         0x00000002 0x00000009 0x00000003 0x00000003
1422                                         0x00000002 0x00000002 0x00000002 0x00000005
1423                                         0x00000003 0x00000008 0x0000000b 0x0000021f
1424                                         0x00000000 0x00000003 0x00000003 0x00000003
1425                                         0x00000008 0x00000001 0x0000000a 0x00000015
1426                                         0x00000003 0x00000008 0x00000004 0x00000006
1427                                         0x00000002 0x00000270 0x00000000 0x00000001
1428                                         0x00000000 0x00000000 0x00000282 0xa07c04ae
1429                                         0x007e4010 0x00000000 0x00000000 0x0000000e
1430                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1431                         };
1432
1433                         emc-table@300000 {
1434                                 reg = <300000>;
1435                                 compatible = "nvidia,tegra20-emc-table";
1436                                 clock-frequency = <300000>;
1437                                 nvidia,emc-registers = <0x00000012 0x00000027
1438                                         0x0000000d 0x00000006 0x00000007 0x00000005
1439                                         0x00000003 0x00000009 0x00000006 0x00000006
1440                                         0x00000003 0x00000003 0x00000002 0x00000006
1441                                         0x00000003 0x00000009 0x0000000c 0x0000045f
1442                                         0x00000000 0x00000004 0x00000004 0x00000006
1443                                         0x00000008 0x00000001 0x0000000e 0x0000002a
1444                                         0x00000003 0x0000000f 0x00000007 0x00000005
1445                                         0x00000002 0x000004e1 0x00000005 0x00000002
1446                                         0x00000000 0x00000000 0x00000282 0xe059048b
1447                                         0x007e0010 0x00000000 0x00000000 0x0000001b
1448                                         0x00000000 0x00000000 0x00000000 0x00000000>;
1449                         };
1450                 };
1451         };
1452 };