Merge tag 'spi-fix-v5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
[linux-2.6-microblaze.git] / arch / arm / boot / dts / tegra124-venice2.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3
4 #include <dt-bindings/input/input.h>
5 #include "tegra124.dtsi"
6
7 / {
8         model = "NVIDIA Tegra124 Venice2";
9         compatible = "nvidia,venice2", "nvidia,tegra124";
10
11         aliases {
12                 rtc0 = "/i2c@7000d000/pmic@40";
13                 rtc1 = "/rtc@7000e000";
14                 serial0 = &uarta;
15         };
16
17         chosen {
18                 stdout-path = "serial0:115200n8";
19         };
20
21         memory@80000000 {
22                 reg = <0x0 0x80000000 0x0 0x80000000>;
23         };
24
25         host1x@50000000 {
26                 hdmi@54280000 {
27                         status = "okay";
28
29                         vdd-supply = <&vdd_3v3_hdmi>;
30                         pll-supply = <&vdd_hdmi_pll>;
31                         hdmi-supply = <&vdd_5v0_hdmi>;
32
33                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
34                         nvidia,hpd-gpio =
35                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
36                 };
37
38                 sor@54540000 {
39                         status = "okay";
40
41                         avdd-io-hdmi-dp-supply = <&vdd_1v05_run>;
42                         vdd-hdmi-dp-pll-supply = <&vdd_3v3_run>;
43
44                         nvidia,dpaux = <&dpaux>;
45                         nvidia,panel = <&panel>;
46                 };
47
48                 dpaux@545c0000 {
49                         vdd-supply = <&vdd_3v3_panel>;
50                         status = "okay";
51                 };
52         };
53
54         gpu@0,57000000 {
55                 /*
56                  * Node left disabled on purpose - the bootloader will enable
57                  * it after having set the VPR up
58                  */
59                 vdd-supply = <&vdd_gpu>;
60         };
61
62         pinmux: pinmux@70000868 {
63                 pinctrl-names = "boot";
64                 pinctrl-0 = <&pinmux_boot>;
65
66                 pinmux_boot: common {
67                         dap_mclk1_pw4 {
68                                 nvidia,pins = "dap_mclk1_pw4";
69                                 nvidia,function = "extperiph1";
70                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
71                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
72                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
73                         };
74                         dap1_din_pn1 {
75                                 nvidia,pins = "dap1_din_pn1";
76                                 nvidia,function = "i2s0";
77                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
78                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
79                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
80                         };
81                         dap1_dout_pn2 {
82                                 nvidia,pins = "dap1_dout_pn2",
83                                               "dap1_fs_pn0",
84                                               "dap1_sclk_pn3";
85                                 nvidia,function = "i2s0";
86                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
87                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
88                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
89                         };
90                         dap2_din_pa4 {
91                                 nvidia,pins = "dap2_din_pa4";
92                                 nvidia,function = "i2s1";
93                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
94                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
95                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
96                         };
97                         dap2_dout_pa5 {
98                                 nvidia,pins = "dap2_dout_pa5",
99                                               "dap2_fs_pa2",
100                                               "dap2_sclk_pa3";
101                                 nvidia,function = "i2s1";
102                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
103                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
104                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
105                         };
106                         dvfs_pwm_px0 {
107                                 nvidia,pins = "dvfs_pwm_px0",
108                                               "dvfs_clk_px2";
109                                 nvidia,function = "cldvfs";
110                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
111                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
112                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
113                         };
114                         ulpi_clk_py0 {
115                                 nvidia,pins = "ulpi_clk_py0",
116                                               "ulpi_nxt_py2",
117                                               "ulpi_stp_py3";
118                                 nvidia,function = "spi1";
119                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
120                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
121                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
122                         };
123                         ulpi_dir_py1 {
124                                 nvidia,pins = "ulpi_dir_py1";
125                                 nvidia,function = "spi1";
126                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
127                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
128                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
129                         };
130                         cam_i2c_scl_pbb1 {
131                                 nvidia,pins = "cam_i2c_scl_pbb1",
132                                               "cam_i2c_sda_pbb2";
133                                 nvidia,function = "i2c3";
134                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
135                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
136                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
137                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
138                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
139                         };
140                         gen2_i2c_scl_pt5 {
141                                 nvidia,pins = "gen2_i2c_scl_pt5",
142                                               "gen2_i2c_sda_pt6";
143                                 nvidia,function = "i2c2";
144                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
145                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
146                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
147                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
148                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
149                         };
150                         pg4 {
151                                 nvidia,pins = "pg4",
152                                               "pg5",
153                                               "pg6",
154                                               "pi3";
155                                 nvidia,function = "spi4";
156                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
157                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
158                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
159                         };
160                         pg7 {
161                                 nvidia,pins = "pg7";
162                                 nvidia,function = "spi4";
163                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
164                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
165                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
166                         };
167                         ph1 {
168                                 nvidia,pins = "ph1";
169                                 nvidia,function = "pwm1";
170                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
171                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
172                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
173                         };
174                         pk0 {
175                                 nvidia,pins = "pk0",
176                                               "kb_row15_ps7",
177                                               "clk_32k_out_pa0";
178                                 nvidia,function = "soc";
179                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
180                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
181                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
182                         };
183                         sdmmc1_clk_pz0 {
184                                 nvidia,pins = "sdmmc1_clk_pz0";
185                                 nvidia,function = "sdmmc1";
186                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
187                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
188                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
189                         };
190                         sdmmc1_cmd_pz1 {
191                                 nvidia,pins = "sdmmc1_cmd_pz1",
192                                               "sdmmc1_dat0_py7",
193                                               "sdmmc1_dat1_py6",
194                                               "sdmmc1_dat2_py5",
195                                               "sdmmc1_dat3_py4";
196                                 nvidia,function = "sdmmc1";
197                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
198                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
199                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
200                         };
201                         sdmmc3_clk_pa6 {
202                                 nvidia,pins = "sdmmc3_clk_pa6";
203                                 nvidia,function = "sdmmc3";
204                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
205                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
206                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
207                         };
208                         sdmmc3_cmd_pa7 {
209                                 nvidia,pins = "sdmmc3_cmd_pa7",
210                                               "sdmmc3_dat0_pb7",
211                                               "sdmmc3_dat1_pb6",
212                                               "sdmmc3_dat2_pb5",
213                                               "sdmmc3_dat3_pb4",
214                                               "sdmmc3_clk_lb_out_pee4",
215                                               "sdmmc3_clk_lb_in_pee5";
216                                 nvidia,function = "sdmmc3";
217                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
218                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
219                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
220                         };
221                         sdmmc4_clk_pcc4 {
222                                 nvidia,pins = "sdmmc4_clk_pcc4";
223                                 nvidia,function = "sdmmc4";
224                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
225                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
226                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
227                         };
228                         sdmmc4_cmd_pt7 {
229                                 nvidia,pins = "sdmmc4_cmd_pt7",
230                                               "sdmmc4_dat0_paa0",
231                                               "sdmmc4_dat1_paa1",
232                                               "sdmmc4_dat2_paa2",
233                                               "sdmmc4_dat3_paa3",
234                                               "sdmmc4_dat4_paa4",
235                                               "sdmmc4_dat5_paa5",
236                                               "sdmmc4_dat6_paa6",
237                                               "sdmmc4_dat7_paa7";
238                                 nvidia,function = "sdmmc4";
239                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
240                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
241                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
242                         };
243                         pwr_i2c_scl_pz6 {
244                                 nvidia,pins = "pwr_i2c_scl_pz6",
245                                               "pwr_i2c_sda_pz7";
246                                 nvidia,function = "i2cpwr";
247                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
248                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
249                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
250                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
251                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
252                         };
253                         jtag_rtck {
254                                 nvidia,pins = "jtag_rtck";
255                                 nvidia,function = "rtck";
256                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
257                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
258                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
259                         };
260                         clk_32k_in {
261                                 nvidia,pins = "clk_32k_in";
262                                 nvidia,function = "clk";
263                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
264                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
265                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
266                         };
267                         core_pwr_req {
268                                 nvidia,pins = "core_pwr_req";
269                                 nvidia,function = "pwron";
270                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
271                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
272                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
273                         };
274                         cpu_pwr_req {
275                                 nvidia,pins = "cpu_pwr_req";
276                                 nvidia,function = "cpu";
277                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
278                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
279                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
280                         };
281                         pwr_int_n {
282                                 nvidia,pins = "pwr_int_n";
283                                 nvidia,function = "pmi";
284                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
285                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
286                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
287                         };
288                         reset_out_n {
289                                 nvidia,pins = "reset_out_n";
290                                 nvidia,function = "reset_out_n";
291                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
292                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
293                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
294                         };
295                         clk3_out_pee0 {
296                                 nvidia,pins = "clk3_out_pee0";
297                                 nvidia,function = "extperiph3";
298                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
299                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
300                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
301                         };
302                         dap4_din_pp5 {
303                                 nvidia,pins = "dap4_din_pp5";
304                                 nvidia,function = "i2s3";
305                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
306                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
307                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
308                         };
309                         dap4_dout_pp6 {
310                                 nvidia,pins = "dap4_dout_pp6",
311                                               "dap4_fs_pp4",
312                                               "dap4_sclk_pp7";
313                                 nvidia,function = "i2s3";
314                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
315                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
316                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
317                         };
318                         gen1_i2c_sda_pc5 {
319                                 nvidia,pins = "gen1_i2c_sda_pc5",
320                                               "gen1_i2c_scl_pc4";
321                                 nvidia,function = "i2c1";
322                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
323                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
324                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
325                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
326                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
327                         };
328                         uart2_cts_n_pj5 {
329                                 nvidia,pins = "uart2_cts_n_pj5";
330                                 nvidia,function = "uartb";
331                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
332                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
333                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
334                         };
335                         uart2_rts_n_pj6 {
336                                 nvidia,pins = "uart2_rts_n_pj6";
337                                 nvidia,function = "uartb";
338                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
339                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
340                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
341                         };
342                         uart2_rxd_pc3 {
343                                 nvidia,pins = "uart2_rxd_pc3";
344                                 nvidia,function = "irda";
345                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
346                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
347                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
348                         };
349                         uart2_txd_pc2 {
350                                 nvidia,pins = "uart2_txd_pc2";
351                                 nvidia,function = "irda";
352                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
353                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
354                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
355                         };
356                         uart3_cts_n_pa1 {
357                                 nvidia,pins = "uart3_cts_n_pa1",
358                                               "uart3_rxd_pw7";
359                                 nvidia,function = "uartc";
360                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
361                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
362                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
363                         };
364                         uart3_rts_n_pc0 {
365                                 nvidia,pins = "uart3_rts_n_pc0",
366                                               "uart3_txd_pw6";
367                                 nvidia,function = "uartc";
368                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
369                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
370                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
371                         };
372                         hdmi_cec_pee3 {
373                                 nvidia,pins = "hdmi_cec_pee3";
374                                 nvidia,function = "cec";
375                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
376                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
377                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
378                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
379                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
380                         };
381                         hdmi_int_pn7 {
382                                 nvidia,pins = "hdmi_int_pn7";
383                                 nvidia,function = "rsvd1";
384                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
385                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
386                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
387                         };
388                         ddc_scl_pv4 {
389                                 nvidia,pins = "ddc_scl_pv4",
390                                               "ddc_sda_pv5";
391                                 nvidia,function = "i2c4";
392                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
393                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
394                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
395                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
396                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
397                         };
398                         pj7 {
399                                 nvidia,pins = "pj7",
400                                               "pk7";
401                                 nvidia,function = "uartd";
402                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
403                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
404                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
405                         };
406                         pb0 {
407                                 nvidia,pins = "pb0",
408                                               "pb1";
409                                 nvidia,function = "uartd";
410                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
411                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
412                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
413                         };
414                         ph0 {
415                                 nvidia,pins = "ph0";
416                                 nvidia,function = "pwm0";
417                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
418                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
419                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
420                         };
421                         kb_row10_ps2 {
422                                 nvidia,pins = "kb_row10_ps2";
423                                 nvidia,function = "uarta";
424                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
425                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
426                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
427                         };
428                         kb_row9_ps1 {
429                                 nvidia,pins = "kb_row9_ps1";
430                                 nvidia,function = "uarta";
431                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
432                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
433                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
434                         };
435                         kb_row6_pr6 {
436                                 nvidia,pins = "kb_row6_pr6";
437                                 nvidia,function = "displaya_alt";
438                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
439                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
440                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
441                         };
442                         usb_vbus_en0_pn4 {
443                                 nvidia,pins = "usb_vbus_en0_pn4",
444                                               "usb_vbus_en1_pn5";
445                                 nvidia,function = "usb";
446                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
447                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
448                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
449                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
450                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
451                         };
452                         drive_sdio1 {
453                                 nvidia,pins = "drive_sdio1";
454                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
455                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
456                                 nvidia,pull-down-strength = <32>;
457                                 nvidia,pull-up-strength = <42>;
458                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
459                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
460                         };
461                         drive_sdio3 {
462                                 nvidia,pins = "drive_sdio3";
463                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
464                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
465                                 nvidia,pull-down-strength = <20>;
466                                 nvidia,pull-up-strength = <36>;
467                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
468                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
469                         };
470                         drive_gma {
471                                 nvidia,pins = "drive_gma";
472                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
473                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
474                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
475                                 nvidia,pull-down-strength = <1>;
476                                 nvidia,pull-up-strength = <2>;
477                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
478                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
479                                 nvidia,drive-type = <1>;
480                         };
481                         als_irq_l {
482                                 nvidia,pins = "gpio_x3_aud_px3";
483                                 nvidia,function = "gmi";
484                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
485                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
486                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
487                         };
488                         codec_irq_l {
489                                 nvidia,pins = "ph4";
490                                 nvidia,function = "gmi";
491                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
492                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
493                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
494                         };
495                         lcd_bl_en {
496                                 nvidia,pins = "ph2";
497                                 nvidia,function = "gmi";
498                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
499                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
500                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
501                         };
502                         touch_irq_l {
503                                 nvidia,pins = "gpio_w3_aud_pw3";
504                                 nvidia,function = "spi6";
505                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
506                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
507                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
508                         };
509                         tpm_davint_l {
510                                 nvidia,pins = "ph6";
511                                 nvidia,function = "gmi";
512                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
513                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
514                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
515                         };
516                         ts_irq_l {
517                                 nvidia,pins = "pk2";
518                                 nvidia,function = "gmi";
519                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
520                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
521                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
522                         };
523                         ts_reset_l {
524                                 nvidia,pins = "pk4";
525                                 nvidia,function = "gmi";
526                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
527                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
528                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
529                         };
530                         ts_shdn_l {
531                                 nvidia,pins = "pk1";
532                                 nvidia,function = "gmi";
533                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
534                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
535                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
536                         };
537                         ph7 {
538                                 nvidia,pins = "ph7";
539                                 nvidia,function = "gmi";
540                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
541                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
542                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
543                         };
544                         kb_col0_ap {
545                                 nvidia,pins = "kb_col0_pq0";
546                                 nvidia,function = "rsvd4";
547                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
548                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
549                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
550                         };
551                         lid_open {
552                                 nvidia,pins = "kb_row4_pr4";
553                                 nvidia,function = "rsvd3";
554                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
555                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
556                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
557                         };
558                         en_vdd_sd {
559                                 nvidia,pins = "kb_row0_pr0";
560                                 nvidia,function = "rsvd4";
561                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
562                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
563                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
564                         };
565                         ac_ok {
566                                 nvidia,pins = "pj0";
567                                 nvidia,function = "gmi";
568                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
569                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
570                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
571                         };
572                         sensor_irq_l {
573                                 nvidia,pins = "pi6";
574                                 nvidia,function = "gmi";
575                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
576                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
577                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
578                         };
579                         wifi_en {
580                                 nvidia,pins = "gpio_x7_aud_px7";
581                                 nvidia,function = "rsvd4";
582                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
583                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
584                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
585                         };
586                         wifi_rst_l {
587                                 nvidia,pins = "clk2_req_pcc5";
588                                 nvidia,function = "dap";
589                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
590                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
591                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
592                         };
593                         hp_det_l {
594                                 nvidia,pins = "ulpi_data1_po2";
595                                 nvidia,function = "spi3";
596                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
597                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
598                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
599                         };
600                 };
601         };
602
603         serial@70006000 {
604                 status = "okay";
605         };
606
607         pwm@7000a000 {
608                 status = "okay";
609         };
610
611         i2c@7000c000 {
612                 status = "okay";
613                 clock-frequency = <100000>;
614
615                 acodec: audio-codec@10 {
616                         compatible = "maxim,max98090";
617                         reg = <0x10>;
618                         interrupt-parent = <&gpio>;
619                         interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
620                 };
621         };
622
623         i2c@7000c400 {
624                 status = "okay";
625                 clock-frequency = <100000>;
626
627                 trackpad@4b {
628                         compatible = "atmel,maxtouch";
629                         reg = <0x4b>;
630                         interrupt-parent = <&gpio>;
631                         interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_LOW>;
632                         linux,gpio-keymap = <0 0 0 BTN_LEFT>;
633                 };
634         };
635
636         i2c@7000c500 {
637                 status = "okay";
638                 clock-frequency = <100000>;
639         };
640
641         hdmi_ddc: i2c@7000c700 {
642                 status = "okay";
643                 clock-frequency = <100000>;
644         };
645
646         i2c@7000d000 {
647                 status = "okay";
648                 clock-frequency = <400000>;
649
650                 pmic: pmic@40 {
651                         compatible = "ams,as3722";
652                         reg = <0x40>;
653                         interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
654
655                         ams,system-power-controller;
656
657                         #interrupt-cells = <2>;
658                         interrupt-controller;
659
660                         gpio-controller;
661                         #gpio-cells = <2>;
662
663                         pinctrl-names = "default";
664                         pinctrl-0 = <&as3722_default>;
665
666                         as3722_default: pinmux {
667                                 gpio0 {
668                                         pins = "gpio0";
669                                         function = "gpio";
670                                         bias-pull-down;
671                                 };
672
673                                 gpio1_2_4_7 {
674                                         pins = "gpio1", "gpio2", "gpio4", "gpio7";
675                                         function = "gpio";
676                                         bias-pull-up;
677                                 };
678
679                                 gpio3_6 {
680                                         pins = "gpio3", "gpio6";
681                                         bias-high-impedance;
682                                 };
683
684                                 gpio5 {
685                                         pins = "gpio5";
686                                         function = "clk32k-out";
687                                 };
688                         };
689
690                         regulators {
691                                 vsup-sd2-supply = <&vdd_5v0_sys>;
692                                 vsup-sd3-supply = <&vdd_5v0_sys>;
693                                 vsup-sd4-supply = <&vdd_5v0_sys>;
694                                 vsup-sd5-supply = <&vdd_5v0_sys>;
695                                 vin-ldo0-supply = <&vdd_1v35_lp0>;
696                                 vin-ldo1-6-supply = <&vdd_3v3_run>;
697                                 vin-ldo2-5-7-supply = <&vddio_1v8>;
698                                 vin-ldo3-4-supply = <&vdd_3v3_sys>;
699                                 vin-ldo9-10-supply = <&vdd_5v0_sys>;
700                                 vin-ldo11-supply = <&vdd_3v3_run>;
701
702                                 sd0 {
703                                         regulator-name = "+VDD_CPU_AP";
704                                         regulator-min-microvolt = <700000>;
705                                         regulator-max-microvolt = <1400000>;
706                                         regulator-min-microamp = <3500000>;
707                                         regulator-max-microamp = <3500000>;
708                                         regulator-always-on;
709                                         regulator-boot-on;
710                                         ams,ext-control = <2>;
711                                 };
712
713                                 sd1 {
714                                         regulator-name = "+VDD_CORE";
715                                         regulator-min-microvolt = <700000>;
716                                         regulator-max-microvolt = <1350000>;
717                                         regulator-min-microamp = <2500000>;
718                                         regulator-max-microamp = <2500000>;
719                                         regulator-always-on;
720                                         regulator-boot-on;
721                                         ams,ext-control = <1>;
722                                 };
723
724                                 vdd_1v35_lp0: sd2 {
725                                         regulator-name = "+1.35V_LP0(sd2)";
726                                         regulator-min-microvolt = <1350000>;
727                                         regulator-max-microvolt = <1350000>;
728                                         regulator-always-on;
729                                         regulator-boot-on;
730                                 };
731
732                                 sd3 {
733                                         regulator-name = "+1.35V_LP0(sd3)";
734                                         regulator-min-microvolt = <1350000>;
735                                         regulator-max-microvolt = <1350000>;
736                                         regulator-always-on;
737                                         regulator-boot-on;
738                                 };
739
740                                 vdd_1v05_run: sd4 {
741                                         regulator-name = "+1.05V_RUN";
742                                         regulator-min-microvolt = <1050000>;
743                                         regulator-max-microvolt = <1050000>;
744                                 };
745
746                                 vddio_1v8: sd5 {
747                                         regulator-name = "+1.8V_VDDIO";
748                                         regulator-min-microvolt = <1800000>;
749                                         regulator-max-microvolt = <1800000>;
750                                         regulator-boot-on;
751                                         regulator-always-on;
752                                 };
753
754                                 vdd_gpu: sd6 {
755                                         regulator-name = "+VDD_GPU_AP";
756                                         regulator-min-microvolt = <650000>;
757                                         regulator-max-microvolt = <1200000>;
758                                         regulator-min-microamp = <3500000>;
759                                         regulator-max-microamp = <3500000>;
760                                         regulator-boot-on;
761                                         regulator-always-on;
762                                 };
763
764                                 avdd_1v05_run: ldo0 {
765                                         regulator-name = "+1.05V_RUN_AVDD";
766                                         regulator-min-microvolt = <1050000>;
767                                         regulator-max-microvolt = <1050000>;
768                                         regulator-boot-on;
769                                         regulator-always-on;
770                                         ams,ext-control = <1>;
771                                 };
772
773                                 ldo1 {
774                                         regulator-name = "+1.8V_RUN_CAM";
775                                         regulator-min-microvolt = <1800000>;
776                                         regulator-max-microvolt = <1800000>;
777                                 };
778
779                                 ldo2 {
780                                         regulator-name = "+1.2V_GEN_AVDD";
781                                         regulator-min-microvolt = <1200000>;
782                                         regulator-max-microvolt = <1200000>;
783                                         regulator-boot-on;
784                                         regulator-always-on;
785                                 };
786
787                                 ldo3 {
788                                         regulator-name = "+1.00V_LP0_VDD_RTC";
789                                         regulator-min-microvolt = <1000000>;
790                                         regulator-max-microvolt = <1000000>;
791                                         regulator-boot-on;
792                                         regulator-always-on;
793                                         ams,enable-tracking;
794                                 };
795
796                                 vdd_run_cam: ldo4 {
797                                         regulator-name = "+3.3V_RUN_CAM";
798                                         regulator-min-microvolt = <2800000>;
799                                         regulator-max-microvolt = <2800000>;
800                                 };
801
802                                 ldo5 {
803                                         regulator-name = "+1.2V_RUN_CAM_FRONT";
804                                         regulator-min-microvolt = <1200000>;
805                                         regulator-max-microvolt = <1200000>;
806                                 };
807
808                                 vddio_sdmmc3: ldo6 {
809                                         regulator-name = "+VDDIO_SDMMC3";
810                                         regulator-min-microvolt = <1800000>;
811                                         regulator-max-microvolt = <3300000>;
812                                 };
813
814                                 ldo7 {
815                                         regulator-name = "+1.05V_RUN_CAM_REAR";
816                                         regulator-min-microvolt = <1050000>;
817                                         regulator-max-microvolt = <1050000>;
818                                 };
819
820                                 ldo9 {
821                                         regulator-name = "+2.8V_RUN_TOUCH";
822                                         regulator-min-microvolt = <2800000>;
823                                         regulator-max-microvolt = <2800000>;
824                                 };
825
826                                 ldo10 {
827                                         regulator-name = "+2.8V_RUN_CAM_AF";
828                                         regulator-min-microvolt = <2800000>;
829                                         regulator-max-microvolt = <2800000>;
830                                 };
831
832                                 ldo11 {
833                                         regulator-name = "+1.8V_RUN_VPP_FUSE";
834                                         regulator-min-microvolt = <1800000>;
835                                         regulator-max-microvolt = <1800000>;
836                                 };
837                         };
838                 };
839         };
840
841         spi@7000d400 {
842                 status = "okay";
843
844                 cros_ec: cros-ec@0 {
845                         compatible = "google,cros-ec-spi";
846                         spi-max-frequency = <4000000>;
847                         interrupt-parent = <&gpio>;
848                         interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
849                         reg = <0>;
850
851                         google,cros-ec-spi-msg-delay = <2000>;
852
853                         i2c-tunnel {
854                                 compatible = "google,cros-ec-i2c-tunnel";
855                                 #address-cells = <1>;
856                                 #size-cells = <0>;
857
858                                 google,remote-bus = <0>;
859
860                                 charger: bq24735@9 {
861                                         compatible = "ti,bq24735";
862                                         reg = <0x9>;
863                                         interrupt-parent = <&gpio>;
864                                         interrupts = <TEGRA_GPIO(J, 0)
865                                                         IRQ_TYPE_EDGE_BOTH>;
866                                         ti,ac-detect-gpios = <&gpio
867                                                         TEGRA_GPIO(J, 0)
868                                                         GPIO_ACTIVE_HIGH>;
869                                 };
870
871                                 battery: sbs-battery@b {
872                                         compatible = "sbs,sbs-battery";
873                                         reg = <0xb>;
874                                         sbs,i2c-retry-count = <2>;
875                                         sbs,poll-retry-count = <1>;
876                                 };
877                         };
878                 };
879         };
880
881         spi@7000da00 {
882                 status = "okay";
883                 spi-max-frequency = <25000000>;
884                 spi-flash@0 {
885                         compatible = "winbond,w25q32dw", "jedec,spi-nor";
886                         reg = <0>;
887                         spi-max-frequency = <20000000>;
888                 };
889         };
890
891         pmc@7000e400 {
892                 nvidia,invert-interrupt;
893                 nvidia,suspend-mode = <1>;
894                 nvidia,cpu-pwr-good-time = <500>;
895                 nvidia,cpu-pwr-off-time = <300>;
896                 nvidia,core-pwr-good-time = <641 3845>;
897                 nvidia,core-pwr-off-time = <61036>;
898                 nvidia,core-power-req-active-high;
899                 nvidia,sys-clock-req-active-high;
900         };
901
902         hda@70030000 {
903                 status = "okay";
904         };
905
906         usb@70090000 {
907                 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
908                        <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
909                        <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
910                        <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
911                        <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
912                 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1";
913
914                 avddio-pex-supply = <&vdd_1v05_run>;
915                 dvddio-pex-supply = <&vdd_1v05_run>;
916                 avdd-usb-supply = <&vdd_3v3_lp0>;
917                 avdd-pll-utmip-supply = <&vddio_1v8>;
918                 avdd-pll-erefe-supply = <&avdd_1v05_run>;
919                 avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
920                 hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
921                 hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
922
923                 status = "okay";
924         };
925
926         padctl@7009f000 {
927                 avdd-pll-utmip-supply = <&vddio_1v8>;
928                 avdd-pll-erefe-supply = <&avdd_1v05_run>;
929                 avdd-pex-pll-supply = <&vdd_1v05_run>;
930                 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
931
932                 pads {
933                         usb2 {
934                                 status = "okay";
935
936                                 lanes {
937                                         usb2-0 {
938                                                 nvidia,function = "xusb";
939                                                 status = "okay";
940                                         };
941
942                                         usb2-1 {
943                                                 nvidia,function = "xusb";
944                                                 status = "okay";
945                                         };
946
947                                         usb2-2 {
948                                                 nvidia,function = "xusb";
949                                                 status = "okay";
950                                         };
951                                 };
952                         };
953
954                         pcie {
955                                 status = "okay";
956
957                                 lanes {
958                                         pcie-0 {
959                                                 nvidia,function = "usb3-ss";
960                                                 status = "okay";
961                                         };
962
963                                         pcie-1 {
964                                                 nvidia,function = "usb3-ss";
965                                                 status = "okay";
966                                         };
967                                 };
968                         };
969                 };
970
971                 ports {
972                         usb2-0 {
973                                 status = "okay";
974                                 mode = "otg";
975
976                                 vbus-supply = <&vdd_usb1_vbus>;
977                         };
978
979                         usb2-1 {
980                                 status = "okay";
981                                 mode = "host";
982
983                                 vbus-supply = <&vdd_run_cam>;
984                         };
985
986                         usb2-2 {
987                                 status = "okay";
988                                 mode = "host";
989
990                                 vbus-supply = <&vdd_usb3_vbus>;
991                         };
992
993                         usb3-0 {
994                                 nvidia,usb2-companion = <0>;
995                                 status = "okay";
996                         };
997
998                         usb3-1 {
999                                 nvidia,usb2-companion = <2>;
1000                                 status = "okay";
1001                         };
1002                 };
1003         };
1004
1005         mmc@700b0400 {
1006                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
1007                 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1008                 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1009                 status = "okay";
1010                 bus-width = <4>;
1011                 vqmmc-supply = <&vddio_sdmmc3>;
1012         };
1013
1014         mmc@700b0600 {
1015                 status = "okay";
1016                 bus-width = <8>;
1017                 non-removable;
1018         };
1019
1020         ahub@70300000 {
1021                 i2s@70301100 {
1022                         status = "okay";
1023                 };
1024         };
1025
1026         usb@7d000000 {
1027                 status = "okay";
1028         };
1029
1030         usb-phy@7d000000 {
1031                 status = "okay";
1032                 vbus-supply = <&vdd_usb1_vbus>;
1033         };
1034
1035         usb@7d004000 {
1036                 status = "okay";
1037         };
1038
1039         usb-phy@7d004000 {
1040                 status = "okay";
1041                 vbus-supply = <&vdd_run_cam>;
1042         };
1043
1044         usb@7d008000 {
1045                 status = "okay";
1046         };
1047
1048         usb-phy@7d008000 {
1049                 status = "okay";
1050                 vbus-supply = <&vdd_usb3_vbus>;
1051         };
1052
1053         backlight: backlight {
1054                 compatible = "pwm-backlight";
1055
1056                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1057                 power-supply = <&vdd_led>;
1058                 pwms = <&pwm 1 1000000>;
1059
1060                 brightness-levels = <0 4 8 16 32 64 128 255>;
1061                 default-brightness-level = <6>;
1062         };
1063
1064         clk32k_in: clock@0 {
1065                 compatible = "fixed-clock";
1066                 clock-frequency = <32768>;
1067                 #clock-cells = <0>;
1068         };
1069
1070         gpio-keys {
1071                 compatible = "gpio-keys";
1072
1073                 power {
1074                         label = "Power";
1075                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1076                         linux,code = <KEY_POWER>;
1077                         debounce-interval = <10>;
1078                         wakeup-source;
1079                 };
1080         };
1081
1082         panel: panel {
1083                 compatible = "lg,lp129qe";
1084                 power-supply = <&vdd_3v3_panel>;
1085                 backlight = <&backlight>;
1086                 ddc-i2c-bus = <&dpaux>;
1087         };
1088
1089         vdd_mux: regulator@0 {
1090                 compatible = "regulator-fixed";
1091                 regulator-name = "+VDD_MUX";
1092                 regulator-min-microvolt = <12000000>;
1093                 regulator-max-microvolt = <12000000>;
1094                 regulator-always-on;
1095                 regulator-boot-on;
1096         };
1097
1098         vdd_5v0_sys: regulator@1 {
1099                 compatible = "regulator-fixed";
1100                 regulator-name = "+5V_SYS";
1101                 regulator-min-microvolt = <5000000>;
1102                 regulator-max-microvolt = <5000000>;
1103                 regulator-always-on;
1104                 regulator-boot-on;
1105                 vin-supply = <&vdd_mux>;
1106         };
1107
1108         vdd_3v3_sys: regulator@2 {
1109                 compatible = "regulator-fixed";
1110                 regulator-name = "+3.3V_SYS";
1111                 regulator-min-microvolt = <3300000>;
1112                 regulator-max-microvolt = <3300000>;
1113                 regulator-always-on;
1114                 regulator-boot-on;
1115                 vin-supply = <&vdd_mux>;
1116         };
1117
1118         vdd_3v3_run: regulator@3 {
1119                 compatible = "regulator-fixed";
1120                 regulator-name = "+3.3V_RUN";
1121                 regulator-min-microvolt = <3300000>;
1122                 regulator-max-microvolt = <3300000>;
1123                 regulator-always-on;
1124                 regulator-boot-on;
1125                 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1126                 enable-active-high;
1127                 vin-supply = <&vdd_3v3_sys>;
1128         };
1129
1130         vdd_3v3_hdmi: regulator@4 {
1131                 compatible = "regulator-fixed";
1132                 regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1133                 regulator-min-microvolt = <3300000>;
1134                 regulator-max-microvolt = <3300000>;
1135                 vin-supply = <&vdd_3v3_run>;
1136         };
1137
1138         vdd_led: regulator@5 {
1139                 compatible = "regulator-fixed";
1140                 regulator-name = "+VDD_LED";
1141                 regulator-min-microvolt = <3300000>;
1142                 regulator-max-microvolt = <3300000>;
1143                 gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1144                 enable-active-high;
1145                 vin-supply = <&vdd_mux>;
1146         };
1147
1148         vdd_5v0_ts: regulator@6 {
1149                 compatible = "regulator-fixed";
1150                 regulator-name = "+5V_VDD_TS_SW";
1151                 regulator-min-microvolt = <5000000>;
1152                 regulator-max-microvolt = <5000000>;
1153                 regulator-boot-on;
1154                 gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1155                 enable-active-high;
1156                 vin-supply = <&vdd_5v0_sys>;
1157         };
1158
1159         vdd_usb1_vbus: regulator@7 {
1160                 compatible = "regulator-fixed";
1161                 regulator-name = "+5V_USB_HS";
1162                 regulator-min-microvolt = <5000000>;
1163                 regulator-max-microvolt = <5000000>;
1164                 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1165                 enable-active-high;
1166                 gpio-open-drain;
1167                 vin-supply = <&vdd_5v0_sys>;
1168         };
1169
1170         vdd_usb3_vbus: regulator@8 {
1171                 compatible = "regulator-fixed";
1172                 regulator-name = "+5V_USB_SS";
1173                 regulator-min-microvolt = <5000000>;
1174                 regulator-max-microvolt = <5000000>;
1175                 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1176                 enable-active-high;
1177                 gpio-open-drain;
1178                 vin-supply = <&vdd_5v0_sys>;
1179         };
1180
1181         vdd_3v3_panel: regulator@9 {
1182                 compatible = "regulator-fixed";
1183                 regulator-name = "+3.3V_PANEL";
1184                 regulator-min-microvolt = <3300000>;
1185                 regulator-max-microvolt = <3300000>;
1186                 gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
1187                 enable-active-high;
1188                 vin-supply = <&vdd_3v3_run>;
1189         };
1190
1191         vdd_3v3_lp0: regulator@10 {
1192                 compatible = "regulator-fixed";
1193                 regulator-name = "+3.3V_LP0";
1194                 regulator-min-microvolt = <3300000>;
1195                 regulator-max-microvolt = <3300000>;
1196                 /*
1197                  * TODO: find a way to wire this up with the USB EHCI
1198                  * controllers so that it can be enabled on demand.
1199                  */
1200                 regulator-always-on;
1201                 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1202                 enable-active-high;
1203                 vin-supply = <&vdd_3v3_sys>;
1204         };
1205
1206         vdd_hdmi_pll: regulator@11 {
1207                 compatible = "regulator-fixed";
1208                 regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1209                 regulator-min-microvolt = <1050000>;
1210                 regulator-max-microvolt = <1050000>;
1211                 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1212                 vin-supply = <&vdd_1v05_run>;
1213         };
1214
1215         vdd_5v0_hdmi: regulator@12 {
1216                 compatible = "regulator-fixed";
1217                 regulator-name = "+5V_HDMI_CON";
1218                 regulator-min-microvolt = <5000000>;
1219                 regulator-max-microvolt = <5000000>;
1220                 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1221                 enable-active-high;
1222                 vin-supply = <&vdd_5v0_sys>;
1223         };
1224
1225         sound {
1226                 compatible = "nvidia,tegra-audio-max98090-venice2",
1227                              "nvidia,tegra-audio-max98090";
1228                 nvidia,model = "NVIDIA Tegra Venice2";
1229
1230                 nvidia,audio-routing =
1231                         "Headphones", "HPR",
1232                         "Headphones", "HPL",
1233                         "Speakers", "SPKR",
1234                         "Speakers", "SPKL",
1235                         "Mic Jack", "MICBIAS",
1236                         "IN34", "Mic Jack";
1237
1238                 nvidia,i2s-controller = <&tegra_i2s1>;
1239                 nvidia,audio-codec = <&acodec>;
1240
1241                 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1242                          <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1243                          <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1244                 clock-names = "pll_a", "pll_a_out0", "mclk";
1245
1246                 assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
1247                                   <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1248
1249                 assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1250                                          <&tegra_car TEGRA124_CLK_EXTERN1>;
1251         };
1252 };
1253
1254 #include "cros-ec-keyboard.dtsi"