Merge tag '5.15-rc-cifs-part2' of git://git.samba.org/sfrench/cifs-2.6
[linux-2.6-microblaze.git] / arch / arm / boot / dts / r8a7745-iwg22d-sodimm.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device Tree Source for the iWave-RZG1E SODIMM carrier board
4  *
5  * Copyright (C) 2017 Renesas Electronics Corp.
6  */
7
8 /*
9  * SSI-SGTL5000
10  *
11  * This command is required when Playback/Capture
12  *
13  *      amixer set "DVC Out" 100%
14  *      amixer set "DVC In" 100%
15  *
16  * You can use Mute
17  *
18  *      amixer set "DVC Out Mute" on
19  *      amixer set "DVC In Mute" on
20  *
21  * You can use Volume Ramp
22  *
23  *      amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
24  *      amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
25  *      amixer set "DVC Out Ramp" on
26  *      aplay xxx.wav &
27  *      amixer set "DVC Out"  80%  // Volume Down
28  *      amixer set "DVC Out" 100%  // Volume Up
29  */
30
31 /dts-v1/;
32 #include "r8a7745-iwg22m.dtsi"
33 #include <dt-bindings/pwm/pwm.h>
34
35 / {
36         model = "iWave Systems RainboW-G22D-SODIMM board based on RZ/G1E";
37         compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745";
38
39         aliases {
40                 ethernet0 = &avb;
41                 serial3 = &scif4;
42                 serial5 = &hscif1;
43         };
44
45         chosen {
46                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
47                 stdout-path = "serial3:115200n8";
48         };
49
50         audio_clock: audio_clock {
51                 compatible = "fixed-clock";
52                 #clock-cells = <0>;
53                 clock-frequency = <26000000>;
54         };
55
56         backlight_lcd: backlight {
57                 compatible = "pwm-backlight";
58                 pwms = <&tpu 3 5000000 PWM_POLARITY_INVERTED>;
59                 brightness-levels = <0 4 8 16 32 64 128 255>;
60                 default-brightness-level = <7>;
61         };
62
63         lcd_panel: lcd {
64                 compatible = "edt,etm043080dh6gp";
65                 power-supply = <&vccq_panel>;
66                 backlight = <&backlight_lcd>;
67
68                 port {
69                         lcd_in: endpoint {
70                                 remote-endpoint = <&du_out_rgb0>;
71                         };
72                 };
73         };
74
75         vccq_panel: regulator-vccq-panel {
76                 compatible = "regulator-fixed";
77                 regulator-name = "Panel VccQ";
78                 regulator-min-microvolt = <3300000>;
79                 regulator-max-microvolt = <3300000>;
80                 gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
81                 enable-active-high;
82         };
83
84         vccq_sdhi0: regulator-vccq-sdhi0 {
85                 compatible = "regulator-gpio";
86
87                 regulator-name = "SDHI0 VccQ";
88                 regulator-min-microvolt = <1800000>;
89                 regulator-max-microvolt = <3300000>;
90
91                 gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
92                 gpios-states = <1>;
93                 states = <3300000 1>, <1800000 0>;
94         };
95
96         rsnd_sgtl5000: sound {
97                 compatible = "simple-audio-card";
98                 simple-audio-card,format = "i2s";
99                 simple-audio-card,bitclock-master = <&sndcodec>;
100                 simple-audio-card,frame-master = <&sndcodec>;
101
102                 sndcpu: simple-audio-card,cpu {
103                         sound-dai = <&rcar_sound>;
104                 };
105
106                 sndcodec: simple-audio-card,codec {
107                         sound-dai = <&sgtl5000>;
108                 };
109         };
110 };
111
112 &avb {
113         pinctrl-0 = <&avb_pins>;
114         pinctrl-names = "default";
115
116         phy-handle = <&phy3>;
117         phy-mode = "gmii";
118         renesas,no-ether-link;
119         status = "okay";
120
121         phy3: ethernet-phy@3 {
122         /*
123          * On some older versions of the platform (before R4.0) the phy address
124          * may be 1 or 3. The address is fixed to 3 for R4.0 onwards.
125          */
126                 reg = <3>;
127                 micrel,led-mode = <1>;
128         };
129 };
130
131 &can0 {
132         pinctrl-0 = <&can0_pins>;
133         pinctrl-names = "default";
134
135         status = "okay";
136 };
137
138 &du {
139         pinctrl-0 = <&du0_pins>;
140         pinctrl-names = "default";
141
142         status = "okay";
143
144         ports {
145                 port@0 {
146                         endpoint {
147                                 remote-endpoint = <&lcd_in>;
148                         };
149                 };
150         };
151 };
152
153 &hscif1 {
154         pinctrl-0 = <&hscif1_pins>;
155         pinctrl-names = "default";
156
157         uart-has-rtscts;
158         status = "okay";
159 };
160
161 &hsusb {
162         status = "okay";
163         pinctrl-0 = <&usb0_pins>;
164         pinctrl-names = "default";
165 };
166
167 &i2c5 {
168         pinctrl-0 = <&i2c5_pins>;
169         pinctrl-names = "default";
170
171         status = "okay";
172         clock-frequency = <400000>;
173
174         sgtl5000: codec@a {
175                 compatible = "fsl,sgtl5000";
176                 #sound-dai-cells = <0>;
177                 reg = <0x0a>;
178                 clocks = <&audio_clock>;
179                 VDDA-supply = <&reg_3p3v>;
180                 VDDIO-supply = <&reg_3p3v>;
181         };
182
183         stmpe811@44 {
184                 compatible = "st,stmpe811";
185                 reg = <0x44>;
186                 interrupt-parent = <&gpio4>;
187                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
188
189                 /* 3.25 MHz ADC clock speed */
190                 st,adc-freq = <1>;
191                 /* ADC conversion time: 80 clocks */
192                 st,sample-time = <4>;
193                 /* 12-bit ADC */
194                 st,mod-12b = <1>;
195                 /* internal ADC reference */
196                 st,ref-sel = <0>;
197
198                 stmpe_touchscreen {
199                         compatible = "st,stmpe-ts";
200                         /* 8 sample average control */
201                         st,ave-ctrl = <3>;
202                         /* 7 length fractional part in z */
203                         st,fraction-z = <7>;
204                         /*
205                          * 50 mA typical 80 mA max touchscreen drivers
206                          * current limit value
207                          */
208                         st,i-drive = <1>;
209                         /* 1 ms panel driver settling time */
210                         st,settling = <3>;
211                         /* 5 ms touch detect interrupt delay */
212                         st,touch-det-delay = <5>;
213                 };
214         };
215 };
216
217 &pci1 {
218         status = "okay";
219         pinctrl-0 = <&usb1_pins>;
220         pinctrl-names = "default";
221 };
222
223 &pfc {
224         avb_pins: avb {
225                 groups = "avb_mdio", "avb_gmii";
226                 function = "avb";
227         };
228
229         backlight_pins: backlight {
230                 groups = "tpu_to3_c";
231                 function = "tpu";
232         };
233
234         can0_pins: can0 {
235                 groups = "can0_data";
236                 function = "can0";
237         };
238
239         du0_pins: du0 {
240                 groups = "du0_rgb666", "du0_sync", "du0_disp", "du0_clk0_out";
241                 function = "du0";
242         };
243
244         hscif1_pins: hscif1 {
245                 groups = "hscif1_data", "hscif1_ctrl";
246                 function = "hscif1";
247         };
248
249         i2c5_pins: i2c5 {
250                 groups = "i2c5_b";
251                 function = "i2c5";
252         };
253
254         scif4_pins: scif4 {
255                 groups = "scif4_data_b";
256                 function = "scif4";
257         };
258
259         sdhi0_pins: sd0 {
260                 groups = "sdhi0_data4", "sdhi0_ctrl";
261                 function = "sdhi0";
262                 power-source = <3300>;
263         };
264
265         sound_pins: sound {
266                 groups = "ssi34_ctrl", "ssi3_data", "ssi4_data";
267                 function = "ssi";
268         };
269
270         usb0_pins: usb0 {
271                 groups = "usb0";
272                 function = "usb0";
273         };
274
275         usb1_pins: usb1 {
276                 groups = "usb1";
277                 function = "usb1";
278         };
279 };
280
281 &rcar_sound {
282         pinctrl-0 = <&sound_pins>;
283         pinctrl-names = "default";
284         status = "okay";
285
286         /* Single DAI */
287
288         #sound-dai-cells = <0>;
289
290         rcar_sound,dai {
291                 dai0 {
292                         playback = <&ssi3>, <&src3>, <&dvc0>;
293                         capture = <&ssi4>, <&src4>, <&dvc1>;
294                 };
295         };
296 };
297
298 &scif4 {
299         pinctrl-0 = <&scif4_pins>;
300         pinctrl-names = "default";
301
302         status = "okay";
303 };
304
305 &sdhi0 {
306         pinctrl-0 = <&sdhi0_pins>;
307         pinctrl-names = "default";
308
309         vmmc-supply = <&reg_3p3v>;
310         vqmmc-supply = <&vccq_sdhi0>;
311         cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
312         status = "okay";
313 };
314
315 &ssi4 {
316         shared-pin;
317 };
318
319 &tpu {
320         pinctrl-0 = <&backlight_pins>;
321         pinctrl-names = "default";
322         status = "okay";
323 };
324
325 &usbphy {
326         status = "okay";
327 };