arch/arm/boot/dts/r8a7742.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a7742 SoC
   4  *
   5  * Copyright (C) 2020 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11 #include <dt-bindings/power/r8a7742-sysc.h>
  12
  13 / {
  14         compatible = "renesas,r8a7742";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         /*
  19          * The external audio clocks are configured as 0 Hz fixed frequency
  20          * clocks by default.
  21          * Boards that provide audio clocks should override them.
  22          */
  23         audio_clk_a: audio_clk_a {
  24                 compatible = "fixed-clock";
  25                 #clock-cells = <0>;
  26                 clock-frequency = <0>;
  27         };
  28         audio_clk_b: audio_clk_b {
  29                 compatible = "fixed-clock";
  30                 #clock-cells = <0>;
  31                 clock-frequency = <0>;
  32         };
  33         audio_clk_c: audio_clk_c {
  34                 compatible = "fixed-clock";
  35                 #clock-cells = <0>;
  36                 clock-frequency = <0>;
  37         };
  38
  39         /* External CAN clock */
  40         can_clk: can {
  41                 compatible = "fixed-clock";
  42                 #clock-cells = <0>;
  43                 /* This value must be overridden by the board. */
  44                 clock-frequency = <0>;
  45         };
  46
  47         cpus {
  48                 #address-cells = <1>;
  49                 #size-cells = <0>;
  50
  51                 cpu0: cpu@0 {
  52                         device_type = "cpu";
  53                         compatible = "arm,cortex-a15";
  54                         reg = <0>;
  55                         clock-frequency = <1400000000>;
  56                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
  57                         power-domains = <&sysc R8A7742_PD_CA15_CPU0>;
  58                         enable-method = "renesas,apmu";
  59                         next-level-cache = <&L2_CA15>;
  60                         capacity-dmips-mhz = <1024>;
  61                         voltage-tolerance = <1>; /* 1% */
  62                         clock-latency = <300000>; /* 300 us */
  63
  64                         /* kHz - uV - OPPs unknown yet */
  65                         operating-points = <1400000 1000000>,
  66                                            <1225000 1000000>,
  67                                            <1050000 1000000>,
  68                                            < 875000 1000000>,
  69                                            < 700000 1000000>,
  70                                            < 350000 1000000>;
  71                 };
  72
  73                 cpu1: cpu@1 {
  74                         device_type = "cpu";
  75                         compatible = "arm,cortex-a15";
  76                         reg = <1>;
  77                         clock-frequency = <1400000000>;
  78                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
  79                         power-domains = <&sysc R8A7742_PD_CA15_CPU1>;
  80                         enable-method = "renesas,apmu";
  81                         next-level-cache = <&L2_CA15>;
  82                         capacity-dmips-mhz = <1024>;
  83                         voltage-tolerance = <1>; /* 1% */
  84                         clock-latency = <300000>; /* 300 us */
  85
  86                         /* kHz - uV - OPPs unknown yet */
  87                         operating-points = <1400000 1000000>,
  88                                            <1225000 1000000>,
  89                                            <1050000 1000000>,
  90                                            < 875000 1000000>,
  91                                            < 700000 1000000>,
  92                                            < 350000 1000000>;
  93                 };
  94
  95                 cpu2: cpu@2 {
  96                         device_type = "cpu";
  97                         compatible = "arm,cortex-a15";
  98                         reg = <2>;
  99                         clock-frequency = <1400000000>;
 100                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
 101                         power-domains = <&sysc R8A7742_PD_CA15_CPU2>;
 102                         enable-method = "renesas,apmu";
 103                         next-level-cache = <&L2_CA15>;
 104                         capacity-dmips-mhz = <1024>;
 105                         voltage-tolerance = <1>; /* 1% */
 106                         clock-latency = <300000>; /* 300 us */
 107
 108                         /* kHz - uV - OPPs unknown yet */
 109                         operating-points = <1400000 1000000>,
 110                                            <1225000 1000000>,
 111                                            <1050000 1000000>,
 112                                            < 875000 1000000>,
 113                                            < 700000 1000000>,
 114                                            < 350000 1000000>;
 115                 };
 116
 117                 cpu3: cpu@3 {
 118                         device_type = "cpu";
 119                         compatible = "arm,cortex-a15";
 120                         reg = <3>;
 121                         clock-frequency = <1400000000>;
 122                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
 123                         power-domains = <&sysc R8A7742_PD_CA15_CPU3>;
 124                         enable-method = "renesas,apmu";
 125                         next-level-cache = <&L2_CA15>;
 126                         capacity-dmips-mhz = <1024>;
 127                         voltage-tolerance = <1>; /* 1% */
 128                         clock-latency = <300000>; /* 300 us */
 129
 130                         /* kHz - uV - OPPs unknown yet */
 131                         operating-points = <1400000 1000000>,
 132                                            <1225000 1000000>,
 133                                            <1050000 1000000>,
 134                                            < 875000 1000000>,
 135                                            < 700000 1000000>,
 136                                            < 350000 1000000>;
 137                 };
 138
 139                 cpu4: cpu@100 {
 140                         device_type = "cpu";
 141                         compatible = "arm,cortex-a7";
 142                         reg = <0x100>;
 143                         clock-frequency = <780000000>;
 144                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
 145                         power-domains = <&sysc R8A7742_PD_CA7_CPU0>;
 146                         next-level-cache = <&L2_CA7>;
 147                 };
 148
 149                 cpu5: cpu@101 {
 150                         device_type = "cpu";
 151                         compatible = "arm,cortex-a7";
 152                         reg = <0x101>;
 153                         clock-frequency = <780000000>;
 154                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
 155                         power-domains = <&sysc R8A7742_PD_CA7_CPU1>;
 156                         next-level-cache = <&L2_CA7>;
 157                 };
 158
 159                 cpu6: cpu@102 {
 160                         device_type = "cpu";
 161                         compatible = "arm,cortex-a7";
 162                         reg = <0x102>;
 163                         clock-frequency = <780000000>;
 164                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
 165                         power-domains = <&sysc R8A7742_PD_CA7_CPU2>;
 166                         next-level-cache = <&L2_CA7>;
 167                 };
 168
 169                 cpu7: cpu@103 {
 170                         device_type = "cpu";
 171                         compatible = "arm,cortex-a7";
 172                         reg = <0x103>;
 173                         clock-frequency = <780000000>;
 174                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
 175                         power-domains = <&sysc R8A7742_PD_CA7_CPU3>;
 176                         next-level-cache = <&L2_CA7>;
 177                 };
 178
 179                 L2_CA15: cache-controller-0 {
 180                         compatible = "cache";
 181                         power-domains = <&sysc R8A7742_PD_CA15_SCU>;
 182                         cache-unified;
 183                         cache-level = <2>;
 184                 };
 185
 186                 L2_CA7: cache-controller-1 {
 187                         compatible = "cache";
 188                         power-domains = <&sysc R8A7742_PD_CA7_SCU>;
 189                         cache-unified;
 190                         cache-level = <2>;
 191                 };
 192         };
 193
 194         /* External root clock */
 195         extal_clk: extal {
 196                 compatible = "fixed-clock";
 197                 #clock-cells = <0>;
 198                 /* This value must be overridden by the board. */
 199                 clock-frequency = <0>;
 200         };
 201
 202         /* External PCIe clock - can be overridden by the board */
 203         pcie_bus_clk: pcie_bus {
 204                 compatible = "fixed-clock";
 205                 #clock-cells = <0>;
 206                 clock-frequency = <0>;
 207         };
 208
 209         pmu-0 {
 210                 compatible = "arm,cortex-a15-pmu";
 211                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 212                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 213                                       <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 214                                       <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 215                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 216         };
 217
 218         pmu-1 {
 219                 compatible = "arm,cortex-a7-pmu";
 220                 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
 221                                       <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
 222                                       <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 223                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 224                 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
 225         };
 226
 227         /* External SCIF clock */
 228         scif_clk: scif {
 229                 compatible = "fixed-clock";
 230                 #clock-cells = <0>;
 231                 /* This value must be overridden by the board. */
 232                 clock-frequency = <0>;
 233         };
 234
 235         soc {
 236                 compatible = "simple-bus";
 237                 interrupt-parent = <&gic>;
 238
 239                 #address-cells = <2>;
 240                 #size-cells = <2>;
 241                 ranges;
 242
 243                 rwdt: watchdog@e6020000 {
 244                         compatible = "renesas,r8a7742-wdt",
 245                                      "renesas,rcar-gen2-wdt";
 246                         reg = <0 0xe6020000 0 0x0c>;
 247                         interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 248                         clocks = <&cpg CPG_MOD 402>;
 249                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 250                         resets = <&cpg 402>;
 251                         status = "disabled";
 252                 };
 253
 254                 gpio0: gpio@e6050000 {
 255                         compatible = "renesas,gpio-r8a7742",
 256                                      "renesas,rcar-gen2-gpio";
 257                         reg = <0 0xe6050000 0 0x50>;
 258                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 259                         #gpio-cells = <2>;
 260                         gpio-controller;
 261                         gpio-ranges = <&pfc 0 0 32>;
 262                         #interrupt-cells = <2>;
 263                         interrupt-controller;
 264                         clocks = <&cpg CPG_MOD 912>;
 265                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 266                         resets = <&cpg 912>;
 267                 };
 268
 269                 gpio1: gpio@e6051000 {
 270                         compatible = "renesas,gpio-r8a7742",
 271                                      "renesas,rcar-gen2-gpio";
 272                         reg = <0 0xe6051000 0 0x50>;
 273                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 274                         #gpio-cells = <2>;
 275                         gpio-controller;
 276                         gpio-ranges = <&pfc 0 32 30>;
 277                         #interrupt-cells = <2>;
 278                         interrupt-controller;
 279                         clocks = <&cpg CPG_MOD 911>;
 280                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 281                         resets = <&cpg 911>;
 282                 };
 283
 284                 gpio2: gpio@e6052000 {
 285                         compatible = "renesas,gpio-r8a7742",
 286                                      "renesas,rcar-gen2-gpio";
 287                         reg = <0 0xe6052000 0 0x50>;
 288                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 289                         #gpio-cells = <2>;
 290                         gpio-controller;
 291                         gpio-ranges = <&pfc 0 64 30>;
 292                         #interrupt-cells = <2>;
 293                         interrupt-controller;
 294                         clocks = <&cpg CPG_MOD 910>;
 295                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 296                         resets = <&cpg 910>;
 297                 };
 298
 299                 gpio3: gpio@e6053000 {
 300                         compatible = "renesas,gpio-r8a7742",
 301                                      "renesas,rcar-gen2-gpio";
 302                         reg = <0 0xe6053000 0 0x50>;
 303                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 304                         #gpio-cells = <2>;
 305                         gpio-controller;
 306                         gpio-ranges = <&pfc 0 96 32>;
 307                         #interrupt-cells = <2>;
 308                         interrupt-controller;
 309                         clocks = <&cpg CPG_MOD 909>;
 310                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 311                         resets = <&cpg 909>;
 312                 };
 313
 314                 gpio4: gpio@e6054000 {
 315                         compatible = "renesas,gpio-r8a7742",
 316                                      "renesas,rcar-gen2-gpio";
 317                         reg = <0 0xe6054000 0 0x50>;
 318                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 319                         #gpio-cells = <2>;
 320                         gpio-controller;
 321                         gpio-ranges = <&pfc 0 128 32>;
 322                         #interrupt-cells = <2>;
 323                         interrupt-controller;
 324                         clocks = <&cpg CPG_MOD 908>;
 325                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 326                         resets = <&cpg 908>;
 327                 };
 328
 329                 gpio5: gpio@e6055000 {
 330                         compatible = "renesas,gpio-r8a7742",
 331                                      "renesas,rcar-gen2-gpio";
 332                         reg = <0 0xe6055000 0 0x50>;
 333                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 334                         #gpio-cells = <2>;
 335                         gpio-controller;
 336                         gpio-ranges = <&pfc 0 160 32>;
 337                         #interrupt-cells = <2>;
 338                         interrupt-controller;
 339                         clocks = <&cpg CPG_MOD 907>;
 340                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 341                         resets = <&cpg 907>;
 342                 };
 343
 344                 pfc: pinctrl@e6060000 {
 345                         compatible = "renesas,pfc-r8a7742";
 346                         reg = <0 0xe6060000 0 0x250>;
 347                 };
 348
 349                 tpu: pwm@e60f0000 {
 350                         compatible = "renesas,tpu-r8a7742", "renesas,tpu";
 351                         reg = <0 0xe60f0000 0 0x148>;
 352                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
 353                         clocks = <&cpg CPG_MOD 304>;
 354                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 355                         resets = <&cpg 304>;
 356                         #pwm-cells = <3>;
 357                         status = "disabled";
 358                 };
 359
 360                 cpg: clock-controller@e6150000 {
 361                         compatible = "renesas,r8a7742-cpg-mssr";
 362                         reg = <0 0xe6150000 0 0x1000>;
 363                         clocks = <&extal_clk>, <&usb_extal_clk>;
 364                         clock-names = "extal", "usb_extal";
 365                         #clock-cells = <2>;
 366                         #power-domain-cells = <0>;
 367                         #reset-cells = <1>;
 368                 };
 369
 370                 apmu@e6151000 {
 371                         compatible = "renesas,r8a7742-apmu", "renesas,apmu";
 372                         reg = <0 0xe6151000 0 0x188>;
 373                         cpus = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
 374                 };
 375
 376                 apmu@e6152000 {
 377                         compatible = "renesas,r8a7742-apmu", "renesas,apmu";
 378                         reg = <0 0xe6152000 0 0x188>;
 379                         cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 380                 };
 381
 382                 rst: reset-controller@e6160000 {
 383                         compatible = "renesas,r8a7742-rst";
 384                         reg = <0 0xe6160000 0 0x0100>;
 385                 };
 386
 387                 sysc: system-controller@e6180000 {
 388                         compatible = "renesas,r8a7742-sysc";
 389                         reg = <0 0xe6180000 0 0x0200>;
 390                         #power-domain-cells = <1>;
 391                 };
 392
 393                 irqc: interrupt-controller@e61c0000 {
 394                         compatible = "renesas,irqc-r8a7742", "renesas,irqc";
 395                         #interrupt-cells = <2>;
 396                         interrupt-controller;
 397                         reg = <0 0xe61c0000 0 0x200>;
 398                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 399                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 400                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 401                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 402                         clocks = <&cpg CPG_MOD 407>;
 403                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 404                         resets = <&cpg 407>;
 405                 };
 406
 407                 thermal: thermal@e61f0000 {
 408                         compatible = "renesas,thermal-r8a7742",
 409                                      "renesas,rcar-gen2-thermal";
 410                         reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
 411                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 412                         clocks = <&cpg CPG_MOD 522>;
 413                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 414                         resets = <&cpg 522>;
 415                         #thermal-sensor-cells = <0>;
 416                 };
 417
 418                 ipmmu_sy0: iommu@e6280000 {
 419                         compatible = "renesas,ipmmu-r8a7742",
 420                                      "renesas,ipmmu-vmsa";
 421                         reg = <0 0xe6280000 0 0x1000>;
 422                         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
 423                                      <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
 424                         #iommu-cells = <1>;
 425                         status = "disabled";
 426                 };
 427
 428                 ipmmu_sy1: iommu@e6290000 {
 429                         compatible = "renesas,ipmmu-r8a7742",
 430                                      "renesas,ipmmu-vmsa";
 431                         reg = <0 0xe6290000 0 0x1000>;
 432                         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
 433                         #iommu-cells = <1>;
 434                         status = "disabled";
 435                 };
 436
 437                 ipmmu_ds: iommu@e6740000 {
 438                         compatible = "renesas,ipmmu-r8a7742",
 439                                      "renesas,ipmmu-vmsa";
 440                         reg = <0 0xe6740000 0 0x1000>;
 441                         interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
 442                                      <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
 443                         #iommu-cells = <1>;
 444                         status = "disabled";
 445                 };
 446
 447                 ipmmu_mp: iommu@ec680000 {
 448                         compatible = "renesas,ipmmu-r8a7742",
 449                                      "renesas,ipmmu-vmsa";
 450                         reg = <0 0xec680000 0 0x1000>;
 451                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
 452                         #iommu-cells = <1>;
 453                         status = "disabled";
 454                 };
 455
 456                 ipmmu_mx: iommu@fe951000 {
 457                         compatible = "renesas,ipmmu-r8a7742",
 458                                      "renesas,ipmmu-vmsa";
 459                         reg = <0 0xfe951000 0 0x1000>;
 460                         interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
 461                                      <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
 462                         #iommu-cells = <1>;
 463                         status = "disabled";
 464                 };
 465
 466                 icram0: sram@e63a0000 {
 467                         compatible = "mmio-sram";
 468                         reg = <0 0xe63a0000 0 0x12000>;
 469                         #address-cells = <1>;
 470                         #size-cells = <1>;
 471                         ranges = <0 0 0xe63a0000 0x12000>;
 472                 };
 473
 474                 icram1: sram@e63c0000 {
 475                         compatible = "mmio-sram";
 476                         reg = <0 0xe63c0000 0 0x1000>;
 477                         #address-cells = <1>;
 478                         #size-cells = <1>;
 479                         ranges = <0 0 0xe63c0000 0x1000>;
 480
 481                         smp-sram@0 {
 482                                 compatible = "renesas,smp-sram";
 483                                 reg = <0 0x100>;
 484                         };
 485                 };
 486
 487                 icram2: sram@e6300000 {
 488                         compatible = "mmio-sram";
 489                         reg = <0 0xe6300000 0 0x40000>;
 490                         #address-cells = <1>;
 491                         #size-cells = <1>;
 492                         ranges = <0 0 0xe6300000 0x40000>;
 493                 };
 494
 495                 i2c0: i2c@e6508000 {
 496                         #address-cells = <1>;
 497                         #size-cells = <0>;
 498                         compatible = "renesas,i2c-r8a7742",
 499                                      "renesas,rcar-gen2-i2c";
 500                         reg = <0 0xe6508000 0 0x40>;
 501                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 502                         clocks = <&cpg CPG_MOD 931>;
 503                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 504                         resets = <&cpg 931>;
 505                         i2c-scl-internal-delay-ns = <110>;
 506                         status = "disabled";
 507                 };
 508
 509                 i2c1: i2c@e6518000 {
 510                         #address-cells = <1>;
 511                         #size-cells = <0>;
 512                         compatible = "renesas,i2c-r8a7742",
 513                                      "renesas,rcar-gen2-i2c";
 514                         reg = <0 0xe6518000 0 0x40>;
 515                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 516                         clocks = <&cpg CPG_MOD 930>;
 517                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 518                         resets = <&cpg 930>;
 519                         i2c-scl-internal-delay-ns = <6>;
 520                         status = "disabled";
 521                 };
 522
 523                 i2c2: i2c@e6530000 {
 524                         #address-cells = <1>;
 525                         #size-cells = <0>;
 526                         compatible = "renesas,i2c-r8a7742",
 527                                      "renesas,rcar-gen2-i2c";
 528                         reg = <0 0xe6530000 0 0x40>;
 529                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 530                         clocks = <&cpg CPG_MOD 929>;
 531                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 532                         resets = <&cpg 929>;
 533                         i2c-scl-internal-delay-ns = <6>;
 534                         status = "disabled";
 535                 };
 536
 537                 i2c3: i2c@e6540000 {
 538                         #address-cells = <1>;
 539                         #size-cells = <0>;
 540                         compatible = "renesas,i2c-r8a7742",
 541                                      "renesas,rcar-gen2-i2c";
 542                         reg = <0 0xe6540000 0 0x40>;
 543                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 544                         clocks = <&cpg CPG_MOD 928>;
 545                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 546                         resets = <&cpg 928>;
 547                         i2c-scl-internal-delay-ns = <110>;
 548                         status = "disabled";
 549                 };
 550
 551                 iic0: i2c@e6500000 {
 552                         #address-cells = <1>;
 553                         #size-cells = <0>;
 554                         compatible = "renesas,iic-r8a7742",
 555                                      "renesas,rcar-gen2-iic",
 556                                      "renesas,rmobile-iic";
 557                         reg = <0 0xe6500000 0 0x425>;
 558                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 559                         clocks = <&cpg CPG_MOD 318>;
 560                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 561                                <&dmac1 0x61>, <&dmac1 0x62>;
 562                         dma-names = "tx", "rx", "tx", "rx";
 563                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 564                         resets = <&cpg 318>;
 565                         status = "disabled";
 566                 };
 567
 568                 iic1: i2c@e6510000 {
 569                         #address-cells = <1>;
 570                         #size-cells = <0>;
 571                         compatible = "renesas,iic-r8a7742",
 572                                      "renesas,rcar-gen2-iic",
 573                                      "renesas,rmobile-iic";
 574                         reg = <0 0xe6510000 0 0x425>;
 575                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 576                         clocks = <&cpg CPG_MOD 323>;
 577                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 578                                <&dmac1 0x65>, <&dmac1 0x66>;
 579                         dma-names = "tx", "rx", "tx", "rx";
 580                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 581                         resets = <&cpg 323>;
 582                         status = "disabled";
 583                 };
 584
 585                 iic2: i2c@e6520000 {
 586                         #address-cells = <1>;
 587                         #size-cells = <0>;
 588                         compatible = "renesas,iic-r8a7742",
 589                                      "renesas,rcar-gen2-iic",
 590                                      "renesas,rmobile-iic";
 591                         reg = <0 0xe6520000 0 0x425>;
 592                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
 593                         clocks = <&cpg CPG_MOD 300>;
 594                         dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
 595                                <&dmac1 0x69>, <&dmac1 0x6a>;
 596                         dma-names = "tx", "rx", "tx", "rx";
 597                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 598                         resets = <&cpg 300>;
 599                         status = "disabled";
 600                 };
 601
 602                 iic3: i2c@e60b0000 {
 603                         #address-cells = <1>;
 604                         #size-cells = <0>;
 605                         compatible = "renesas,iic-r8a7742";
 606                         reg = <0 0xe60b0000 0 0x425>;
 607                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 608                         clocks = <&cpg CPG_MOD 926>;
 609                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 610                                <&dmac1 0x77>, <&dmac1 0x78>;
 611                         dma-names = "tx", "rx", "tx", "rx";
 612                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 613                         resets = <&cpg 926>;
 614                         status = "disabled";
 615                 };
 616
 617                 hsusb: usb@e6590000 {
 618                         compatible = "renesas,usbhs-r8a7742",
 619                                      "renesas,rcar-gen2-usbhs";
 620                         reg = <0 0xe6590000 0 0x100>;
 621                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 622                         clocks = <&cpg CPG_MOD 704>;
 623                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 624                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 625                         dma-names = "ch0", "ch1", "ch2", "ch3";
 626                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 627                         resets = <&cpg 704>;
 628                         renesas,buswait = <4>;
 629                         phys = <&usb0 1>;
 630                         phy-names = "usb";
 631                         status = "disabled";
 632                 };
 633
 634                 usbphy: usb-phy@e6590100 {
 635                         compatible = "renesas,usb-phy-r8a7742",
 636                                      "renesas,rcar-gen2-usb-phy";
 637                         reg = <0 0xe6590100 0 0x100>;
 638                         #address-cells = <1>;
 639                         #size-cells = <0>;
 640                         clocks = <&cpg CPG_MOD 704>;
 641                         clock-names = "usbhs";
 642                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 643                         resets = <&cpg 704>;
 644                         status = "disabled";
 645
 646                         usb0: usb-channel@0 {
 647                                 reg = <0>;
 648                                 #phy-cells = <1>;
 649                         };
 650                         usb2: usb-channel@2 {
 651                                 reg = <2>;
 652                                 #phy-cells = <1>;
 653                         };
 654                 };
 655
 656                 usb_dmac0: dma-controller@e65a0000 {
 657                         compatible = "renesas,r8a7742-usb-dmac",
 658                                      "renesas,usb-dmac";
 659                         reg = <0 0xe65a0000 0 0x100>;
 660                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 661                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 662                         interrupt-names = "ch0", "ch1";
 663                         clocks = <&cpg CPG_MOD 330>;
 664                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 665                         resets = <&cpg 330>;
 666                         #dma-cells = <1>;
 667                         dma-channels = <2>;
 668                 };
 669
 670                 usb_dmac1: dma-controller@e65b0000 {
 671                         compatible = "renesas,r8a7742-usb-dmac",
 672                                      "renesas,usb-dmac";
 673                         reg = <0 0xe65b0000 0 0x100>;
 674                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 675                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 676                         interrupt-names = "ch0", "ch1";
 677                         clocks = <&cpg CPG_MOD 331>;
 678                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 679                         resets = <&cpg 331>;
 680                         #dma-cells = <1>;
 681                         dma-channels = <2>;
 682                 };
 683
 684                 dmac0: dma-controller@e6700000 {
 685                         compatible = "renesas,dmac-r8a7742",
 686                                      "renesas,rcar-dmac";
 687                         reg = <0 0xe6700000 0 0x20000>;
 688                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
 689                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 690                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 691                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 692                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 693                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 694                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 695                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 696                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 697                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 698                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 699                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 700                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 701                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 702                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 703                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 704                         interrupt-names = "error",
 705                                           "ch0", "ch1", "ch2", "ch3",
 706                                           "ch4", "ch5", "ch6", "ch7",
 707                                           "ch8", "ch9", "ch10", "ch11",
 708                                           "ch12", "ch13", "ch14";
 709                         clocks = <&cpg CPG_MOD 219>;
 710                         clock-names = "fck";
 711                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 712                         resets = <&cpg 219>;
 713                         #dma-cells = <1>;
 714                         dma-channels = <15>;
 715                 };
 716
 717                 dmac1: dma-controller@e6720000 {
 718                         compatible = "renesas,dmac-r8a7742",
 719                                      "renesas,rcar-dmac";
 720                         reg = <0 0xe6720000 0 0x20000>;
 721                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 722                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 723                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 724                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 725                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 726                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 727                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 728                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 729                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 730                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 731                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 732                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 733                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 734                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 735                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 736                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 737                         interrupt-names = "error",
 738                                           "ch0", "ch1", "ch2", "ch3",
 739                                           "ch4", "ch5", "ch6", "ch7",
 740                                           "ch8", "ch9", "ch10", "ch11",
 741                                           "ch12", "ch13", "ch14";
 742                         clocks = <&cpg CPG_MOD 218>;
 743                         clock-names = "fck";
 744                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 745                         resets = <&cpg 218>;
 746                         #dma-cells = <1>;
 747                         dma-channels = <15>;
 748                 };
 749
 750                 avb: ethernet@e6800000 {
 751                         compatible = "renesas,etheravb-r8a7742",
 752                                      "renesas,etheravb-rcar-gen2";
 753                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 754                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 755                         clocks = <&cpg CPG_MOD 812>;
 756                         clock-names = "fck";
 757                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 758                         resets = <&cpg 812>;
 759                         #address-cells = <1>;
 760                         #size-cells = <0>;
 761                         status = "disabled";
 762                 };
 763
 764                 qspi: spi@e6b10000 {
 765                         compatible = "renesas,qspi-r8a7742", "renesas,qspi";
 766                         reg = <0 0xe6b10000 0 0x2c>;
 767                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 768                         clocks = <&cpg CPG_MOD 917>;
 769                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 770                                <&dmac1 0x17>, <&dmac1 0x18>;
 771                         dma-names = "tx", "rx", "tx", "rx";
 772                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 773                         resets = <&cpg 917>;
 774                         num-cs = <1>;
 775                         #address-cells = <1>;
 776                         #size-cells = <0>;
 777                         status = "disabled";
 778                 };
 779
 780                 scifa0: serial@e6c40000 {
 781                         compatible = "renesas,scifa-r8a7742",
 782                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 783                         reg = <0 0xe6c40000 0 0x40>;
 784                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 785                         clocks = <&cpg CPG_MOD 204>;
 786                         clock-names = "fck";
 787                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 788                                <&dmac1 0x21>, <&dmac1 0x22>;
 789                         dma-names = "tx", "rx", "tx", "rx";
 790                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 791                         resets = <&cpg 204>;
 792                         status = "disabled";
 793                 };
 794
 795                 scifa1: serial@e6c50000 {
 796                         compatible = "renesas,scifa-r8a7742",
 797                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 798                         reg = <0 0xe6c50000 0 0x40>;
 799                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 800                         clocks = <&cpg CPG_MOD 203>;
 801                         clock-names = "fck";
 802                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 803                                <&dmac1 0x25>, <&dmac1 0x26>;
 804                         dma-names = "tx", "rx", "tx", "rx";
 805                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 806                         resets = <&cpg 203>;
 807                         status = "disabled";
 808                 };
 809
 810                 scifa2: serial@e6c60000 {
 811                         compatible = "renesas,scifa-r8a7742",
 812                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 813                         reg = <0 0xe6c60000 0 0x40>;
 814                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 815                         clocks = <&cpg CPG_MOD 202>;
 816                         clock-names = "fck";
 817                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 818                                <&dmac1 0x27>, <&dmac1 0x28>;
 819                         dma-names = "tx", "rx", "tx", "rx";
 820                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 821                         resets = <&cpg 202>;
 822                         status = "disabled";
 823                 };
 824
 825                 scifb0: serial@e6c20000 {
 826                         compatible = "renesas,scifb-r8a7742",
 827                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 828                         reg = <0 0xe6c20000 0 0x100>;
 829                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 830                         clocks = <&cpg CPG_MOD 206>;
 831                         clock-names = "fck";
 832                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 833                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 834                         dma-names = "tx", "rx", "tx", "rx";
 835                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 836                         resets = <&cpg 206>;
 837                         status = "disabled";
 838                 };
 839
 840                 scifb1: serial@e6c30000 {
 841                         compatible = "renesas,scifb-r8a7742",
 842                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 843                         reg = <0 0xe6c30000 0 0x100>;
 844                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 845                         clocks = <&cpg CPG_MOD 207>;
 846                         clock-names = "fck";
 847                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 848                                <&dmac1 0x19>, <&dmac1 0x1a>;
 849                         dma-names = "tx", "rx", "tx", "rx";
 850                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 851                         resets = <&cpg 207>;
 852                         status = "disabled";
 853                 };
 854
 855                 scifb2: serial@e6ce0000 {
 856                         compatible = "renesas,scifb-r8a7742",
 857                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 858                         reg = <0 0xe6ce0000 0 0x100>;
 859                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 860                         clocks = <&cpg CPG_MOD 216>;
 861                         clock-names = "fck";
 862                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 863                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 864                         dma-names = "tx", "rx", "tx", "rx";
 865                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 866                         resets = <&cpg 216>;
 867                         status = "disabled";
 868                 };
 869
 870                 scif0: serial@e6e60000 {
 871                         compatible = "renesas,scif-r8a7742",
 872                                      "renesas,rcar-gen2-scif", "renesas,scif";
 873                         reg = <0 0xe6e60000 0 0x40>;
 874                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 875                         clocks = <&cpg CPG_MOD 721>,
 876                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 877                         clock-names = "fck", "brg_int", "scif_clk";
 878                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 879                                <&dmac1 0x29>, <&dmac1 0x2a>;
 880                         dma-names = "tx", "rx", "tx", "rx";
 881                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 882                         resets = <&cpg 721>;
 883                         status = "disabled";
 884                 };
 885
 886                 scif1: serial@e6e68000 {
 887                         compatible = "renesas,scif-r8a7742",
 888                                      "renesas,rcar-gen2-scif", "renesas,scif";
 889                         reg = <0 0xe6e68000 0 0x40>;
 890                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 891                         clocks = <&cpg CPG_MOD 720>,
 892                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 893                         clock-names = "fck", "brg_int", "scif_clk";
 894                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 895                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 896                         dma-names = "tx", "rx", "tx", "rx";
 897                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 898                         resets = <&cpg 720>;
 899                         status = "disabled";
 900                 };
 901
 902                 scif2: serial@e6e56000 {
 903                         compatible = "renesas,scif-r8a7742",
 904                                      "renesas,rcar-gen2-scif", "renesas,scif";
 905                         reg = <0 0xe6e56000 0 0x40>;
 906                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 907                         clocks = <&cpg CPG_MOD 310>,
 908                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 909                         clock-names = "fck", "brg_int", "scif_clk";
 910                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 911                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 912                         dma-names = "tx", "rx", "tx", "rx";
 913                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 914                         resets = <&cpg 310>;
 915                         status = "disabled";
 916                 };
 917
 918                 hscif0: serial@e62c0000 {
 919                         compatible = "renesas,hscif-r8a7742",
 920                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 921                         reg = <0 0xe62c0000 0 0x60>;
 922                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 923                         clocks = <&cpg CPG_MOD 717>,
 924                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 925                         clock-names = "fck", "brg_int", "scif_clk";
 926                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 927                                <&dmac1 0x39>, <&dmac1 0x3a>;
 928                         dma-names = "tx", "rx", "tx", "rx";
 929                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 930                         resets = <&cpg 717>;
 931                         status = "disabled";
 932                 };
 933
 934                 hscif1: serial@e62c8000 {
 935                         compatible = "renesas,hscif-r8a7742",
 936                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 937                         reg = <0 0xe62c8000 0 0x60>;
 938                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 939                         clocks = <&cpg CPG_MOD 716>,
 940                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 941                         clock-names = "fck", "brg_int", "scif_clk";
 942                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 943                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 944                         dma-names = "tx", "rx", "tx", "rx";
 945                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 946                         resets = <&cpg 716>;
 947                         status = "disabled";
 948                 };
 949
 950                 msiof0: spi@e6e20000 {
 951                         compatible = "renesas,msiof-r8a7742",
 952                                      "renesas,rcar-gen2-msiof";
 953                         reg = <0 0xe6e20000 0 0x0064>;
 954                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 955                         clocks = <&cpg CPG_MOD 0>;
 956                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
 957                                <&dmac1 0x51>, <&dmac1 0x52>;
 958                         dma-names = "tx", "rx", "tx", "rx";
 959                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 960                         resets = <&cpg 0>;
 961                         #address-cells = <1>;
 962                         #size-cells = <0>;
 963                         status = "disabled";
 964                 };
 965
 966                 msiof1: spi@e6e10000 {
 967                         compatible = "renesas,msiof-r8a7742",
 968                                      "renesas,rcar-gen2-msiof";
 969                         reg = <0 0xe6e10000 0 0x0064>;
 970                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 971                         clocks = <&cpg CPG_MOD 208>;
 972                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
 973                                <&dmac1 0x55>, <&dmac1 0x56>;
 974                         dma-names = "tx", "rx", "tx", "rx";
 975                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 976                         resets = <&cpg 208>;
 977                         #address-cells = <1>;
 978                         #size-cells = <0>;
 979                         status = "disabled";
 980                 };
 981
 982                 msiof2: spi@e6e00000 {
 983                         compatible = "renesas,msiof-r8a7742",
 984                                      "renesas,rcar-gen2-msiof";
 985                         reg = <0 0xe6e00000 0 0x0064>;
 986                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 987                         clocks = <&cpg CPG_MOD 205>;
 988                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
 989                                <&dmac1 0x41>, <&dmac1 0x42>;
 990                         dma-names = "tx", "rx", "tx", "rx";
 991                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 992                         resets = <&cpg 205>;
 993                         #address-cells = <1>;
 994                         #size-cells = <0>;
 995                         status = "disabled";
 996                 };
 997
 998                 msiof3: spi@e6c90000 {
 999                         compatible = "renesas,msiof-r8a7742",
1000                                      "renesas,rcar-gen2-msiof";
1001                         reg = <0 0xe6c90000 0 0x0064>;
1002                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1003                         clocks = <&cpg CPG_MOD 215>;
1004                         dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1005                                <&dmac1 0x45>, <&dmac1 0x46>;
1006                         dma-names = "tx", "rx", "tx", "rx";
1007                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1008                         resets = <&cpg 215>;
1009                         #address-cells = <1>;
1010                         #size-cells = <0>;
1011                         status = "disabled";
1012                 };
1013
1014                 can0: can@e6e80000 {
1015                         compatible = "renesas,can-r8a7742",
1016                                      "renesas,rcar-gen2-can";
1017                         reg = <0 0xe6e80000 0 0x1000>;
1018                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1019                         clocks = <&cpg CPG_MOD 916>,
1020                                  <&cpg CPG_CORE R8A7742_CLK_RCAN>, <&can_clk>;
1021                         clock-names = "clkp1", "clkp2", "can_clk";
1022                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1023                         resets = <&cpg 916>;
1024                         status = "disabled";
1025                 };
1026
1027                 can1: can@e6e88000 {
1028                         compatible = "renesas,can-r8a7742",
1029                                      "renesas,rcar-gen2-can";
1030                         reg = <0 0xe6e88000 0 0x1000>;
1031                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1032                         clocks = <&cpg CPG_MOD 915>,
1033                                  <&cpg CPG_CORE R8A7742_CLK_RCAN>, <&can_clk>;
1034                         clock-names = "clkp1", "clkp2", "can_clk";
1035                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1036                         resets = <&cpg 915>;
1037                         status = "disabled";
1038                 };
1039
1040                 pwm0: pwm@e6e30000 {
1041                         compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1042                         reg = <0 0xe6e30000 0 0x8>;
1043                         clocks = <&cpg CPG_MOD 523>;
1044                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1045                         resets = <&cpg 523>;
1046                         #pwm-cells = <2>;
1047                         status = "disabled";
1048                 };
1049
1050                 pwm1: pwm@e6e31000 {
1051                         compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1052                         reg = <0 0xe6e31000 0 0x8>;
1053                         clocks = <&cpg CPG_MOD 523>;
1054                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1055                         resets = <&cpg 523>;
1056                         #pwm-cells = <2>;
1057                         status = "disabled";
1058                 };
1059
1060                 pwm2: pwm@e6e32000 {
1061                         compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1062                         reg = <0 0xe6e32000 0 0x8>;
1063                         clocks = <&cpg CPG_MOD 523>;
1064                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1065                         resets = <&cpg 523>;
1066                         #pwm-cells = <2>;
1067                         status = "disabled";
1068                 };
1069
1070                 pwm3: pwm@e6e33000 {
1071                         compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1072                         reg = <0 0xe6e33000 0 0x8>;
1073                         clocks = <&cpg CPG_MOD 523>;
1074                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1075                         resets = <&cpg 523>;
1076                         #pwm-cells = <2>;
1077                         status = "disabled";
1078                 };
1079
1080                 pwm4: pwm@e6e34000 {
1081                         compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1082                         reg = <0 0xe6e34000 0 0x8>;
1083                         clocks = <&cpg CPG_MOD 523>;
1084                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1085                         resets = <&cpg 523>;
1086                         #pwm-cells = <2>;
1087                         status = "disabled";
1088                 };
1089
1090                 pwm5: pwm@e6e35000 {
1091                         compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1092                         reg = <0 0xe6e35000 0 0x8>;
1093                         clocks = <&cpg CPG_MOD 523>;
1094                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1095                         resets = <&cpg 523>;
1096                         #pwm-cells = <2>;
1097                         status = "disabled";
1098                 };
1099
1100                 pwm6: pwm@e6e36000 {
1101                         compatible = "renesas,pwm-r8a7742", "renesas,pwm-rcar";
1102                         reg = <0 0xe6e36000 0 0x8>;
1103                         clocks = <&cpg CPG_MOD 523>;
1104                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1105                         resets = <&cpg 523>;
1106                         #pwm-cells = <2>;
1107                         status = "disabled";
1108                 };
1109
1110                 vin0: video@e6ef0000 {
1111                         compatible = "renesas,vin-r8a7742",
1112                                      "renesas,rcar-gen2-vin";
1113                         reg = <0 0xe6ef0000 0 0x1000>;
1114                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1115                         clocks = <&cpg CPG_MOD 811>;
1116                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1117                         resets = <&cpg 811>;
1118                         status = "disabled";
1119                 };
1120
1121                 vin1: video@e6ef1000 {
1122                         compatible = "renesas,vin-r8a7742",
1123                                      "renesas,rcar-gen2-vin";
1124                         reg = <0 0xe6ef1000 0 0x1000>;
1125                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1126                         clocks = <&cpg CPG_MOD 810>;
1127                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1128                         resets = <&cpg 810>;
1129                         status = "disabled";
1130                 };
1131
1132                 vin2: video@e6ef2000 {
1133                         compatible = "renesas,vin-r8a7742",
1134                                      "renesas,rcar-gen2-vin";
1135                         reg = <0 0xe6ef2000 0 0x1000>;
1136                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1137                         clocks = <&cpg CPG_MOD 809>;
1138                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1139                         resets = <&cpg 809>;
1140                         status = "disabled";
1141                 };
1142
1143                 vin3: video@e6ef3000 {
1144                         compatible = "renesas,vin-r8a7742",
1145                                      "renesas,rcar-gen2-vin";
1146                         reg = <0 0xe6ef3000 0 0x1000>;
1147                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1148                         clocks = <&cpg CPG_MOD 808>;
1149                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1150                         resets = <&cpg 808>;
1151                         status = "disabled";
1152                 };
1153
1154                 rcar_sound: sound@ec500000 {
1155                         /*
1156                          * #sound-dai-cells is required
1157                          *
1158                          * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1159                          * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1160                          */
1161                         compatible = "renesas,rcar_sound-r8a7742",
1162                                      "renesas,rcar_sound-gen2";
1163                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1164                               <0 0xec5a0000 0 0x100>,  /* ADG */
1165                               <0 0xec540000 0 0x1000>, /* SSIU */
1166                               <0 0xec541000 0 0x280>,  /* SSI */
1167                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1168                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1169
1170                         clocks = <&cpg CPG_MOD 1005>,
1171                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1172                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1173                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1174                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1175                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1176                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1177                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1178                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1179                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1180                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1181                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1182                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1183                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1184                                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1185                                  <&cpg CPG_CORE R8A7742_CLK_M2>;
1186                         clock-names = "ssi-all",
1187                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1188                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1189                                       "ssi.1", "ssi.0",
1190                                       "src.9", "src.8", "src.7", "src.6",
1191                                       "src.5", "src.4", "src.3", "src.2",
1192                                       "src.1", "src.0",
1193                                       "ctu.0", "ctu.1",
1194                                       "mix.0", "mix.1",
1195                                       "dvc.0", "dvc.1",
1196                                       "clk_a", "clk_b", "clk_c", "clk_i";
1197                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1198                         resets = <&cpg 1005>,
1199                                  <&cpg 1006>, <&cpg 1007>,
1200                                  <&cpg 1008>, <&cpg 1009>,
1201                                  <&cpg 1010>, <&cpg 1011>,
1202                                  <&cpg 1012>, <&cpg 1013>,
1203                                  <&cpg 1014>, <&cpg 1015>;
1204                         reset-names = "ssi-all",
1205                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1206                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1207                                       "ssi.1", "ssi.0";
1208
1209                         status = "disabled";
1210
1211                         rcar_sound,dvc {
1212                                 dvc0: dvc-0 {
1213                                         dmas = <&audma1 0xbc>;
1214                                         dma-names = "tx";
1215                                 };
1216                                 dvc1: dvc-1 {
1217                                         dmas = <&audma1 0xbe>;
1218                                         dma-names = "tx";
1219                                 };
1220                         };
1221
1222                         rcar_sound,mix {
1223                                 mix0: mix-0 { };
1224                                 mix1: mix-1 { };
1225                         };
1226
1227                         rcar_sound,ctu {
1228                                 ctu00: ctu-0 { };
1229                                 ctu01: ctu-1 { };
1230                                 ctu02: ctu-2 { };
1231                                 ctu03: ctu-3 { };
1232                                 ctu10: ctu-4 { };
1233                                 ctu11: ctu-5 { };
1234                                 ctu12: ctu-6 { };
1235                                 ctu13: ctu-7 { };
1236                         };
1237
1238                         rcar_sound,src {
1239                                 src0: src-0 {
1240                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1241                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1242                                         dma-names = "rx", "tx";
1243                                 };
1244                                 src1: src-1 {
1245                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1246                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1247                                         dma-names = "rx", "tx";
1248                                 };
1249                                 src2: src-2 {
1250                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1251                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1252                                         dma-names = "rx", "tx";
1253                                 };
1254                                 src3: src-3 {
1255                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1256                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1257                                         dma-names = "rx", "tx";
1258                                 };
1259                                 src4: src-4 {
1260                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1261                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1262                                         dma-names = "rx", "tx";
1263                                 };
1264                                 src5: src-5 {
1265                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1266                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1267                                         dma-names = "rx", "tx";
1268                                 };
1269                                 src6: src-6 {
1270                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1271                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1272                                         dma-names = "rx", "tx";
1273                                 };
1274                                 src7: src-7 {
1275                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1276                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1277                                         dma-names = "rx", "tx";
1278                                 };
1279                                 src8: src-8 {
1280                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1281                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1282                                         dma-names = "rx", "tx";
1283                                 };
1284                                 src9: src-9 {
1285                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1286                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1287                                         dma-names = "rx", "tx";
1288                                 };
1289                         };
1290
1291                         rcar_sound,ssi {
1292                                 ssi0: ssi-0 {
1293                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1294                                         dmas = <&audma0 0x01>, <&audma1 0x02>,
1295                                                <&audma0 0x15>, <&audma1 0x16>;
1296                                         dma-names = "rx", "tx", "rxu", "txu";
1297                                 };
1298                                 ssi1: ssi-1 {
1299                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1300                                         dmas = <&audma0 0x03>, <&audma1 0x04>,
1301                                                <&audma0 0x49>, <&audma1 0x4a>;
1302                                         dma-names = "rx", "tx", "rxu", "txu";
1303                                 };
1304                                 ssi2: ssi-2 {
1305                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1306                                         dmas = <&audma0 0x05>, <&audma1 0x06>,
1307                                                <&audma0 0x63>, <&audma1 0x64>;
1308                                         dma-names = "rx", "tx", "rxu", "txu";
1309                                 };
1310                                 ssi3: ssi-3 {
1311                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1312                                         dmas = <&audma0 0x07>, <&audma1 0x08>,
1313                                                <&audma0 0x6f>, <&audma1 0x70>;
1314                                         dma-names = "rx", "tx", "rxu", "txu";
1315                                 };
1316                                 ssi4: ssi-4 {
1317                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1318                                         dmas = <&audma0 0x09>, <&audma1 0x0a>,
1319                                                <&audma0 0x71>, <&audma1 0x72>;
1320                                         dma-names = "rx", "tx", "rxu", "txu";
1321                                 };
1322                                 ssi5: ssi-5 {
1323                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1324                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1325                                                <&audma0 0x73>, <&audma1 0x74>;
1326                                         dma-names = "rx", "tx", "rxu", "txu";
1327                                 };
1328                                 ssi6: ssi-6 {
1329                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1330                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1331                                                <&audma0 0x75>, <&audma1 0x76>;
1332                                         dma-names = "rx", "tx", "rxu", "txu";
1333                                 };
1334                                 ssi7: ssi-7 {
1335                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1336                                         dmas = <&audma0 0x0f>, <&audma1 0x10>,
1337                                                <&audma0 0x79>, <&audma1 0x7a>;
1338                                         dma-names = "rx", "tx", "rxu", "txu";
1339                                 };
1340                                 ssi8: ssi-8 {
1341                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1342                                         dmas = <&audma0 0x11>, <&audma1 0x12>,
1343                                                <&audma0 0x7b>, <&audma1 0x7c>;
1344                                         dma-names = "rx", "tx", "rxu", "txu";
1345                                 };
1346                                 ssi9: ssi-9 {
1347                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1348                                         dmas = <&audma0 0x13>, <&audma1 0x14>,
1349                                                <&audma0 0x7d>, <&audma1 0x7e>;
1350                                         dma-names = "rx", "tx", "rxu", "txu";
1351                                 };
1352                         };
1353                 };
1354
1355                 audma0: dma-controller@ec700000 {
1356                         compatible = "renesas,dmac-r8a7742",
1357                                      "renesas,rcar-dmac";
1358                         reg = <0 0xec700000 0 0x10000>;
1359                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1360                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1361                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1362                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1363                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1364                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1365                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1366                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1367                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1368                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1369                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1370                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1371                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1372                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1373                         interrupt-names = "error",
1374                                           "ch0", "ch1", "ch2", "ch3",
1375                                           "ch4", "ch5", "ch6", "ch7",
1376                                           "ch8", "ch9", "ch10", "ch11",
1377                                           "ch12";
1378                         clocks = <&cpg CPG_MOD 502>;
1379                         clock-names = "fck";
1380                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1381                         resets = <&cpg 502>;
1382                         #dma-cells = <1>;
1383                         dma-channels = <13>;
1384                 };
1385
1386                 audma1: dma-controller@ec720000 {
1387                         compatible = "renesas,dmac-r8a7742",
1388                                      "renesas,rcar-dmac";
1389                         reg = <0 0xec720000 0 0x10000>;
1390                         interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1391                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1392                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1393                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1394                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1395                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1396                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1397                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1398                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1399                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1400                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1401                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1402                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1403                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1404                         interrupt-names = "error",
1405                                           "ch0", "ch1", "ch2", "ch3",
1406                                           "ch4", "ch5", "ch6", "ch7",
1407                                           "ch8", "ch9", "ch10", "ch11",
1408                                           "ch12";
1409                         clocks = <&cpg CPG_MOD 501>;
1410                         clock-names = "fck";
1411                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1412                         resets = <&cpg 501>;
1413                         #dma-cells = <1>;
1414                         dma-channels = <13>;
1415                 };
1416
1417                 xhci: usb@ee000000 {
1418                         compatible = "renesas,xhci-r8a7742",
1419                                      "renesas,rcar-gen2-xhci";
1420                         reg = <0 0xee000000 0 0xc00>;
1421                         interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1422                         clocks = <&cpg CPG_MOD 328>;
1423                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1424                         resets = <&cpg 328>;
1425                         phys = <&usb2 1>;
1426                         phy-names = "usb";
1427                         status = "disabled";
1428                 };
1429
1430                 pci0: pci@ee090000 {
1431                         compatible = "renesas,pci-r8a7742",
1432                                      "renesas,pci-rcar-gen2";
1433                         device_type = "pci";
1434                         reg = <0 0xee090000 0 0xc00>,
1435                               <0 0xee080000 0 0x1100>;
1436                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1437                         clocks = <&cpg CPG_MOD 703>;
1438                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1439                         resets = <&cpg 703>;
1440                         status = "disabled";
1441
1442                         bus-range = <0 0>;
1443                         #address-cells = <3>;
1444                         #size-cells = <2>;
1445                         #interrupt-cells = <1>;
1446                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1447                         interrupt-map-mask = <0xf800 0 0 0x7>;
1448                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1449                                         <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1450                                         <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1451
1452                         usb@1,0 {
1453                                 reg = <0x800 0 0 0 0>;
1454                                 phys = <&usb0 0>;
1455                                 phy-names = "usb";
1456                         };
1457
1458                         usb@2,0 {
1459                                 reg = <0x1000 0 0 0 0>;
1460                                 phys = <&usb0 0>;
1461                                 phy-names = "usb";
1462                         };
1463                 };
1464
1465                 pci1: pci@ee0b0000 {
1466                         compatible = "renesas,pci-r8a7742",
1467                                      "renesas,pci-rcar-gen2";
1468                         device_type = "pci";
1469                         reg = <0 0xee0b0000 0 0xc00>,
1470                               <0 0xee0a0000 0 0x1100>;
1471                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1472                         clocks = <&cpg CPG_MOD 703>;
1473                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1474                         resets = <&cpg 703>;
1475                         status = "disabled";
1476
1477                         bus-range = <1 1>;
1478                         #address-cells = <3>;
1479                         #size-cells = <2>;
1480                         #interrupt-cells = <1>;
1481                         ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1482                         interrupt-map-mask = <0xf800 0 0 0x7>;
1483                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1484                                         <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1485                                         <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1486                 };
1487
1488                 pci2: pci@ee0d0000 {
1489                         compatible = "renesas,pci-r8a7742",
1490                                      "renesas,pci-rcar-gen2";
1491                         device_type = "pci";
1492                         clocks = <&cpg CPG_MOD 703>;
1493                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1494                         resets = <&cpg 703>;
1495                         reg = <0 0xee0d0000 0 0xc00>,
1496                               <0 0xee0c0000 0 0x1100>;
1497                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1498                         status = "disabled";
1499
1500                         bus-range = <2 2>;
1501                         #address-cells = <3>;
1502                         #size-cells = <2>;
1503                         #interrupt-cells = <1>;
1504                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1505                         interrupt-map-mask = <0xf800 0 0 0x7>;
1506                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1507                                         <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1508                                         <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1509
1510                         usb@1,0 {
1511                                 reg = <0x20800 0 0 0 0>;
1512                                 phys = <&usb2 0>;
1513                                 phy-names = "usb";
1514                         };
1515
1516                         usb@2,0 {
1517                                 reg = <0x21000 0 0 0 0>;
1518                                 phys = <&usb2 0>;
1519                                 phy-names = "usb";
1520                         };
1521                 };
1522
1523                 sdhi0: mmc@ee100000 {
1524                         compatible = "renesas,sdhi-r8a7742",
1525                                      "renesas,rcar-gen2-sdhi";
1526                         reg = <0 0xee100000 0 0x328>;
1527                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1528                         clocks = <&cpg CPG_MOD 314>;
1529                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1530                                <&dmac1 0xcd>, <&dmac1 0xce>;
1531                         dma-names = "tx", "rx", "tx", "rx";
1532                         max-frequency = <195000000>;
1533                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1534                         resets = <&cpg 314>;
1535                         status = "disabled";
1536                 };
1537
1538                 sdhi1: mmc@ee120000 {
1539                         compatible = "renesas,sdhi-r8a7742",
1540                                      "renesas,rcar-gen2-sdhi";
1541                         reg = <0 0xee120000 0 0x328>;
1542                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1543                         clocks = <&cpg CPG_MOD 313>;
1544                         dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1545                                <&dmac1 0xc9>, <&dmac1 0xca>;
1546                         dma-names = "tx", "rx", "tx", "rx";
1547                         max-frequency = <195000000>;
1548                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1549                         resets = <&cpg 313>;
1550                         status = "disabled";
1551                 };
1552
1553                 sdhi2: mmc@ee140000 {
1554                         compatible = "renesas,sdhi-r8a7742",
1555                                      "renesas,rcar-gen2-sdhi";
1556                         reg = <0 0xee140000 0 0x100>;
1557                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1558                         clocks = <&cpg CPG_MOD 312>;
1559                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1560                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1561                         dma-names = "tx", "rx", "tx", "rx";
1562                         max-frequency = <97500000>;
1563                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1564                         resets = <&cpg 312>;
1565                         status = "disabled";
1566                 };
1567
1568                 sdhi3: mmc@ee160000 {
1569                         compatible = "renesas,sdhi-r8a7742",
1570                                      "renesas,rcar-gen2-sdhi";
1571                         reg = <0 0xee160000 0 0x100>;
1572                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1573                         clocks = <&cpg CPG_MOD 311>;
1574                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1575                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1576                         dma-names = "tx", "rx", "tx", "rx";
1577                         max-frequency = <97500000>;
1578                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1579                         resets = <&cpg 311>;
1580                         status = "disabled";
1581                 };
1582
1583                 mmcif0: mmc@ee200000 {
1584                         compatible = "renesas,mmcif-r8a7742",
1585                                      "renesas,sh-mmcif";
1586                         reg = <0 0xee200000 0 0x80>;
1587                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1588                         clocks = <&cpg CPG_MOD 315>;
1589                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1590                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1591                         dma-names = "tx", "rx", "tx", "rx";
1592                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1593                         resets = <&cpg 315>;
1594                         reg-io-width = <4>;
1595                         status = "disabled";
1596                         max-frequency = <97500000>;
1597                 };
1598
1599                 mmcif1: mmc@ee220000 {
1600                         compatible = "renesas,mmcif-r8a7742",
1601                                      "renesas,sh-mmcif";
1602                         reg = <0 0xee220000 0 0x80>;
1603                         interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1604                         clocks = <&cpg CPG_MOD 305>;
1605                         dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1606                                <&dmac1 0xe1>, <&dmac1 0xe2>;
1607                         dma-names = "tx", "rx", "tx", "rx";
1608                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1609                         resets = <&cpg 305>;
1610                         reg-io-width = <4>;
1611                         status = "disabled";
1612                         max-frequency = <97500000>;
1613                 };
1614
1615                 sata0: sata@ee300000 {
1616                         compatible = "renesas,sata-r8a7742",
1617                                      "renesas,rcar-gen2-sata";
1618                         reg = <0 0xee300000 0 0x200000>;
1619                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1620                         clocks = <&cpg CPG_MOD 815>;
1621                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1622                         resets = <&cpg 815>;
1623                         status = "disabled";
1624                 };
1625
1626                 sata1: sata@ee500000 {
1627                         compatible = "renesas,sata-r8a7742",
1628                                      "renesas,rcar-gen2-sata";
1629                         reg = <0 0xee500000 0 0x200000>;
1630                         interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1631                         clocks = <&cpg CPG_MOD 814>;
1632                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1633                         resets = <&cpg 814>;
1634                         status = "disabled";
1635                 };
1636
1637                 ether: ethernet@ee700000 {
1638                         compatible = "renesas,ether-r8a7742",
1639                                      "renesas,rcar-gen2-ether";
1640                         reg = <0 0xee700000 0 0x400>;
1641                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1642                         clocks = <&cpg CPG_MOD 813>;
1643                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1644                         resets = <&cpg 813>;
1645                         phy-mode = "rmii";
1646                         #address-cells = <1>;
1647                         #size-cells = <0>;
1648                         status = "disabled";
1649                 };
1650
1651                 gic: interrupt-controller@f1001000 {
1652                         compatible = "arm,gic-400";
1653                         #interrupt-cells = <3>;
1654                         #address-cells = <0>;
1655                         interrupt-controller;
1656                         reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1657                               <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1658                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1659                         clocks = <&cpg CPG_MOD 408>;
1660                         clock-names = "clk";
1661                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1662                         resets = <&cpg 408>;
1663                 };
1664
1665                 pciec: pcie@fe000000 {
1666                         compatible = "renesas,pcie-r8a7742",
1667                                      "renesas,pcie-rcar-gen2";
1668                         reg = <0 0xfe000000 0 0x80000>;
1669                         #address-cells = <3>;
1670                         #size-cells = <2>;
1671                         bus-range = <0x00 0xff>;
1672                         device_type = "pci";
1673                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1674                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1675                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1676                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1677                         /* Map all possible DDR as inbound ranges */
1678                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1679                                      <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1680                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1681                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1682                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1683                         #interrupt-cells = <1>;
1684                         interrupt-map-mask = <0 0 0 0>;
1685                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1686                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1687                         clock-names = "pcie", "pcie_bus";
1688                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1689                         resets = <&cpg 319>;
1690                         status = "disabled";
1691                 };
1692
1693                 vsp@fe920000 {
1694                         compatible = "renesas,vsp1";
1695                         reg = <0 0xfe920000 0 0x8000>;
1696                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1697                         clocks = <&cpg CPG_MOD 130>;
1698                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1699                         resets = <&cpg 130>;
1700                 };
1701
1702                 vsp@fe928000 {
1703                         compatible = "renesas,vsp1";
1704                         reg = <0 0xfe928000 0 0x8000>;
1705                         interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1706                         clocks = <&cpg CPG_MOD 131>;
1707                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1708                         resets = <&cpg 131>;
1709                 };
1710
1711                 vsp@fe930000 {
1712                         compatible = "renesas,vsp1";
1713                         reg = <0 0xfe930000 0 0x8000>;
1714                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1715                         clocks = <&cpg CPG_MOD 128>;
1716                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1717                         resets = <&cpg 128>;
1718                 };
1719
1720                 vsp@fe938000 {
1721                         compatible = "renesas,vsp1";
1722                         reg = <0 0xfe938000 0 0x8000>;
1723                         interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1724                         clocks = <&cpg CPG_MOD 127>;
1725                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1726                         resets = <&cpg 127>;
1727                 };
1728
1729                 du: display@feb00000 {
1730                         compatible = "renesas,du-r8a7742";
1731                         reg = <0 0xfeb00000 0 0x70000>;
1732                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1733                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1734                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1735                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1736                                  <&cpg CPG_MOD 722>;
1737                         clock-names = "du.0", "du.1", "du.2";
1738                         resets = <&cpg 724>;
1739                         reset-names = "du.0";
1740                         status = "disabled";
1741
1742                         ports {
1743                                 #address-cells = <1>;
1744                                 #size-cells = <0>;
1745
1746                                 port@0 {
1747                                         reg = <0>;
1748                                         du_out_rgb: endpoint {
1749                                         };
1750                                 };
1751                                 port@1 {
1752                                         reg = <1>;
1753                                         du_out_lvds0: endpoint {
1754                                                 remote-endpoint = <&lvds0_in>;
1755                                         };
1756                                 };
1757                                 port@2 {
1758                                         reg = <2>;
1759                                         du_out_lvds1: endpoint {
1760                                                 remote-endpoint = <&lvds1_in>;
1761                                         };
1762                                 };
1763                         };
1764                 };
1765
1766                 lvds0: lvds@feb90000 {
1767                         compatible = "renesas,r8a7742-lvds";
1768                         reg = <0 0xfeb90000 0 0x14>;
1769                         clocks = <&cpg CPG_MOD 726>;
1770                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1771                         resets = <&cpg 726>;
1772                         status = "disabled";
1773
1774                         ports {
1775                                 #address-cells = <1>;
1776                                 #size-cells = <0>;
1777
1778                                 port@0 {
1779                                         reg = <0>;
1780                                         lvds0_in: endpoint {
1781                                                 remote-endpoint = <&du_out_lvds0>;
1782                                         };
1783                                 };
1784                                 port@1 {
1785                                         reg = <1>;
1786                                         lvds0_out: endpoint {
1787                                         };
1788                                 };
1789                         };
1790                 };
1791
1792                 lvds1: lvds@feb94000 {
1793                         compatible = "renesas,r8a7742-lvds";
1794                         reg = <0 0xfeb94000 0 0x14>;
1795                         clocks = <&cpg CPG_MOD 725>;
1796                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1797                         resets = <&cpg 725>;
1798                         status = "disabled";
1799
1800                         ports {
1801                                 #address-cells = <1>;
1802                                 #size-cells = <0>;
1803
1804                                 port@0 {
1805                                         reg = <0>;
1806                                         lvds1_in: endpoint {
1807                                                 remote-endpoint = <&du_out_lvds1>;
1808                                         };
1809                                 };
1810                                 port@1 {
1811                                         reg = <1>;
1812                                         lvds1_out: endpoint {
1813                                         };
1814                                 };
1815                         };
1816                 };
1817
1818                 prr: chipid@ff000044 {
1819                         compatible = "renesas,prr";
1820                         reg = <0 0xff000044 0 4>;
1821                 };
1822
1823                 cmt0: timer@ffca0000 {
1824                         compatible = "renesas,r8a7742-cmt0",
1825                                      "renesas,rcar-gen2-cmt0";
1826                         reg = <0 0xffca0000 0 0x1004>;
1827                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1828                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1829                         clocks = <&cpg CPG_MOD 124>;
1830                         clock-names = "fck";
1831                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1832                         resets = <&cpg 124>;
1833                         status = "disabled";
1834                 };
1835
1836                 cmt1: timer@e6130000 {
1837                         compatible = "renesas,r8a7742-cmt1",
1838                                      "renesas,rcar-gen2-cmt1";
1839                         reg = <0 0xe6130000 0 0x1004>;
1840                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1841                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1842                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1843                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1844                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1845                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1846                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1847                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1848                         clocks = <&cpg CPG_MOD 329>;
1849                         clock-names = "fck";
1850                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1851                         resets = <&cpg 329>;
1852                         status = "disabled";
1853                 };
1854         };
1855
1856         thermal-zones {
1857                 cpu_thermal: cpu-thermal {
1858                         polling-delay-passive = <0>;
1859                         polling-delay = <0>;
1860
1861                         thermal-sensors = <&thermal>;
1862
1863                         trips {
1864                                 cpu-crit {
1865                                         temperature = <95000>;
1866                                         hysteresis = <0>;
1867                                         type = "critical";
1868                                 };
1869                         };
1870                         cooling-maps {
1871                         };
1872                 };
1873         };
1874
1875         timer {
1876                 compatible = "arm,armv7-timer";
1877                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1878                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1879                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1880                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
1881         };
1882
1883         /* External USB clock - can be overridden by the board */
1884         usb_extal_clk: usb_extal {
1885                 compatible = "fixed-clock";
1886                 #clock-cells = <0>;
1887                 clock-frequency = <48000000>;
1888         };
1889 };