arch/arm/boot/dts/r8a7742-iwg21d-q7.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the iWave-RZ/G1H Qseven board
   4  *
   5  * Copyright (C) 2020 Renesas Electronics Corp.
   6  */
   7
   8 /*
   9  * SSI-SGTL5000
  10  *
  11  * This command is required when Playback/Capture
  12  *
  13  *      amixer set "DVC Out" 100%
  14  *      amixer set "DVC In" 100%
  15  *
  16  * You can use Mute
  17  *
  18  *      amixer set "DVC Out Mute" on
  19  *      amixer set "DVC In Mute" on
  20  *
  21  * You can use Volume Ramp
  22  *
  23  *      amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
  24  *      amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
  25  *      amixer set "DVC Out Ramp" on
  26  *      aplay xxx.wav &
  27  *      amixer set "DVC Out"  80%  // Volume Down
  28  *      amixer set "DVC Out" 100%  // Volume Up
  29  */
  30
  31 /dts-v1/;
  32 #include "r8a7742-iwg21m.dtsi"
  33
  34 / {
  35         model = "iWave Systems RainboW-G21D-Qseven board based on RZ/G1H";
  36         compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742";
  37
  38         aliases {
  39                 serial2 = &scifa2;
  40                 serial4 = &scifb2;
  41                 ethernet0 = &avb;
  42         };
  43
  44         chosen {
  45                 bootargs = "ignore_loglevel root=/dev/mmcblk0p1 rw rootwait";
  46                 stdout-path = "serial2:115200n8";
  47         };
  48
  49         audio_clock: audio_clock {
  50                 compatible = "fixed-clock";
  51                 #clock-cells = <0>;
  52                 clock-frequency = <26000000>;
  53         };
  54
  55         reg_1p5v: 1p5v {
  56                 compatible = "regulator-fixed";
  57                 regulator-name = "1P5V";
  58                 regulator-min-microvolt = <1500000>;
  59                 regulator-max-microvolt = <1500000>;
  60                 regulator-always-on;
  61         };
  62
  63         rsnd_sgtl5000: sound {
  64                 compatible = "simple-audio-card";
  65                 simple-audio-card,format = "i2s";
  66                 simple-audio-card,bitclock-master = <&sndcodec>;
  67                 simple-audio-card,frame-master = <&sndcodec>;
  68
  69                 sndcpu: simple-audio-card,cpu {
  70                         sound-dai = <&rcar_sound>;
  71                 };
  72
  73                 sndcodec: simple-audio-card,codec {
  74                         sound-dai = <&sgtl5000>;
  75                 };
  76         };
  77
  78         vcc_sdhi2: regulator-vcc-sdhi2 {
  79                 compatible = "regulator-fixed";
  80
  81                 regulator-name = "SDHI2 Vcc";
  82                 regulator-min-microvolt = <3300000>;
  83                 regulator-max-microvolt = <3300000>;
  84
  85                 gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
  86         };
  87
  88         vccq_sdhi2: regulator-vccq-sdhi2 {
  89                 compatible = "regulator-gpio";
  90
  91                 regulator-name = "SDHI2 VccQ";
  92                 regulator-min-microvolt = <1800000>;
  93                 regulator-max-microvolt = <3300000>;
  94
  95                 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  96                 gpios-states = <1>;
  97                 states = <3300000 1>, <1800000 0>;
  98         };
  99 };
 100
 101 &avb {
 102         pinctrl-0 = <&avb_pins>;
 103         pinctrl-names = "default";
 104
 105         phy-handle = <&phy3>;
 106         phy-mode = "gmii";
 107         renesas,no-ether-link;
 108         status = "okay";
 109
 110         phy3: ethernet-phy@3 {
 111                 reg = <3>;
 112                 micrel,led-mode = <1>;
 113         };
 114 };
 115
 116 &i2c2 {
 117         pinctrl-0 = <&i2c2_pins>;
 118         pinctrl-names = "default";
 119
 120         status = "okay";
 121         clock-frequency = <400000>;
 122
 123         sgtl5000: codec@a {
 124                 compatible = "fsl,sgtl5000";
 125                 #sound-dai-cells = <0>;
 126                 reg = <0x0a>;
 127                 clocks = <&audio_clock>;
 128                 VDDA-supply = <&reg_3p3v>;
 129                 VDDIO-supply = <&reg_3p3v>;
 130                 VDDD-supply = <&reg_1p5v>;
 131         };
 132 };
 133
 134 &pfc {
 135         avb_pins: avb {
 136                 groups = "avb_mdio", "avb_gmii";
 137                 function = "avb";
 138         };
 139
 140         i2c2_pins: i2c2 {
 141                 groups = "i2c2_b";
 142                 function = "i2c2";
 143         };
 144
 145         scifa2_pins: scifa2 {
 146                 groups = "scifa2_data_c";
 147                 function = "scifa2";
 148         };
 149
 150         scifb2_pins: scifb2 {
 151                 groups = "scifb2_data", "scifb2_ctrl";
 152                 function = "scifb2";
 153         };
 154
 155         sdhi2_pins: sd2 {
 156                 groups = "sdhi2_data4", "sdhi2_ctrl";
 157                 function = "sdhi2";
 158                 power-source = <3300>;
 159         };
 160
 161         sdhi2_pins_uhs: sd2_uhs {
 162                 groups = "sdhi2_data4", "sdhi2_ctrl";
 163                 function = "sdhi2";
 164                 power-source = <1800>;
 165         };
 166
 167         sound_pins: sound {
 168                 groups = "ssi34_ctrl", "ssi3_data", "ssi4_data";
 169                 function = "ssi";
 170         };
 171 };
 172
 173 &rcar_sound {
 174         pinctrl-0 = <&sound_pins>;
 175         pinctrl-names = "default";
 176         status = "okay";
 177
 178         /* Single DAI */
 179         #sound-dai-cells = <0>;
 180
 181         rcar_sound,dai {
 182                 dai0 {
 183                         playback = <&ssi4 &src4 &dvc1>;
 184                         capture = <&ssi3 &src3 &dvc0>;
 185                 };
 186         };
 187 };
 188
 189 &rwdt {
 190         timeout-sec = <60>;
 191         status = "okay";
 192 };
 193
 194 &scifa2 {
 195         pinctrl-0 = <&scifa2_pins>;
 196         pinctrl-names = "default";
 197
 198         status = "okay";
 199 };
 200
 201 &scifb2 {
 202         pinctrl-0 = <&scifb2_pins>;
 203         pinctrl-names = "default";
 204
 205         uart-has-rtscts;
 206         status = "okay";
 207 };
 208
 209 &sdhi2 {
 210         pinctrl-0 = <&sdhi2_pins>;
 211         pinctrl-1 = <&sdhi2_pins_uhs>;
 212         pinctrl-names = "default", "state_uhs";
 213
 214         vmmc-supply = <&vcc_sdhi2>;
 215         vqmmc-supply = <&vccq_sdhi2>;
 216         cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
 217         wp-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
 218         sd-uhs-sdr50;
 219         status = "okay";
 220 };
 221
 222 &ssi4 {
 223         shared-pin;
 224 };