arch/arm/boot/dts/r8a7742-iwg21d-q7-dbcm-ca.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the iWave-RZ/G1H Qseven board development
   4  * platform with camera daughter board
   5  *
   6  * Copyright (C) 2020 Renesas Electronics Corp.
   7  */
   8
   9 /dts-v1/;
  10 #include "r8a7742-iwg21d-q7.dts"
  11
  12 / {
  13         model = "iWave Systems RZ/G1H Qseven development platform with camera add-on";
  14         compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742";
  15
  16         aliases {
  17                 serial0 = &scif0;
  18                 serial1 = &scif1;
  19                 serial3 = &scifb1;
  20                 serial5 = &hscif0;
  21                 ethernet1 = &ether;
  22         };
  23 };
  24
  25 &avb {
  26         /* Pins shared with VIN0, keep status disabled */
  27         status = "disabled";
  28 };
  29
  30 &can0 {
  31         pinctrl-0 = <&can0_pins>;
  32         pinctrl-names = "default";
  33         status = "okay";
  34 };
  35
  36 &ether {
  37         pinctrl-0 = <&ether_pins>;
  38         pinctrl-names = "default";
  39
  40         phy-handle = <&phy1>;
  41         renesas,ether-link-active-low;
  42         status = "okay";
  43
  44         phy1: ethernet-phy@1 {
  45                 reg = <1>;
  46                 micrel,led-mode = <1>;
  47         };
  48 };
  49
  50 &hscif0 {
  51         pinctrl-0 = <&hscif0_pins>;
  52         pinctrl-names = "default";
  53         uart-has-rtscts;
  54         status = "okay";
  55 };
  56
  57 &pfc {
  58         can0_pins: can0 {
  59                 groups = "can0_data_d";
  60                 function = "can0";
  61         };
  62
  63         ether_pins: ether {
  64                 groups = "eth_mdio", "eth_rmii";
  65                 function = "eth";
  66         };
  67
  68         hscif0_pins: hscif0 {
  69                 groups = "hscif0_data", "hscif0_ctrl";
  70                 function = "hscif0";
  71         };
  72
  73         scif0_pins: scif0 {
  74                 groups = "scif0_data";
  75                 function = "scif0";
  76         };
  77
  78         scif1_pins: scif1 {
  79                 groups = "scif1_data";
  80                 function = "scif1";
  81         };
  82
  83         scifb1_pins: scifb1 {
  84                 groups = "scifb1_data";
  85                 function = "scifb1";
  86         };
  87 };
  88
  89 &scif0 {
  90         pinctrl-0 = <&scif0_pins>;
  91         pinctrl-names = "default";
  92         status = "okay";
  93 };
  94
  95 &scif1 {
  96         pinctrl-0 = <&scif1_pins>;
  97         pinctrl-names = "default";
  98         status = "okay";
  99 };
 100
 101 &scifb1 {
 102         pinctrl-0 = <&scifb1_pins>;
 103         pinctrl-names = "default";
 104         status = "okay";
 105
 106         rts-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
 107         cts-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
 108 };