arch/arm/boot/dts/picoxcell-pc3x2.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  Copyright (C) 2011 Picochip, Jamie Iles
   4  */
   5 / {
   6         model = "Picochip picoXcell PC3X2";
   7         compatible = "picochip,pc3x2";
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10
  11         cpus {
  12                 #address-cells = <0>;
  13                 #size-cells = <0>;
  14
  15                 cpu {
  16                         compatible = "arm,arm1176jz-s";
  17                         device_type = "cpu";
  18                         clock-frequency = <400000000>;
  19                         d-cache-line-size = <32>;
  20                         d-cache-size = <32768>;
  21                         i-cache-line-size = <32>;
  22                         i-cache-size = <32768>;
  23                 };
  24         };
  25
  26         clocks {
  27                 #address-cells = <1>;
  28                 #size-cells = <1>;
  29                 ranges;
  30
  31                 pclk: clock@0 {
  32                         compatible = "fixed-clock";
  33                         clock-outputs = "bus", "pclk";
  34                         clock-frequency = <200000000>;
  35                         ref-clock = <&ref_clk>, "ref";
  36                 };
  37         };
  38
  39         paxi {
  40                 compatible = "simple-bus";
  41                 #address-cells = <1>;
  42                 #size-cells = <1>;
  43                 ranges = <0 0x80000000 0x400000>;
  44
  45                 emac: gem@30000 {
  46                         compatible = "cadence,gem";
  47                         reg = <0x30000 0x10000>;
  48                         interrupts = <31>;
  49                 };
  50
  51                 dmac1: dmac@40000 {
  52                         compatible = "snps,dw-dmac";
  53                         reg = <0x40000 0x10000>;
  54                         interrupts = <25>;
  55                 };
  56
  57                 dmac2: dmac@50000 {
  58                         compatible = "snps,dw-dmac";
  59                         reg = <0x50000 0x10000>;
  60                         interrupts = <26>;
  61                 };
  62
  63                 vic0: interrupt-controller@60000 {
  64                         compatible = "arm,pl192-vic";
  65                         interrupt-controller;
  66                         reg = <0x60000 0x1000>;
  67                         #interrupt-cells = <1>;
  68                 };
  69
  70                 vic1: interrupt-controller@64000 {
  71                         compatible = "arm,pl192-vic";
  72                         interrupt-controller;
  73                         reg = <0x64000 0x1000>;
  74                         #interrupt-cells = <1>;
  75                 };
  76
  77                 fuse: picoxcell-fuse@80000 {
  78                         compatible = "picoxcell,fuse-pc3x2";
  79                         reg = <0x80000 0x10000>;
  80                 };
  81
  82                 ssi: picoxcell-spi@90000 {
  83                         compatible = "picoxcell,spi";
  84                         reg = <0x90000 0x10000>;
  85                         interrupt-parent = <&vic0>;
  86                         interrupts = <10>;
  87                 };
  88
  89                 ipsec: spacc@100000 {
  90                         compatible = "picochip,spacc-ipsec";
  91                         reg = <0x100000 0x10000>;
  92                         interrupt-parent = <&vic0>;
  93                         interrupts = <24>;
  94                         ref-clock = <&pclk>, "ref";
  95                 };
  96
  97                 srtp: spacc@140000 {
  98                         compatible = "picochip,spacc-srtp";
  99                         reg = <0x140000 0x10000>;
 100                         interrupt-parent = <&vic0>;
 101                         interrupts = <23>;
 102                 };
 103
 104                 l2_engine: spacc@180000 {
 105                         compatible = "picochip,spacc-l2";
 106                         reg = <0x180000 0x10000>;
 107                         interrupt-parent = <&vic0>;
 108                         interrupts = <22>;
 109                         ref-clock = <&pclk>, "ref";
 110                 };
 111
 112                 apb {
 113                         compatible = "simple-bus";
 114                         #address-cells = <1>;
 115                         #size-cells = <1>;
 116                         ranges = <0 0x200000 0x80000>;
 117
 118                         rtc0: rtc@0 {
 119                                 compatible = "picochip,pc3x2-rtc";
 120                                 clock-freq = <200000000>;
 121                                 reg = <0x00000 0xf>;
 122                                 interrupt-parent = <&vic1>;
 123                                 interrupts = <8>;
 124                         };
 125
 126                         timer0: timer@10000 {
 127                                 compatible = "picochip,pc3x2-timer";
 128                                 interrupt-parent = <&vic0>;
 129                                 interrupts = <4>;
 130                                 clock-freq = <200000000>;
 131                                 reg = <0x10000 0x14>;
 132                         };
 133
 134                         timer1: timer@10014 {
 135                                 compatible = "picochip,pc3x2-timer";
 136                                 interrupt-parent = <&vic0>;
 137                                 interrupts = <5>;
 138                                 clock-freq = <200000000>;
 139                                 reg = <0x10014 0x14>;
 140                         };
 141
 142                         timer2: timer@10028 {
 143                                 compatible = "picochip,pc3x2-timer";
 144                                 interrupt-parent = <&vic0>;
 145                                 interrupts = <6>;
 146                                 clock-freq = <200000000>;
 147                                 reg = <0x10028 0x14>;
 148                         };
 149
 150                         timer3: timer@1003c {
 151                                 compatible = "picochip,pc3x2-timer";
 152                                 interrupt-parent = <&vic0>;
 153                                 interrupts = <7>;
 154                                 clock-freq = <200000000>;
 155                                 reg = <0x1003c 0x14>;
 156                         };
 157
 158                         gpio: gpio@20000 {
 159                                 compatible = "snps,dw-apb-gpio";
 160                                 reg = <0x20000 0x1000>;
 161                                 #address-cells = <1>;
 162                                 #size-cells = <0>;
 163
 164                                 banka: gpio-controller@0 {
 165                                         compatible = "snps,dw-apb-gpio-bank";
 166                                         gpio-controller;
 167                                         #gpio-cells = <2>;
 168                                         gpio-generic,nr-gpio = <8>;
 169
 170                                         regoffset-dat = <0x50>;
 171                                         regoffset-set = <0x00>;
 172                                         regoffset-dirout = <0x04>;
 173                                 };
 174
 175                                 bankb: gpio-controller@1 {
 176                                         compatible = "snps,dw-apb-gpio-bank";
 177                                         gpio-controller;
 178                                         #gpio-cells = <2>;
 179                                         gpio-generic,nr-gpio = <8>;
 180
 181                                         regoffset-dat = <0x54>;
 182                                         regoffset-set = <0x0c>;
 183                                         regoffset-dirout = <0x10>;
 184                                 };
 185                         };
 186
 187                         uart0: uart@30000 {
 188                                 compatible = "snps,dw-apb-uart";
 189                                 reg = <0x30000 0x1000>;
 190                                 interrupt-parent = <&vic1>;
 191                                 interrupts = <10>;
 192                                 clock-frequency = <3686400>;
 193                                 reg-shift = <2>;
 194                                 reg-io-width = <4>;
 195                         };
 196
 197                         uart1: uart@40000 {
 198                                 compatible = "snps,dw-apb-uart";
 199                                 reg = <0x40000 0x1000>;
 200                                 interrupt-parent = <&vic1>;
 201                                 interrupts = <9>;
 202                                 clock-frequency = <3686400>;
 203                                 reg-shift = <2>;
 204                                 reg-io-width = <4>;
 205                         };
 206
 207                         wdog: watchdog@50000 {
 208                                 compatible = "snps,dw-apb-wdg";
 209                                 reg = <0x50000 0x10000>;
 210                                 interrupt-parent = <&vic0>;
 211                                 interrupts = <11>;
 212                                 bus-clock = <&pclk>, "bus";
 213                         };
 214                 };
 215         };
 216
 217         rwid-axi {
 218                 #address-cells = <1>;
 219                 #size-cells = <1>;
 220                 compatible = "simple-bus";
 221                 ranges;
 222
 223                 ebi@50000000 {
 224                         compatible = "simple-bus";
 225                         #address-cells = <2>;
 226                         #size-cells = <1>;
 227                         ranges = <0 0 0x40000000 0x08000000
 228                                   1 0 0x48000000 0x08000000
 229                                   2 0 0x50000000 0x08000000
 230                                   3 0 0x58000000 0x08000000>;
 231                 };
 232
 233                 axi2pico@c0000000 {
 234                         compatible = "picochip,axi2pico-pc3x2";
 235                         reg = <0xc0000000 0x10000>;
 236                         interrupts = <13 14 15 16 17 18 19 20 21>;
 237                 };
 238         };
 239 };