arch/arm/boot/dts/omap3-beagle.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
   4  */
   5 /dts-v1/;
   6
   7 #include "omap34xx.dtsi"
   8
   9 / {
  10         model = "TI OMAP3 BeagleBoard";
  11         compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3";
  12
  13         cpus {
  14                 cpu@0 {
  15                         cpu0-supply = <&vcc>;
  16                 };
  17         };
  18
  19         memory@80000000 {
  20                 device_type = "memory";
  21                 reg = <0x80000000 0x10000000>; /* 256 MB */
  22         };
  23
  24         aliases {
  25                 display0 = &dvi0;
  26                 display1 = &tv0;
  27         };
  28
  29         leds {
  30                 compatible = "gpio-leds";
  31                 pmu_stat {
  32                         label = "beagleboard::pmu_stat";
  33                         gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
  34                 };
  35
  36                 heartbeat {
  37                         label = "beagleboard::usr0";
  38                         gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
  39                         linux,default-trigger = "heartbeat";
  40                 };
  41
  42                 mmc {
  43                         label = "beagleboard::usr1";
  44                         gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
  45                         linux,default-trigger = "mmc0";
  46                 };
  47         };
  48
  49         /* HS USB Port 2 Power */
  50         hsusb2_power: hsusb2_power_reg {
  51                 compatible = "regulator-fixed";
  52                 regulator-name = "hsusb2_vbus";
  53                 regulator-min-microvolt = <3300000>;
  54                 regulator-max-microvolt = <3300000>;
  55                 gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
  56                 startup-delay-us = <70000>;
  57         };
  58
  59         /* HS USB Host PHY on PORT 2 */
  60         hsusb2_phy: hsusb2_phy {
  61                 compatible = "usb-nop-xceiv";
  62                 reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;      /* gpio_147 */
  63                 vcc-supply = <&hsusb2_power>;
  64                 #phy-cells = <0>;
  65         };
  66
  67         sound {
  68                 compatible = "ti,omap-twl4030";
  69                 ti,model = "omap3beagle";
  70
  71                 ti,mcbsp = <&mcbsp2>;
  72         };
  73
  74         gpio_keys {
  75                 compatible = "gpio-keys";
  76
  77                 user {
  78                         label = "user";
  79                         gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  80                         linux,code = <0x114>;
  81                         wakeup-source;
  82                 };
  83
  84         };
  85
  86         tfp410: encoder0 {
  87                 compatible = "ti,tfp410";
  88                 powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;  /* gpio_170 */
  89
  90                 pinctrl-names = "default";
  91                 pinctrl-0 = <&tfp410_pins>;
  92
  93                 ports {
  94                         #address-cells = <1>;
  95                         #size-cells = <0>;
  96
  97                         port@0 {
  98                                 reg = <0>;
  99
 100                                 tfp410_in: endpoint {
 101                                         remote-endpoint = <&dpi_out>;
 102                                 };
 103                         };
 104
 105                         port@1 {
 106                                 reg = <1>;
 107
 108                                 tfp410_out: endpoint {
 109                                         remote-endpoint = <&dvi_connector_in>;
 110                                 };
 111                         };
 112                 };
 113         };
 114
 115         dvi0: connector0 {
 116                 compatible = "dvi-connector";
 117                 label = "dvi";
 118
 119                 digital;
 120
 121                 ddc-i2c-bus = <&i2c3>;
 122
 123                 port {
 124                         dvi_connector_in: endpoint {
 125                                 remote-endpoint = <&tfp410_out>;
 126                         };
 127                 };
 128         };
 129
 130         tv0: connector1 {
 131                 compatible = "svideo-connector";
 132                 label = "tv";
 133
 134                 port {
 135                         tv_connector_in: endpoint {
 136                                 remote-endpoint = <&venc_out>;
 137                         };
 138                 };
 139         };
 140
 141         etb@540000000 {
 142                 compatible = "arm,coresight-etb10", "arm,primecell";
 143                 reg = <0x5401b000 0x1000>;
 144
 145                 clocks = <&emu_src_ck>;
 146                 clock-names = "apb_pclk";
 147                 in-ports {
 148                         port {
 149                                 etb_in: endpoint {
 150                                         remote-endpoint = <&etm_out>;
 151                                 };
 152                         };
 153                 };
 154         };
 155
 156         etm@54010000 {
 157                 compatible = "arm,coresight-etm3x", "arm,primecell";
 158                 reg = <0x54010000 0x1000>;
 159
 160                 clocks = <&emu_src_ck>;
 161                 clock-names = "apb_pclk";
 162                 out-ports {
 163                         port {
 164                                 etm_out: endpoint {
 165                                         remote-endpoint = <&etb_in>;
 166                                 };
 167                         };
 168                 };
 169         };
 170 };
 171
 172 &omap3_pmx_wkup {
 173         gpio1_pins: pinmux_gpio1_pins {
 174                 pinctrl-single,pins = <
 175                         OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
 176                 >;
 177         };
 178 };
 179
 180 &omap3_pmx_core {
 181         pinctrl-names = "default";
 182         pinctrl-0 = <
 183                         &hsusb2_pins
 184         >;
 185
 186         hsusb2_pins: pinmux_hsusb2_pins {
 187                 pinctrl-single,pins = <
 188                         OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi1_cs3.hsusb2_data2 */
 189                         OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_clk.hsusb2_data7 */
 190                         OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_simo.hsusb2_data4 */
 191                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_somi.hsusb2_data5 */
 192                         OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs0.hsusb2_data6 */
 193                         OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs1.hsusb2_data3 */
 194                 >;
 195         };
 196
 197         uart3_pins: pinmux_uart3_pins {
 198                 pinctrl-single,pins = <
 199                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
 200                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
 201                 >;
 202         };
 203
 204         tfp410_pins: pinmux_tfp410_pins {
 205                 pinctrl-single,pins = <
 206                         OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4)       /* hdq_sio.gpio_170 */
 207                 >;
 208         };
 209
 210         dss_dpi_pins: pinmux_dss_dpi_pins {
 211                 pinctrl-single,pins = <
 212                         OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
 213                         OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
 214                         OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
 215                         OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
 216                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
 217                         OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
 218                         OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
 219                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
 220                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
 221                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
 222                         OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
 223                         OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
 224                         OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
 225                         OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
 226                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
 227                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
 228                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
 229                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
 230                         OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
 231                         OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
 232                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
 233                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
 234                         OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
 235                         OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
 236                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
 237                         OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
 238                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
 239                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
 240                 >;
 241         };
 242 };
 243
 244 &omap3_pmx_core2 {
 245         pinctrl-names = "default";
 246         pinctrl-0 = <
 247                         &hsusb2_2_pins
 248         >;
 249
 250         hsusb2_2_pins: pinmux_hsusb2_2_pins {
 251                 pinctrl-single,pins = <
 252                         OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)            /* etk_d10.hsusb2_clk */
 253                         OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)            /* etk_d11.hsusb2_stp */
 254                         OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d12.hsusb2_dir */
 255                         OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d13.hsusb2_nxt */
 256                         OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d14.hsusb2_data0 */
 257                         OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d15.hsusb2_data1 */
 258                 >;
 259         };
 260 };
 261
 262 &i2c1 {
 263         clock-frequency = <2600000>;
 264
 265         twl: twl@48 {
 266                 reg = <0x48>;
 267                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 268                 interrupt-parent = <&intc>;
 269
 270                 twl_audio: audio {
 271                         compatible = "ti,twl4030-audio";
 272                         codec {
 273                         };
 274                 };
 275         };
 276 };
 277
 278 #include "twl4030.dtsi"
 279 #include "twl4030_omap3.dtsi"
 280
 281 &i2c3 {
 282         clock-frequency = <100000>;
 283 };
 284
 285 &mmc1 {
 286         vmmc-supply = <&vmmc1>;
 287         vqmmc-supply = <&vsim>;
 288         bus-width = <8>;
 289 };
 290
 291 &mmc2 {
 292         status = "disabled";
 293 };
 294
 295 &mmc3 {
 296         status = "disabled";
 297 };
 298
 299 &usbhshost {
 300         port2-mode = "ehci-phy";
 301 };
 302
 303 &usbhsehci {
 304         phys = <0 &hsusb2_phy>;
 305 };
 306
 307 /* Unusable as clocksource because of unreliable oscillator */
 308 &counter32k {
 309         status = "disabled";
 310 };
 311
 312 /* Unusable as clockevent because if unreliable oscillator, allow to idle */
 313 &timer1_target {
 314         /delete-property/ti,no-reset-on-init;
 315         /delete-property/ti,no-idle;
 316         timer@0 {
 317                 /delete-property/ti,timer-alwon;
 318         };
 319 };
 320
 321 /* Preferred always-on timer for clocksource */
 322 &timer12_target {
 323         ti,no-reset-on-init;
 324         ti,no-idle;
 325         timer@0 {
 326                 /* Always clocked by secure_32k_fck */
 327         };
 328 };
 329
 330 /* Preferred timer for clockevent */
 331 &timer2_target {
 332         ti,no-reset-on-init;
 333         ti,no-idle;
 334         timer@0 {
 335                 assigned-clocks = <&gpt2_fck>;
 336                 assigned-clock-parents = <&sys_ck>;
 337         };
 338 };
 339
 340 &twl_gpio {
 341         ti,use-leds;
 342         /* pullups: BIT(1) */
 343         ti,pullups = <0x000002>;
 344         /*
 345          * pulldowns:
 346          * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
 347          * BIT(15), BIT(16), BIT(17)
 348          */
 349         ti,pulldowns = <0x03a1c4>;
 350 };
 351
 352 &uart3 {
 353         pinctrl-names = "default";
 354         pinctrl-0 = <&uart3_pins>;
 355         interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
 356 };
 357
 358 &gpio1 {
 359         pinctrl-names = "default";
 360         pinctrl-0 = <&gpio1_pins>;
 361 };
 362
 363 &usb_otg_hs {
 364         interface-type = <0>;
 365         usb-phy = <&usb2_phy>;
 366         phys = <&usb2_phy>;
 367         phy-names = "usb2-phy";
 368         mode = <3>;
 369         power = <50>;
 370 };
 371
 372 &vaux2 {
 373         regulator-name = "vdd_ehci";
 374         regulator-min-microvolt = <1800000>;
 375         regulator-max-microvolt = <1800000>;
 376         regulator-always-on;
 377 };
 378
 379 &mcbsp2 {
 380         status = "okay";
 381 };
 382
 383 /* Needed to power the DPI pins */
 384 &vpll2 {
 385         regulator-always-on;
 386 };
 387
 388 &dss {
 389         status = "okay";
 390
 391         pinctrl-names = "default";
 392         pinctrl-0 = <&dss_dpi_pins>;
 393
 394         port {
 395                 dpi_out: endpoint {
 396                         remote-endpoint = <&tfp410_in>;
 397                         data-lines = <24>;
 398                 };
 399         };
 400 };
 401
 402 &venc {
 403         status = "okay";
 404
 405         vdda-supply = <&vdac>;
 406
 407         port {
 408                 venc_out: endpoint {
 409                         remote-endpoint = <&tv_connector_in>;
 410                         ti,channels = <2>;
 411                 };
 412         };
 413 };
 414
 415 &gpmc {
 416         status = "okay";
 417         ranges = <0 0 0x30000000 0x1000000>;    /* CS0 space, 16MB */
 418
 419         /* Chip select 0 */
 420         nand@0,0 {
 421                 compatible = "ti,omap2-nand";
 422                 reg = <0 0 4>;          /* NAND I/O window, 4 bytes */
 423                 interrupt-parent = <&gpmc>;
 424                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 425                              <1 IRQ_TYPE_NONE>; /* termcount */
 426                 ti,nand-ecc-opt = "ham1";
 427                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
 428                 nand-bus-width = <16>;
 429                 #address-cells = <1>;
 430                 #size-cells = <1>;
 431
 432                 gpmc,device-width = <2>;
 433                 gpmc,cs-on-ns = <0>;
 434                 gpmc,cs-rd-off-ns = <36>;
 435                 gpmc,cs-wr-off-ns = <36>;
 436                 gpmc,adv-on-ns = <6>;
 437                 gpmc,adv-rd-off-ns = <24>;
 438                 gpmc,adv-wr-off-ns = <36>;
 439                 gpmc,oe-on-ns = <6>;
 440                 gpmc,oe-off-ns = <48>;
 441                 gpmc,we-on-ns = <6>;
 442                 gpmc,we-off-ns = <30>;
 443                 gpmc,rd-cycle-ns = <72>;
 444                 gpmc,wr-cycle-ns = <72>;
 445                 gpmc,access-ns = <54>;
 446                 gpmc,wr-access-ns = <30>;
 447
 448                 partition@0 {
 449                         label = "X-Loader";
 450                         reg = <0 0x80000>;
 451                 };
 452                 partition@80000 {
 453                         label = "U-Boot";
 454                         reg = <0x80000 0x1e0000>;
 455                 };
 456                 partition@1c0000 {
 457                         label = "U-Boot Env";
 458                         reg = <0x260000 0x20000>;
 459                 };
 460                 partition@280000 {
 461                         label = "Kernel";
 462                         reg = <0x280000 0x400000>;
 463                 };
 464                 partition@780000 {
 465                         label = "Filesystem";
 466                         reg = <0x680000 0xf980000>;
 467                 };
 468         };
 469 };