arch/arm/boot/dts/imx6qdl-vicut1.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /*
   3  * Copyright (c) 2014 Protonic Holland
   4  * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
   5  */
   6
   7 #include <dt-bindings/display/sdtv-standards.h>
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10 #include <dt-bindings/leds/common.h>
  11 #include <dt-bindings/media/tvp5150.h>
  12 #include <dt-bindings/sound/fsl-imx-audmux.h>
  13
  14 / {
  15         chosen {
  16                 stdout-path = &uart4;
  17         };
  18
  19         backlight: backlight {
  20                 compatible = "pwm-backlight";
  21                 pinctrl-names = "default";
  22                 pinctrl-0 = <&pinctrl_backlight>;
  23                 pwms = <&pwm1 0 5000000 0>;
  24                 brightness-levels = <0 16 64 255>;
  25                 num-interpolated-steps = <16>;
  26                 default-brightness-level = <1>;
  27                 power-supply = <&reg_3v3>;
  28                 enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
  29         };
  30
  31         connector {
  32                 compatible = "composite-video-connector";
  33                 label = "Composite0";
  34                 sdtv-standards = <SDTV_STD_PAL_B>;
  35
  36                 port {
  37                         comp0_out: endpoint {
  38                                 remote-endpoint = <&tvp5150_comp0_in>;
  39                         };
  40                 };
  41         };
  42
  43         gpio-keys {
  44                 compatible = "gpio-keys";
  45                 autorepeat;
  46
  47                 power {
  48                         label = "Power Button";
  49                         gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
  50                         linux,code = <KEY_POWER>;
  51                         wakeup-source;
  52                 };
  53         };
  54
  55         leds {
  56                 compatible = "gpio-leds";
  57                 pinctrl-names = "default";
  58                 pinctrl-0 = <&pinctrl_leds>;
  59
  60                 led-0 {
  61                         label = "LED_DI0_DEBUG_0";
  62                         function = LED_FUNCTION_HEARTBEAT;
  63                         gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
  64                         linux,default-trigger = "heartbeat";
  65                 };
  66
  67                 led-1 {
  68                         label = "LED_DI0_DEBUG_1";
  69                         function = LED_FUNCTION_DISK;
  70                         gpios = <&gpio4 17 GPIO_ACTIVE_HIGH>;
  71                         linux,default-trigger = "disk-activity";
  72                 };
  73
  74                 led-2 {
  75                         label = "POWER_LED";
  76                         function = LED_FUNCTION_POWER;
  77                         gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
  78                         default-state = "on";
  79                 };
  80         };
  81
  82         panel {
  83                 compatible = "kyo,tcg121xglp";
  84                 backlight = <&backlight>;
  85                 power-supply = <&reg_3v3>;
  86
  87                 port {
  88                         panel_in: endpoint {
  89                                 remote-endpoint = <&lvds0_out>;
  90                         };
  91                 };
  92         };
  93
  94         reg_1v8: regulator-1v8 {
  95                 compatible = "regulator-fixed";
  96                 regulator-name = "1v8";
  97                 regulator-min-microvolt = <1800000>;
  98                 regulator-max-microvolt = <1800000>;
  99         };
 100
 101         reg_3v3: regulator-3v3 {
 102                 compatible = "regulator-fixed";
 103                 regulator-name = "3v3";
 104                 regulator-min-microvolt = <3300000>;
 105                 regulator-max-microvolt = <3300000>;
 106         };
 107
 108         reg_h1_vbus: regulator-h1-vbus {
 109                 compatible = "regulator-fixed";
 110                 regulator-name = "h1-vbus";
 111                 regulator-min-microvolt = <5000000>;
 112                 regulator-max-microvolt = <5000000>;
 113                 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
 114                 enable-active-high;
 115         };
 116
 117         reg_otg_vbus: regulator-otg-vbus {
 118                 compatible = "regulator-fixed";
 119                 regulator-name = "otg-vbus";
 120                 regulator-min-microvolt = <5000000>;
 121                 regulator-max-microvolt = <5000000>;
 122                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
 123                 enable-active-high;
 124         };
 125
 126         reg_wifi: regulator-wifi {
 127                 compatible = "regulator-fixed";
 128                 pinctrl-names = "default";
 129                 pinctrl-0 = <&pinctrl_wifi_npd>;
 130                 regulator-name = "wifi";
 131                 regulator-min-microvolt = <1800000>;
 132                 regulator-max-microvolt = <1800000>;
 133                 gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
 134                 enable-active-high;
 135                 startup-delay-us = <70000>;
 136         };
 137
 138         sound {
 139                 compatible = "simple-audio-card";
 140                 simple-audio-card,name = "prti6q-sgtl5000";
 141                 simple-audio-card,format = "i2s";
 142                 simple-audio-card,widgets =
 143                         "Microphone", "Microphone Jack",
 144                         "Line", "Line In Jack",
 145                         "Headphone", "Headphone Jack",
 146                         "Speaker", "External Speaker";
 147                 simple-audio-card,routing =
 148                         "MIC_IN", "Microphone Jack",
 149                         "LINE_IN", "Line In Jack",
 150                         "Headphone Jack", "HP_OUT",
 151                         "External Speaker", "LINE_OUT";
 152
 153                 simple-audio-card,cpu {
 154                         sound-dai = <&ssi1>;
 155                         system-clock-frequency = <0>; /* Do NOT call fsl_ssi_set_dai_sysclk! */
 156                 };
 157
 158                 simple-audio-card,codec {
 159                         sound-dai = <&codec>;
 160                         bitclock-master;
 161                         frame-master;
 162                 };
 163         };
 164 };
 165
 166 &audmux {
 167         pinctrl-names = "default";
 168         pinctrl-0 = <&pinctrl_audmux>;
 169         status = "okay";
 170
 171         mux-ssi1 {
 172                 fsl,audmux-port = <0>;
 173                 fsl,port-config = <
 174                         IMX_AUDMUX_V2_PTCR_SYN          0
 175                         IMX_AUDMUX_V2_PTCR_TFSEL(2)     0
 176                         IMX_AUDMUX_V2_PTCR_TCSEL(2)     0
 177                         IMX_AUDMUX_V2_PTCR_TFSDIR       0
 178                         IMX_AUDMUX_V2_PTCR_TCLKDIR      IMX_AUDMUX_V2_PDCR_RXDSEL(2)
 179                 >;
 180         };
 181
 182         mux-pins3 {
 183                 fsl,audmux-port = <2>;
 184                 fsl,port-config = <
 185                         IMX_AUDMUX_V2_PTCR_SYN          IMX_AUDMUX_V2_PDCR_RXDSEL(0)
 186                         0                               IMX_AUDMUX_V2_PDCR_TXRXEN
 187                 >;
 188         };
 189 };
 190
 191 &can1 {
 192         pinctrl-names = "default";
 193         pinctrl-0 = <&pinctrl_can1>;
 194         status = "okay";
 195 };
 196
 197 &can2 {
 198         pinctrl-names = "default";
 199         pinctrl-0 = <&pinctrl_can2>;
 200         status = "okay";
 201 };
 202
 203 &clks {
 204         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>;
 205         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
 206 };
 207
 208 &ecspi1 {
 209         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
 210         pinctrl-names = "default";
 211         pinctrl-0 = <&pinctrl_ecspi1>;
 212         status = "okay";
 213
 214         flash@0 {
 215                 compatible = "jedec,spi-nor";
 216                 reg = <0>;
 217                 spi-max-frequency = <20000000>;
 218         };
 219 };
 220
 221 &fec {
 222         pinctrl-names = "default";
 223         pinctrl-0 = <&pinctrl_enet>;
 224         phy-mode = "rgmii-id";
 225         phy-handle = <&rgmii_phy>;
 226         status = "okay";
 227
 228         mdio {
 229                 #address-cells = <1>;
 230                 #size-cells = <0>;
 231
 232                 /* Microchip KSZ9031RNX PHY */
 233                 rgmii_phy: ethernet-phy@0 {
 234                         reg = <0>;
 235                         interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>;
 236                         reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
 237                         reset-assert-us = <10000>;
 238                         reset-deassert-us = <300>;
 239                 };
 240         };
 241 };
 242
 243 &gpio1 {
 244         gpio-line-names =
 245                 "CAN1_TERM", "SD1_CD", "ITU656_RESET", "CAM1_MIRROR",
 246                         "CAM2_MIRROR", "", "", "SMBALERT",
 247                 "DEBUG_0", "DEBUG_1", "SDIO_SCK", "SDIO_CMD", "SDIO_D3",
 248                         "SDIO_D2", "SDIO_D1", "SDIO_D0",
 249                 "SD1_DATA0", "SD1_DATA1", "SD1_CMD", "SD1_DATA2", "SD1_CLK",
 250                         "SD1_DATA3", "", "",
 251                 "", "ETH_RESET", "WIFI_PD", "WIFI_BT_RST", "ETH_INT", "",
 252                         "WL_IRQ", "ETH_MDC";
 253 };
 254
 255 &gpio2 {
 256         gpio-line-names =
 257                 "", "", "", "", "", "", "", "",
 258                 "REV_ID0", "REV_ID1", "REV_ID2", "REV_ID3", "REV_ID4",
 259                         "BOARD_ID0", "BOARD_ID1", "BOARD_ID2",
 260                 "", "", "", "", "", "", "", "ON_SWITCH",
 261                 "POWER_LED", "", "ECSPI2_SS0", "", "", "", "", "";
 262 };
 263
 264 &gpio3 {
 265         gpio-line-names =
 266                 "", "", "", "", "", "", "", "",
 267                 "", "", "", "", "", "", "", "",
 268                 "ECSPI1_SCLK", "ECSPI1_MISO", "ECSPI1_MOSI", "ECSPI1_SS1",
 269                         "CPU_ON1_FB", "USB_OTG_OC", "USB_OTG_PWR", "YACO_IRQ",
 270                 "", "", "", "", "", "", "", "";
 271 };
 272
 273 &gpio4 {
 274         gpio-line-names =
 275                 "", "", "", "", "", "", "UART4_TXD", "UART4_RXD",
 276                 "UART5_TXD", "UART5_RXD", "CAN1_TX", "CAN1_RX", "CAN1_SR",
 277                         "CAN2_SR", "CAN2_TX", "CAN2_RX",
 278                 "LED_DI0_DEBUG_0", "LED_DI0_DEBUG_1", "", "", "", "", "", "",
 279                 "", "", "", "", "BL_EN", "BL_PWM", "", "";
 280 };
 281
 282 &gpio5 {
 283         gpio-line-names =
 284                 "", "", "", "", "", "PCIE_WAKE", "PCIE_CLKREQ", "PCIE_W_DIS",
 285                 "PCIE_RESET", "", "", "", "", "", "", "",
 286                 "", "", "ITU656_CLK", "I2S_MCLK", "ITU656_PDN", "AUDIO_RESET",
 287                         "I2S_BITCLK", "I2S_DOUT",
 288                 "I2S_LRCLK", "I2S_DIN", "I2C1_SDA", "I2C1_SCL", "YACO_AUX_RX",
 289                         "YACO_AUX_TX", "ITU656_D0", "ITU656_D1";
 290 };
 291
 292 &gpio6 {
 293         gpio-line-names =
 294                 "ITU656_D2", "ITU656_D3", "ITU656_D4", "ITU656_D5",
 295                         "ITU656_D6", "ITU656_D7", "", "",
 296                 "", "", "", "", "", "", "", "",
 297                 "", "", "", "RGMII_TXC", "RGMII_TD0", "RGMII_TD1", "RGMII_TD2",
 298                         "RGMII_TD3",
 299                 "RGMII_RX_CTL", "RGMII_RD0", "RGMII_TX_CTL", "RGMII_RD1",
 300                         "RGMII_RD2", "RGMII_RD3", "", "";
 301 };
 302
 303 &gpio7 {
 304         gpio-line-names =
 305                 "EMMC_DAT5", "EMMC_DAT4", "EMMC_CMD", "EMMC_CLK", "EMMC_DAT0",
 306                         "EMMC_DAT1", "EMMC_DAT2", "EMMC_DAT3",
 307                 "EMMC_RST", "", "", "", "CAM_DETECT", "", "", "",
 308                 "", "EMMC_DAT7", "EMMC_DAT6", "", "", "", "", "",
 309                 "", "", "", "", "", "", "", "";
 310 };
 311
 312 &i2c1 {
 313         clock-frequency = <100000>;
 314         pinctrl-names = "default";
 315         pinctrl-0 = <&pinctrl_i2c1>;
 316         status = "okay";
 317
 318         codec: audio-codec@a {
 319                 compatible = "fsl,sgtl5000";
 320                 reg = <0xa>;
 321                 #sound-dai-cells = <0>;
 322                 clocks = <&clks 201>;
 323                 VDDA-supply = <&reg_3v3>;
 324                 VDDIO-supply = <&reg_3v3>;
 325                 VDDD-supply = <&reg_1v8>;
 326         };
 327
 328         video-decoder@5c {
 329                 compatible = "ti,tvp5150";
 330                 reg = <0x5c>;
 331                 #address-cells = <1>;
 332                 #size-cells = <0>;
 333
 334                 port@0 {
 335                         reg = <0>;
 336
 337                         tvp5150_comp0_in: endpoint {
 338                                 remote-endpoint = <&comp0_out>;
 339                         };
 340                 };
 341
 342                 /* Output port 2 is video output pad */
 343                 port@2 {
 344                         reg = <2>;
 345
 346                         tvp5151_to_ipu1_csi0_mux: endpoint {
 347                                 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
 348                         };
 349                 };
 350         };
 351 };
 352
 353 &i2c3 {
 354         clock-frequency = <100000>;
 355         pinctrl-names = "default";
 356         pinctrl-0 = <&pinctrl_i2c3>;
 357         status = "okay";
 358
 359         adc@49 {
 360                 compatible = "ti,ads1015";
 361                 reg = <0x49>;
 362                 #address-cells = <1>;
 363                 #size-cells = <0>;
 364
 365                 channel@4 {
 366                         reg = <4>;
 367                         ti,gain = <3>;
 368                         ti,datarate = <3>;
 369                 };
 370
 371                 channel@5 {
 372                         reg = <5>;
 373                         ti,gain = <3>;
 374                         ti,datarate = <3>;
 375                 };
 376
 377                 channel@6 {
 378                         reg = <6>;
 379                         ti,gain = <3>;
 380                         ti,datarate = <3>;
 381                 };
 382
 383                 channel@7 {
 384                         reg = <7>;
 385                         ti,gain = <3>;
 386                         ti,datarate = <3>;
 387                 };
 388         };
 389
 390         rtc@51 {
 391                 compatible = "nxp,pcf8563";
 392                 reg = <0x51>;
 393         };
 394
 395         temperature-sensor@70 {
 396                 compatible = "ti,tmp103";
 397                 reg = <0x70>;
 398         };
 399 };
 400
 401 &ipu1_csi0 {
 402         pinctrl-names = "default";
 403         pinctrl-0 = <&pinctrl_ipu1_csi0>;
 404         status = "okay";
 405 };
 406
 407 &ipu1_csi0_mux_from_parallel_sensor {
 408         remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>;
 409 };
 410
 411 &ldb {
 412         status = "okay";
 413
 414         lvds-channel@0 {
 415                 status = "okay";
 416
 417                 port@4 {
 418                         reg = <4>;
 419
 420                         lvds0_out: endpoint {
 421                                 remote-endpoint = <&panel_in>;
 422                         };
 423                 };
 424         };
 425 };
 426
 427 &pcie {
 428         status = "okay";
 429 };
 430
 431 &pwm1 {
 432         pinctrl-names = "default";
 433         pinctrl-0 = <&pinctrl_pwm1>;
 434         status = "okay";
 435 };
 436
 437 &ssi1 {
 438         #sound-dai-cells = <0>;
 439         fsl,mode = "ac97-slave";
 440         status = "okay";
 441 };
 442
 443 &uart1 {
 444         pinctrl-names = "default";
 445         pinctrl-0 = <&pinctrl_uart1>;
 446         status = "okay";
 447 };
 448
 449 &uart2 {
 450         pinctrl-names = "default";
 451         pinctrl-0 = <&pinctrl_uart2>;
 452         status = "okay";
 453 };
 454
 455 &uart3 {
 456         pinctrl-names = "default";
 457         pinctrl-0 = <&pinctrl_uart3>;
 458         status = "okay";
 459 };
 460
 461 &uart4 {
 462         pinctrl-names = "default";
 463         pinctrl-0 = <&pinctrl_uart4>;
 464         status = "okay";
 465 };
 466
 467 &uart5 {
 468         pinctrl-names = "default";
 469         pinctrl-0 = <&pinctrl_uart5>;
 470         status = "okay";
 471 };
 472
 473 &usbh1 {
 474         vbus-supply = <&reg_h1_vbus>;
 475         pinctrl-names = "default";
 476         phy_type = "utmi";
 477         dr_mode = "host";
 478         status = "okay";
 479 };
 480
 481 &usbotg {
 482         vbus-supply = <&reg_otg_vbus>;
 483         pinctrl-names = "default";
 484         pinctrl-0 = <&pinctrl_usbotg>;
 485         phy_type = "utmi";
 486         dr_mode = "host";
 487         disable-over-current;
 488         status = "okay";
 489 };
 490
 491 &usdhc1 {
 492         pinctrl-names = "default";
 493         pinctrl-0 = <&pinctrl_usdhc1>;
 494         cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
 495         no-1-8-v;
 496         disable-wp;
 497         cap-sd-highspeed;
 498         no-mmc;
 499         no-sdio;
 500         status = "okay";
 501 };
 502
 503 &usdhc2 {
 504         pinctrl-names = "default";
 505         pinctrl-0 = <&pinctrl_usdhc2>;
 506         vmmc-supply = <&reg_wifi>;
 507         non-removable;
 508         cap-power-off-card;
 509         keep-power-in-suspend;
 510         no-1-8-v;
 511         no-mmc;
 512         no-sd;
 513         status = "okay";
 514
 515         wifi {
 516                 compatible = "ti,wl1271";
 517                 interrupts-extended = <&gpio1 30 IRQ_TYPE_LEVEL_HIGH>;
 518                 ref-clock-frequency = "38400000";
 519                 tcxo-clock-frequency = "19200000";
 520         };
 521 };
 522
 523 &usdhc3 {
 524         pinctrl-names = "default";
 525         pinctrl-0 = <&pinctrl_usdhc3>;
 526         bus-width = <8>;
 527         no-1-8-v;
 528         non-removable;
 529         no-sd;
 530         no-sdio;
 531         status = "okay";
 532 };
 533
 534 &iomuxc {
 535         pinctrl-names = "default";
 536         pinctrl-0 = <&pinctrl_hog>;
 537
 538         pinctrl_audmux: audmuxgrp {
 539                 fsl,pins = <
 540                         /* SGTL5000 sys_mclk */
 541                         MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1                 0x030b0
 542                         MX6QDL_PAD_CSI0_DAT7__AUD3_RXD                  0x130b0
 543                         MX6QDL_PAD_CSI0_DAT4__AUD3_TXC                  0x130b0
 544                         MX6QDL_PAD_CSI0_DAT5__AUD3_TXD                  0x110b0
 545                         MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS                 0x130b0
 546                 >;
 547         };
 548
 549         pinctrl_backlight: backlightgrp {
 550                 fsl,pins = <
 551                         MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28               0x1b0b0
 552                 >;
 553         };
 554
 555         pinctrl_can1: can1grp {
 556                 fsl,pins = <
 557                         MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX                0x1b000
 558                         MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX                0x3008
 559                         /* CAN1_SR */
 560                         MX6QDL_PAD_KEY_COL3__GPIO4_IO12                 0x13008
 561                         /* CAN1_TERM */
 562                         MX6QDL_PAD_GPIO_0__GPIO1_IO00                   0x1b088
 563                 >;
 564         };
 565
 566         pinctrl_can2: can2grp {
 567                 fsl,pins = <
 568                         MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX                0x1b000
 569                         MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX                0x3008
 570                         /* CAN2_SR */
 571                         MX6QDL_PAD_KEY_ROW3__GPIO4_IO13                 0x13008
 572                 >;
 573         };
 574
 575         pinctrl_ecspi1: ecspi1grp {
 576                 fsl,pins = <
 577                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO                 0x100b1
 578                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI                 0x100b1
 579                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK                 0x100b1
 580                         /* CS */
 581                         MX6QDL_PAD_EIM_D19__GPIO3_IO19                  0x000b1
 582                 >;
 583         };
 584
 585         pinctrl_enet: enetgrp {
 586                 fsl,pins = <
 587                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC                 0x1b030
 588                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0                 0x1b030
 589                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1                 0x1b030
 590                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2                 0x1b030
 591                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3                 0x1b030
 592                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL           0x1b030
 593                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC                 0x10030
 594                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0                 0x10030
 595                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1                 0x10030
 596                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2                 0x10030
 597                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3                 0x10030
 598                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL           0x10030
 599                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK            0x10030
 600                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO                 0x10030
 601                         MX6QDL_PAD_ENET_MDC__ENET_MDC                   0x10030
 602                         /* Phy reset */
 603                         MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25              0x1b0b0
 604                         MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28               0x1b0b1
 605                 >;
 606         };
 607
 608         pinctrl_hog: hoggrp {
 609                 fsl,pins = <
 610                         /* ITU656_nRESET */
 611                         MX6QDL_PAD_GPIO_2__GPIO1_IO02                   0x1b0b0
 612                         /* CAM1_MIRROR */
 613                         MX6QDL_PAD_GPIO_3__GPIO1_IO03                   0x130b0
 614                         /* CAM2_MIRROR */
 615                         MX6QDL_PAD_GPIO_4__GPIO1_IO04                   0x130b0
 616                         /* CAM_nDETECT */
 617                         MX6QDL_PAD_GPIO_17__GPIO7_IO12                  0x1b0b0
 618                         /* nON_SWITCH */
 619                         MX6QDL_PAD_EIM_CS0__GPIO2_IO23                  0x1b0b0
 620                         /* ISB_IN1 */
 621                         MX6QDL_PAD_EIM_A16__GPIO2_IO22                  0x130b0
 622                         /* ISB_nIN2 */
 623                         MX6QDL_PAD_EIM_A17__GPIO2_IO21                  0x1b0b0
 624                         /* WARN_LIGHT */
 625                         MX6QDL_PAD_EIM_A19__GPIO2_IO19                  0x100b0
 626                         /* ON2_FB */
 627                         MX6QDL_PAD_EIM_A25__GPIO5_IO02                  0x100b0
 628                         /* YACO_nIRQ */
 629                         MX6QDL_PAD_EIM_D23__GPIO3_IO23                  0x1b0b0
 630                         /* YACO_BOOT0 */
 631                         MX6QDL_PAD_EIM_D30__GPIO3_IO30                  0x130b0
 632                         /* YACO_nRESET */
 633                         MX6QDL_PAD_EIM_D31__GPIO3_IO31                  0x1b0b0
 634                         /* FORCE_ON1 */
 635                         MX6QDL_PAD_EIM_EB2__GPIO2_IO30                  0x1b0b0
 636                         /* AUDIO_nRESET */
 637                         MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21               0x1f0b0
 638                         /* ITU656_nPDN */
 639                         MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20             0x1b0b0
 640
 641                         /* HW revision detect */
 642                         /* REV_ID0 */
 643                         MX6QDL_PAD_SD4_DAT0__GPIO2_IO08                 0x1b0b0
 644                         /* REV_ID1 */
 645                         MX6QDL_PAD_SD4_DAT1__GPIO2_IO09                 0x1b0b0
 646                         /* REV_ID2 */
 647                         MX6QDL_PAD_SD4_DAT2__GPIO2_IO10                 0x1b0b0
 648                         /* REV_ID3 */
 649                         MX6QDL_PAD_SD4_DAT3__GPIO2_IO11                 0x1b0b0
 650                         /* REV_ID4 */
 651                         MX6QDL_PAD_SD4_DAT4__GPIO2_IO12                 0x1b0b0
 652
 653                         /* New in HW revision 1 */
 654                         /* ON1_FB */
 655                         MX6QDL_PAD_EIM_D20__GPIO3_IO20                  0x100b0
 656                         /* DIP1_FB */
 657                         MX6QDL_PAD_DI0_PIN2__GPIO4_IO18                 0x1b0b0
 658
 659                         /* New in UT2: FIXME: ISB PWM should start off, PD */
 660                         /* ISB_LED_PWM */
 661                         MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30               0x130b0
 662                 >;
 663         };
 664
 665         pinctrl_i2c1: i2c1grp {
 666                 fsl,pins = <
 667                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001f8b1
 668                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001f8b1
 669                 >;
 670         };
 671
 672         pinctrl_i2c3: i2c3grp {
 673                 fsl,pins = <
 674                         MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
 675                         MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 676                 >;
 677         };
 678
 679         pinctrl_ipu1_csi0: ipu1csi0grp {
 680                 fsl,pins = <
 681                         MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12         0x1b0b0
 682                         MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13         0x1b0b0
 683                         MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14         0x1b0b0
 684                         MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15         0x1b0b0
 685                         MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16         0x1b0b0
 686                         MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17         0x1b0b0
 687                         MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18         0x1b0b0
 688                         MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19         0x1b0b0
 689                         MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK        0x1b0b0
 690                 >;
 691         };
 692
 693         pinctrl_leds: ledsgrp {
 694                 fsl,pins = <
 695                         /* DEBUG0 */
 696                         MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16             0x1b0b0
 697                         /* DEBUG1 */
 698                         MX6QDL_PAD_DI0_PIN15__GPIO4_IO17                0x1b0b0
 699                         /* POWER_LED */
 700                         MX6QDL_PAD_EIM_CS1__GPIO2_IO24                  0x1b0b0
 701                 >;
 702         };
 703
 704         pinctrl_pwm1: pwm1grp {
 705                 fsl,pins = <
 706                         MX6QDL_PAD_DISP0_DAT8__PWM1_OUT                 0x1b0b0
 707                 >;
 708         };
 709
 710         /* YaCO AUX Uart */
 711         pinctrl_uart1: uart1grp {
 712                 fsl,pins = <
 713                         MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA            0x1b0b1
 714                         MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA            0x1b0b1
 715                 >;
 716         };
 717
 718         pinctrl_uart2: uart2grp {
 719                 fsl,pins = <
 720                         MX6QDL_PAD_EIM_D26__UART2_RX_DATA               0x1b0b1
 721                         MX6QDL_PAD_EIM_D27__UART2_TX_DATA               0x1b0b1
 722                         MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B             0x1b0b1
 723                         MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B             0x1b0b1
 724                 >;
 725         };
 726
 727         /* YaCO Touchscreen UART */
 728         pinctrl_uart3: uart3grp {
 729                 fsl,pins = <
 730                         MX6QDL_PAD_EIM_D24__UART3_TX_DATA               0x1b0b1
 731                         MX6QDL_PAD_EIM_D25__UART3_RX_DATA               0x1b0b1
 732                 >;
 733         };
 734
 735         pinctrl_uart4: uart4grp {
 736                 fsl,pins = <
 737                         MX6QDL_PAD_KEY_COL0__UART4_TX_DATA              0x1b0b1
 738                         MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA              0x1b0b1
 739                 >;
 740         };
 741
 742         pinctrl_uart5: uart5grp {
 743                 fsl,pins = <
 744                         MX6QDL_PAD_KEY_COL1__UART5_TX_DATA              0x1b0b1
 745                         MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA              0x1b0b1
 746                 >;
 747         };
 748
 749         pinctrl_usbotg: usbotggrp {
 750                 fsl,pins = <
 751                         MX6QDL_PAD_EIM_D21__USB_OTG_OC                  0x1b0b0
 752                         /* power enable, high active */
 753                         MX6QDL_PAD_EIM_D22__GPIO3_IO22                  0x1b0b0
 754                 >;
 755         };
 756
 757         pinctrl_usdhc1: usdhc1grp {
 758                 fsl,pins = <
 759                         MX6QDL_PAD_SD1_CMD__SD1_CMD                     0x170f9
 760                         MX6QDL_PAD_SD1_CLK__SD1_CLK                     0x100f9
 761                         MX6QDL_PAD_SD1_DAT0__SD1_DATA0                  0x170f9
 762                         MX6QDL_PAD_SD1_DAT1__SD1_DATA1                  0x170f9
 763                         MX6QDL_PAD_SD1_DAT2__SD1_DATA2                  0x170f9
 764                         MX6QDL_PAD_SD1_DAT3__SD1_DATA3                  0x170f9
 765                         MX6QDL_PAD_GPIO_1__GPIO1_IO01                   0x1b0b0
 766                 >;
 767         };
 768
 769         pinctrl_usdhc2: usdhc2grp {
 770                 fsl,pins = <
 771                         MX6QDL_PAD_SD2_CMD__SD2_CMD                     0x170b9
 772                         MX6QDL_PAD_SD2_CLK__SD2_CLK                     0x100b9
 773                         MX6QDL_PAD_SD2_DAT0__SD2_DATA0                  0x170b9
 774                         MX6QDL_PAD_SD2_DAT1__SD2_DATA1                  0x170b9
 775                         MX6QDL_PAD_SD2_DAT2__SD2_DATA2                  0x170b9
 776                         MX6QDL_PAD_SD2_DAT3__SD2_DATA3                  0x170b9
 777                         /* WL12xx IRQ */
 778                         MX6QDL_PAD_ENET_TXD0__GPIO1_IO30                0x10880
 779                 >;
 780         };
 781
 782         pinctrl_usdhc3: usdhc3grp {
 783                 fsl,pins = <
 784                         MX6QDL_PAD_SD3_CMD__SD3_CMD                     0x17099
 785                         MX6QDL_PAD_SD3_CLK__SD3_CLK                     0x10099
 786                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0                  0x17099
 787                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1                  0x17099
 788                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2                  0x17099
 789                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3                  0x17099
 790                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4                  0x17099
 791                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5                  0x17099
 792                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6                  0x17099
 793                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7                  0x17099
 794                         MX6QDL_PAD_SD3_RST__SD3_RESET                   0x1b0b1
 795                 >;
 796         };
 797
 798         pinctrl_wifi_npd: wifinpdgrp {
 799                 fsl,pins = <
 800                         MX6QDL_PAD_ENET_RXD1__GPIO1_IO26                0x1b8b0
 801                 >;
 802         };
 803 };