arch/arm/boot/dts/imx6dl-plybas.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /*
   3  * Copyright (c) 2014 Protonic Holland
   4  * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
   5  */
   6
   7 /dts-v1/;
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/leds/common.h>
  10 #include "imx6dl.dtsi"
  11
  12 / {
  13         model = "Plymovent BAS board";
  14         compatible = "ply,plybas", "fsl,imx6dl";
  15
  16         chosen {
  17                 stdout-path = &uart4;
  18         };
  19
  20         gpio_keys {
  21                 compatible = "gpio-keys";
  22                 autorepeat;
  23
  24                 button-start {
  25                         label = "START";
  26                         linux,code = <31>;
  27                         gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
  28                 };
  29
  30                 button-clean {
  31                         label = "CLEAN";
  32                         linux,code = <46>;
  33                         gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
  34                 };
  35         };
  36
  37         leds {
  38                 compatible = "gpio-leds";
  39                 pinctrl-names = "default";
  40                 pinctrl-0 = <&pinctrl_leds>;
  41
  42                 led-0 {
  43                         label = "debug0";
  44                         gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  45                 };
  46
  47                 led-1 {
  48                         label = "debug1";
  49                         gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
  50                 };
  51
  52                 led-2 {
  53                         label = "light_tower1";
  54                         gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
  55                         linux,default-trigger = "heartbeat";
  56                 };
  57
  58                 led-3 {
  59                         label = "light_tower2";
  60                         gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
  61                 };
  62
  63                 led-4 {
  64                         label = "light_tower3";
  65                         gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
  66                 };
  67
  68                 led-5 {
  69                         label = "light_tower4";
  70                         gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  71                 };
  72         };
  73
  74         clk50m_phy: phy-clock {
  75                 compatible = "fixed-clock";
  76                 #clock-cells = <0>;
  77                 clock-frequency = <50000000>;
  78         };
  79
  80         reg_5v0: regulator-5v0 {
  81                 compatible = "regulator-fixed";
  82                 regulator-name = "5v0";
  83                 regulator-min-microvolt = <5000000>;
  84                 regulator-max-microvolt = <5000000>;
  85         };
  86 };
  87
  88 &can1 {
  89         pinctrl-names = "default";
  90         pinctrl-0 = <&pinctrl_can1>;
  91         xceiver-supply = <&reg_5v0>;
  92         status = "okay";
  93 };
  94
  95 &can2 {
  96         pinctrl-names = "default";
  97         pinctrl-0 = <&pinctrl_can2>;
  98         xceiver-supply = <&reg_5v0>;
  99         status = "okay";
 100 };
 101
 102 &ecspi1 {
 103         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
 104         pinctrl-names = "default";
 105         pinctrl-0 = <&pinctrl_ecspi1>;
 106         status = "okay";
 107
 108         flash@0 {
 109                 compatible = "jedec,spi-nor";
 110                 reg = <0>;
 111                 spi-max-frequency = <20000000>;
 112         };
 113 };
 114
 115 &fec {
 116         pinctrl-names = "default";
 117         pinctrl-0 = <&pinctrl_enet>;
 118         phy-mode = "rmii";
 119         clocks = <&clks IMX6QDL_CLK_ENET>,
 120                  <&clks IMX6QDL_CLK_ENET>,
 121                  <&clk50m_phy>;
 122         clock-names = "ipg", "ahb", "ptp";
 123         phy-handle = <&rgmii_phy>;
 124         status = "okay";
 125
 126         mdio {
 127                 #address-cells = <1>;
 128                 #size-cells = <0>;
 129
 130                 /* Microchip KSZ8081RNA PHY */
 131                 rgmii_phy: ethernet-phy@0 {
 132                         reg = <0>;
 133                         interrupts-extended = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
 134                         reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
 135                         reset-assert-us = <10000>;
 136                         reset-deassert-us = <300>;
 137                 };
 138         };
 139 };
 140
 141 &gpio1 {
 142         gpio-line-names =
 143                 "", "SD1_CD", "", "", "", "", "", "",
 144                 "DEBUG_0", "DEBUG_1", "", "", "", "", "", "",
 145                 "", "", "", "", "", "", "", "",
 146                 "", "", "", "", "", "", "", "";
 147 };
 148
 149 &gpio3 {
 150         gpio-line-names =
 151                 "", "", "", "", "", "", "", "",
 152                 "", "", "", "", "", "", "", "",
 153                 "", "", "", "ECSPI1_SS1", "", "USB_EXT_PWR", "", "",
 154                 "", "", "", "", "", "", "", "";
 155 };
 156
 157 &gpio4 {
 158         gpio-line-names =
 159                 "", "", "", "", "", "", "", "",
 160                 "", "", "", "", "CAN1_SR", "CAN2_SR", "", "",
 161                 "LED_DI0_DEBUG_0", "LED_DI0_DEBUG_1", "IMX6_IN12", "IMX6_HMI",
 162                         "IMX6_IN11", "IMX6_BUZZER", "IMX6_LED1", "IMX6_LED2",
 163                 "IMX6_LED3", "IMX6_LED4", "ETH_RESET", "IMX6_ANA_OUT_SD",
 164                         "IMX6_ANA_OUT_ERR", "IMX6_ANA_OUT", "ETH_INTRP", "";
 165 };
 166
 167 &gpio5 {
 168         gpio-line-names =
 169                 "", "", "", "", "", "IMX6_RELAY1", "IMX6_RELAY2", "",
 170                 "IMX6_IN1", "IMX6_IN2", "IMX6_IN3", "IMX6_IN4", "IMX6_IN5",
 171                         "IMX6_IN6", "IMX6_IN7", "IMX6_IN8",
 172                 "IMX6_IN9", "IMX6_IN10", "", "", "", "", "", "",
 173                 "", "", "", "", "", "", "", "";
 174 };
 175
 176 &i2c1 {
 177         clock-frequency = <100000>;
 178         pinctrl-names = "default";
 179         pinctrl-0 = <&pinctrl_i2c1>;
 180         status = "okay";
 181
 182         /* additional i2c devices are added automatically by the boot loader */
 183 };
 184
 185 &i2c3 {
 186         clock-frequency = <100000>;
 187         pinctrl-names = "default";
 188         pinctrl-0 = <&pinctrl_i2c3>;
 189         status = "okay";
 190
 191         temperature-sensor@70 {
 192                 compatible = "ti,tmp103";
 193                 reg = <0x70>;
 194         };
 195
 196         rtc@51 {
 197                 compatible = "nxp,pcf8563";
 198                 reg = <0x51>;
 199         };
 200 };
 201
 202 &pwm1 {
 203         pinctrl-names = "default";
 204         pinctrl-0 = <&pinctrl_pwm1>;
 205         status = "okay";
 206 };
 207
 208 &uart1 {
 209         pinctrl-names = "default";
 210         pinctrl-0 = <&pinctrl_uart1>;
 211         status = "okay";
 212 };
 213
 214 &uart2 {
 215         pinctrl-names = "default";
 216         pinctrl-0 = <&pinctrl_uart2>;
 217         fsl,uart-has-rtscts;
 218         linux,rs485-enabled-at-boot-time;
 219         rs485-rts-delay = <0 20>;
 220         status = "okay";
 221 };
 222
 223 &uart4 {
 224         pinctrl-names = "default";
 225         pinctrl-0 = <&pinctrl_uart4>;
 226         status = "okay";
 227 };
 228
 229 &usbotg {
 230         pinctrl-names = "default";
 231         pinctrl-0 = <&pinctrl_usbotg>;
 232         phy_type = "utmi";
 233         dr_mode = "host";
 234         disable-over-current;
 235         status = "okay";
 236 };
 237
 238 &usbphynop1 {
 239         status = "disabled";
 240 };
 241
 242 &usbphynop2 {
 243         status = "disabled";
 244 };
 245
 246 &iomuxc {
 247         pinctrl_can1: can1grp {
 248                 fsl,pins = <
 249                         MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX                0x1b000
 250                         MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX                0x3008
 251                         /* CAN1_SR */
 252                         MX6QDL_PAD_KEY_COL3__GPIO4_IO12                 0x13008
 253                 >;
 254         };
 255
 256         pinctrl_can2: can2grp {
 257                 fsl,pins = <
 258                         MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX                0x1b000
 259                         MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX                0x3008
 260                         /* CAN2_SR */
 261                         MX6QDL_PAD_KEY_ROW3__GPIO4_IO13                 0x13008
 262                 >;
 263         };
 264
 265         pinctrl_ecspi1: ecspi1grp {
 266                 fsl,pins = <
 267                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO                 0x1b000
 268                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI                 0x3008
 269                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK                 0x3008
 270                         /* CS */
 271                         MX6QDL_PAD_EIM_D19__GPIO3_IO19                  0x3008
 272                 >;
 273         };
 274
 275         pinctrl_enet: enetgrp {
 276                 fsl,pins = <
 277                         /* MX6QDL_ENET_PINGRP4 */
 278                         MX6QDL_PAD_ENET_MDC__ENET_MDC                   0x1b0b0
 279                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO                 0x1b0b0
 280                         MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0             0x1b0b0
 281                         MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1             0x1b0b0
 282                         MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER               0x1b0b0
 283                         MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN               0x1b0b0
 284                         MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0             0x1b0b0
 285                         MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1             0x1b0b0
 286                         MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN              0x1b0b0
 287
 288                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK                0x1b0b0
 289                         /* Phy reset */
 290                         MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26               0x1b0b0
 291                         /* nINTRP */
 292                         MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30               0x1b0b0
 293                 >;
 294         };
 295
 296         pinctrl_i2c1: i2c1grp {
 297                 fsl,pins = <
 298                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA                  0x4001f8b1
 299                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL                  0x4001f8b1
 300                 >;
 301         };
 302
 303         pinctrl_i2c3: i2c3grp {
 304                 fsl,pins = <
 305                         MX6QDL_PAD_GPIO_5__I2C3_SCL                     0x4001b8b1
 306                         MX6QDL_PAD_GPIO_6__I2C3_SDA                     0x4001b8b1
 307                 >;
 308         };
 309
 310         pinctrl_leds: ledsgrp {
 311                 fsl,pins = <
 312                         /* DEBUG_0 */
 313                         MX6QDL_PAD_GPIO_8__GPIO1_IO08                   0x1b0b0
 314                         /* DEBUG_1 */
 315                         MX6QDL_PAD_GPIO_9__GPIO1_IO09                   0x1b0b0
 316
 317                         /* LED1 (lighttower) */
 318                         MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22               0x13070
 319                         /* LED2 (lighttower) */
 320                         MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23               0x13070
 321                         /* LED3 (lighttower) */
 322                         MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24               0x13070
 323                         /* LED4 (lighttower) */
 324                         MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25               0x13070
 325                 >;
 326         };
 327
 328         pinctrl_pwm1: pwm1grp {
 329                 fsl,pins = <
 330                         MX6QDL_PAD_DISP0_DAT8__PWM1_OUT                 0x1b0b0
 331                 >;
 332         };
 333
 334         /* YaCO AUX Uart */
 335         pinctrl_uart1: uart1grp {
 336                 fsl,pins = <
 337                         MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA            0x1b0b1
 338                         MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA            0x1b0b1
 339                 >;
 340         };
 341
 342         pinctrl_uart2: uart2grp {
 343                 fsl,pins = <
 344                         MX6QDL_PAD_EIM_D26__UART2_TX_DATA               0x1b0b1
 345                         MX6QDL_PAD_EIM_D27__UART2_RX_DATA               0x1b0b1
 346                         MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B             0x130b1
 347                 >;
 348         };
 349
 350         pinctrl_uart4: uart4grp {
 351                 fsl,pins = <
 352                         MX6QDL_PAD_KEY_COL0__UART4_TX_DATA              0x1b0b1
 353                         MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA              0x1b0b1
 354                 >;
 355         };
 356
 357         pinctrl_usbotg: usbotggrp {
 358                 fsl,pins = <
 359                         MX6QDL_PAD_EIM_D21__USB_OTG_OC                  0x1b0b0
 360                         /* power enable, high active */
 361                         MX6QDL_PAD_EIM_D22__GPIO3_IO22                  0x1b0b0
 362                 >;
 363         };
 364
 365         pinctrl_usdhc1: usdhc1grp {
 366                 fsl,pins = <
 367                         MX6QDL_PAD_SD1_CMD__SD1_CMD                     0x170f9
 368                         MX6QDL_PAD_SD1_CLK__SD1_CLK                     0x100f9
 369                         MX6QDL_PAD_SD1_DAT0__SD1_DATA0                  0x170f9
 370                         MX6QDL_PAD_SD1_DAT1__SD1_DATA1                  0x170f9
 371                         MX6QDL_PAD_SD1_DAT2__SD1_DATA2                  0x170f9
 372                         MX6QDL_PAD_SD1_DAT3__SD1_DATA3                  0x170f9
 373                         MX6QDL_PAD_GPIO_1__GPIO1_IO01                   0x1b0b0
 374                 >;
 375         };
 376
 377         pinctrl_usdhc3: usdhc3grp {
 378                 fsl,pins = <
 379                         MX6QDL_PAD_SD3_CMD__SD3_CMD                     0x17099
 380                         MX6QDL_PAD_SD3_CLK__SD3_CLK                     0x10099
 381                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0                  0x17099
 382                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1                  0x17099
 383                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2                  0x17099
 384                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3                  0x17099
 385                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4                  0x17099
 386                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5                  0x17099
 387                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6                  0x17099
 388                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7                  0x17099
 389                         MX6QDL_PAD_SD3_RST__SD3_RESET                   0x1b0b1
 390                 >;
 391         };
 392 };