Merge commit '81fd23e2b3ccf71c807e671444e8accaba98ca53' of https://git.pengutronix...
[linux-2.6-microblaze.git] / arch / arm / boot / dts / aspeed-bmc-lenovo-hr630.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Device Tree file for Lenovo Hr630 platform
4  *
5  * Copyright (C) 2019-present Lenovo
6  */
7
8 /dts-v1/;
9
10 #include "aspeed-g5.dtsi"
11 #include <dt-bindings/gpio/aspeed-gpio.h>
12
13 / {
14         model = "HR630 BMC";
15         compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
16
17         aliases {
18                 i2c14 = &i2c_rbp;
19                 i2c15 = &i2c_fbp1;
20                 i2c16 = &i2c_fbp2;
21                 i2c17 = &i2c_fbp3;
22                 i2c18 = &i2c_riser2;
23                 i2c19 = &i2c_pcie4;
24                 i2c20 = &i2c_riser1;
25                 i2c21 = &i2c_ocp;
26         };
27
28         chosen {
29                 stdout-path = &uart5;
30                 bootargs = "console=tty0 console=ttyS4,115200 earlycon";
31         };
32
33         memory@80000000 {
34                 device_type = "memory";
35                 reg = <0x80000000 0x20000000>;
36         };
37
38         reserved-memory {
39                 #address-cells = <1>;
40                 #size-cells = <1>;
41                 ranges;
42
43                 flash_memory: region@98000000 {
44                         no-map;
45                         reg = <0x98000000 0x00100000>; /* 1M */
46                 };
47
48                 gfx_memory: framebuffer {
49                         size = <0x01000000>;
50                         alignment = <0x01000000>;
51                         compatible = "shared-dma-pool";
52                         reusable;
53                 };
54         };
55
56         leds {
57                 compatible = "gpio-leds";
58
59                 heartbeat {
60                         gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
61                 };
62
63                 fault {
64                         gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
65                 };
66         };
67
68         iio-hwmon {
69                 compatible = "iio-hwmon";
70                 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
71                 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
72                 <&adc 8>, <&adc 9>, <&adc 10>,
73                 <&adc 12>, <&adc 13>, <&adc 14>;
74         };
75
76 };
77
78 &fmc {
79         status = "okay";
80         flash@0 {
81                 status = "okay";
82                 m25p,fast-read;
83                 label = "bmc";
84                 spi-max-frequency = <50000000>;
85 #include "openbmc-flash-layout.dtsi"
86         };
87 };
88
89 &lpc_ctrl {
90         status = "okay";
91         memory-region = <&flash_memory>;
92         flash = <&spi1>;
93 };
94
95 &uart1 {
96         status = "okay";
97         pinctrl-names = "default";
98         pinctrl-0 = <&pinctrl_txd1_default
99                         &pinctrl_rxd1_default>;
100 };
101
102 &uart2 {
103         /* Rear RS-232 connector */
104         status = "okay";
105         pinctrl-names = "default";
106         pinctrl-0 = <&pinctrl_txd2_default
107                         &pinctrl_rxd2_default
108                         &pinctrl_nrts2_default
109                         &pinctrl_ndtr2_default
110                         &pinctrl_ndsr2_default
111                         &pinctrl_ncts2_default
112                         &pinctrl_ndcd2_default
113                         &pinctrl_nri2_default>;
114 };
115
116 &uart3 {
117         status = "okay";
118         pinctrl-names = "default";
119         pinctrl-0 = <&pinctrl_txd3_default
120                         &pinctrl_rxd3_default>;
121 };
122
123 &uart5 {
124         status = "okay";
125 };
126
127 &ibt {
128         status = "okay";
129 };
130
131 &mac0 {
132         status = "okay";
133
134         pinctrl-names = "default";
135         pinctrl-0 = <&pinctrl_rmii1_default>;
136         clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
137                  <&syscon ASPEED_CLK_MAC1RCLK>;
138         clock-names = "MACCLK", "RCLK";
139         use-ncsi;
140 };
141
142 &mac1 {
143         status = "okay";
144
145         pinctrl-names = "default";
146         pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
147 };
148
149 &adc {
150         status = "okay";
151
152         pinctrl-names = "default";
153         pinctrl-0 = <&pinctrl_adc0_default
154                         &pinctrl_adc1_default
155                         &pinctrl_adc2_default
156                         &pinctrl_adc3_default
157                         &pinctrl_adc4_default
158                         &pinctrl_adc5_default
159                         &pinctrl_adc6_default
160                         &pinctrl_adc7_default
161                         &pinctrl_adc8_default
162                         &pinctrl_adc9_default
163                         &pinctrl_adc10_default
164                         &pinctrl_adc12_default
165                         &pinctrl_adc13_default
166                         &pinctrl_adc14_default>;
167 };
168
169 &i2c0 {
170         status = "okay";
171         /* temp1 inlet */
172         tmp75@4e {
173                 compatible = "national,lm75";
174                 reg = <0x4e>;
175         };
176 };
177
178 &i2c1 {
179         status = "okay";
180         /* temp2 outlet */
181         tmp75@4d {
182                 compatible = "national,lm75";
183                 reg = <0x4d>;
184         };
185 };
186
187 &i2c2 {
188         status = "okay";
189 };
190
191 &i2c3 {
192         status = "okay";
193 };
194
195 &i2c4 {
196         status = "okay";
197 };
198
199 &i2c5 {
200         status = "okay";
201 };
202
203 &i2c6 {
204         status = "okay";
205         /*      Slot 0,
206          *      Slot 1,
207          *      Slot 2,
208          *      Slot 3
209          */
210
211         i2c-switch@70 {
212                 compatible = "nxp,pca9545";
213                 reg = <0x70>;
214                 #address-cells = <1>;
215                 #size-cells = <0>;
216                 i2c-mux-idle-disconnect;        /* may use mux@70 next. */
217
218                 i2c_rbp: i2c@0 {
219                         #address-cells = <1>;
220                         #size-cells = <0>;
221                         reg = <0>;
222                 };
223
224                 i2c_fbp1: i2c@1 {
225                         #address-cells = <1>;
226                         #size-cells = <0>;
227                         reg = <1>;
228                 };
229
230                 i2c_fbp2: i2c@2 {
231                         #address-cells = <1>;
232                         #size-cells = <0>;
233                         reg = <2>;
234                 };
235
236                 i2c_fbp3: i2c@3 {
237                         #address-cells = <1>;
238                         #size-cells = <0>;
239                         reg = <3>;
240                 };
241         };
242 };
243
244 &i2c7 {
245         status = "okay";
246
247         /*      Slot 0,
248          *      Slot 1,
249          *      Slot 2,
250          *      Slot 3
251          */
252         i2c-switch@76 {
253                 compatible = "nxp,pca9546";
254                 reg = <0x76>;
255                 #address-cells = <1>;
256                 #size-cells = <0>;
257                 i2c-mux-idle-disconnect;  /* may use mux@76 next. */
258
259                 i2c_riser2: i2c@0 {
260                         #address-cells = <1>;
261                         #size-cells = <0>;
262                         reg = <0>;
263                 };
264
265                 i2c_pcie4: i2c@1 {
266                         #address-cells = <1>;
267                         #size-cells = <0>;
268                         reg = <1>;
269                 };
270
271                 i2c_riser1: i2c@2 {
272                         #address-cells = <1>;
273                         #size-cells = <0>;
274                         reg = <2>;
275                 };
276
277                 i2c_ocp: i2c@3 {
278                         #address-cells = <1>;
279                         #size-cells = <0>;
280                         reg = <3>;
281                 };
282         };
283 };
284
285 &i2c8 {
286         status = "okay";
287
288         eeprom@57 {
289                 compatible = "atmel,24c256";
290                 reg = <0x57>;
291                 pagesize = <16>;
292         };
293 };
294
295 &i2c9 {
296         status = "okay";
297 };
298
299 &i2c10 {
300         status = "okay";
301 };
302
303 &i2c11 {
304         status = "okay";
305 };
306
307 &i2c12 {
308         status = "okay";
309 };
310
311 &ehci1 {
312         status = "okay";
313 };
314
315 &uhci {
316         status = "okay";
317 };
318
319 &gfx {
320         status = "okay";
321         memory-region = <&gfx_memory>;
322 };
323
324 &pwm_tacho {
325         status = "okay";
326         pinctrl-names = "default";
327         pinctrl-0 = <&pinctrl_pwm0_default
328         &pinctrl_pwm1_default
329         &pinctrl_pwm2_default
330         &pinctrl_pwm3_default
331         &pinctrl_pwm4_default
332         &pinctrl_pwm5_default
333         &pinctrl_pwm6_default>;
334
335         fan@0 {
336                 reg = <0x00>;
337                 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
338         };
339
340         fan@1 {
341                 reg = <0x00>;
342                 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
343         };
344
345         fan@2 {
346                 reg = <0x01>;
347                 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
348         };
349
350         fan@3 {
351                 reg = <0x01>;
352                 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
353         };
354
355         fan@4 {
356                 reg = <0x02>;
357                 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
358         };
359
360         fan@5 {
361                 reg = <0x02>;
362                 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
363         };
364
365         fan@6 {
366                 reg = <0x03>;
367                 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
368         };
369
370         fan@7 {
371                 reg = <0x03>;
372                 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
373         };
374
375         fan@8 {
376                 reg = <0x04>;
377                 aspeed,fan-tach-ch = /bits/ 8 <0x08>;
378         };
379
380         fan@9 {
381                 reg = <0x04>;
382                 aspeed,fan-tach-ch = /bits/ 8 <0x09>;
383         };
384
385         fan@10 {
386                 reg = <0x05>;
387                 aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
388         };
389
390         fan@11 {
391                 reg = <0x05>;
392                 aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
393         };
394
395         fan@12 {
396                 reg = <0x06>;
397                 aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
398         };
399
400         fan@13 {
401                 reg = <0x06>;
402                 aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
403         };
404 };
405
406 &gpio {
407
408         pin_gpio_b5 {
409                 gpio-hog;
410                 gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
411                 output-high;
412                 line-name = "IRQ_BMC_PCH_SMI_LPC_N";
413         };
414
415         pin_gpio_f0 {
416                 gpio-hog;
417                 gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>;
418                 output-low;
419                 line-name = "IRQ_BMC_PCH_NMI_R";
420         };
421
422         pin_gpio_f3 {
423                 gpio-hog;
424                 gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>;
425                 output-high;
426                 line-name = "I2C_BUS0_RST_OUT_N";
427         };
428
429         pin_gpio_f4 {
430                 gpio-hog;
431                 gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
432                 output-low;
433                 line-name = "FM_SKT0_FAULT_LED";
434         };
435
436         pin_gpio_f5 {
437                 gpio-hog;
438                 gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>;
439                 output-low;
440                 line-name = "FM_SKT1_FAULT_LED";
441         };
442
443         pin_gpio_g4 {
444                 gpio-hog;
445                 gpios = <ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>;
446                 output-high;
447                 line-name = "FAN_PWR_CTL_N";
448         };
449
450         pin_gpio_g7 {
451                 gpio-hog;
452                 gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>;
453                 output-high;
454                 line-name = "RST_BMC_PCIE_I2CMUX_N";
455         };
456
457         pin_gpio_h2 {
458                 gpio-hog;
459                 gpios = <ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
460                 output-high;
461                 line-name = "PSU1_FFS_N_R";
462         };
463
464         pin_gpio_h3 {
465                 gpio-hog;
466                 gpios = <ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
467                 output-high;
468                 line-name = "PSU2_FFS_N_R";
469         };
470
471         pin_gpio_i3 {
472                 gpio-hog;
473                 gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
474                 output-high;
475                 line-name = "BMC_INTRUDED_COVER";
476         };
477
478         pin_gpio_j2 {
479                 gpio-hog;
480                 gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
481                 output-high;
482                 line-name = "BMC_BIOS_UPDATE_N";
483         };
484
485         pin_gpio_j3 {
486                 gpio-hog;
487                 gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>;
488                 output-high;
489                 line-name = "RST_BMC_HDD_I2CMUX_N";
490         };
491
492         pin_gpio_s2 {
493                 gpio-hog;
494                 gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
495                 output-high;
496                 line-name = "BMC_VGA_SW";
497         };
498
499         pin_gpio_s4 {
500                 gpio-hog;
501                 gpios = <ASPEED_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
502                 output;
503                 line-name = "VBAT_EN_N";
504         };
505
506         pin_gpio_s6 {
507                 gpio-hog;
508                 gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
509                 output-high;
510                 line-name = "PU_BMC_GPIOS6";
511         };
512
513         pin_gpio_y0 {
514                 gpio-hog;
515                 gpios = <ASPEED_GPIO(Y, 0) GPIO_ACTIVE_HIGH>;
516                 output-low;
517                 line-name = "BMC_NCSI_MUX_CTL_S0";
518         };
519
520         pin_gpio_y1 {
521                 gpio-hog;
522                 gpios = <ASPEED_GPIO(Y, 1) GPIO_ACTIVE_HIGH>;
523                 output-low;
524                 line-name = "BMC_NCSI_MUX_CTL_S1";
525         };
526
527         pin_gpio_z0 {
528                 gpio-hog;
529                 gpios = <ASPEED_GPIO(Z, 0) GPIO_ACTIVE_HIGH>;
530                 output-high;
531                 line-name = "I2C_RISER2_INT_N";
532         };
533
534         pin_gpio_z2 {
535                 gpio-hog;
536                 gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
537                 output-high;
538                 line-name = "I2C_RISER2_RESET_N";
539         };
540
541         pin_gpio_z3 {
542                 gpio-hog;
543                 gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
544                 output-high;
545                 line-name = "FM_BMC_PCH_SCI_LPC_N";
546         };
547
548         pin_gpio_z7 {
549                 gpio-hog;
550                 gpios = <ASPEED_GPIO(Z, 7) GPIO_ACTIVE_HIGH>;
551                 output-low;
552                 line-name = "BMC_POST_CMPLT_N";
553         };
554
555         pin_gpio_aa0 {
556                 gpio-hog;
557                 gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
558                 output-low;
559                 line-name = "HOST_BMC_USB_SEL";
560         };
561
562         pin_gpio_aa5 {
563                 gpio-hog;
564                 gpios = <ASPEED_GPIO(AA, 5) GPIO_ACTIVE_HIGH>;
565                 output-high;
566                 line-name = "I2C_BUS1_RST_OUT_N";
567         };
568
569 };