arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /dts-v1/;
   3 #include "aspeed-g5.dtsi"
   4 #include <dt-bindings/gpio/aspeed-gpio.h>
   5
   6 / {
   7         model = "Ampere Mt. Jade BMC";
   8         compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
   9
  10         chosen {
  11                 stdout-path = &uart5;
  12                 bootargs = "console=ttyS4,115200 earlycon";
  13         };
  14
  15         memory@80000000 {
  16                 reg = <0x80000000 0x20000000>;
  17         };
  18
  19         reserved-memory {
  20                 #address-cells = <1>;
  21                 #size-cells = <1>;
  22                 ranges;
  23
  24                 vga_memory: framebuffer@9f000000 {
  25                         no-map;
  26                         reg = <0x9f000000 0x01000000>; /* 16M */
  27                 };
  28
  29                 gfx_memory: framebuffer {
  30                         size = <0x01000000>;
  31                         alignment = <0x01000000>;
  32                         compatible = "shared-dma-pool";
  33                         reusable;
  34                 };
  35
  36                 video_engine_memory: jpegbuffer {
  37                         size = <0x02000000>;    /* 32M */
  38                         alignment = <0x01000000>;
  39                         compatible = "shared-dma-pool";
  40                         reusable;
  41                 };
  42         };
  43
  44         leds {
  45                 compatible = "gpio-leds";
  46
  47                 fault {
  48                         gpios = <&gpio ASPEED_GPIO(B, 6) GPIO_ACTIVE_HIGH>;
  49                 };
  50
  51                 identify {
  52                         gpios = <&gpio ASPEED_GPIO(Q, 6) GPIO_ACTIVE_HIGH>;
  53                 };
  54         };
  55
  56         gpio-keys {
  57                 compatible = "gpio-keys";
  58
  59                 shutdown_ack {
  60                         label = "SHUTDOWN_ACK";
  61                         gpios = <&gpio ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>;
  62                         linux,code = <ASPEED_GPIO(G, 2)>;
  63                 };
  64
  65                 reboot_ack {
  66                         label = "REBOOT_ACK";
  67                         gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>;
  68                         linux,code = <ASPEED_GPIO(J, 3)>;
  69                 };
  70
  71                 S0_overtemp {
  72                         label = "S0_OVERTEMP";
  73                         gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>;
  74                         linux,code = <ASPEED_GPIO(G, 3)>;
  75                 };
  76
  77                 S0_hightemp {
  78                         label = "S0_HIGHTEMP";
  79                         gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
  80                         linux,code = <ASPEED_GPIO(J, 0)>;
  81                 };
  82
  83                 S0_cpu_fault {
  84                         label = "S0_CPU_FAULT";
  85                         gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>;
  86                         linux,code = <ASPEED_GPIO(J, 1)>;
  87                 };
  88
  89                 S1_overtemp {
  90                         label = "S1_OVERTEMP";
  91                         gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
  92                         linux,code = <ASPEED_GPIO(Z, 6)>;
  93                 };
  94
  95                 S1_hightemp {
  96                         label = "S1_HIGHTEMP";
  97                         gpios = <&gpio ASPEED_GPIO(AB, 0) GPIO_ACTIVE_LOW>;
  98                         linux,code = <ASPEED_GPIO(AB, 0)>;
  99                 };
 100
 101                 S1_cpu_fault {
 102                         label = "S1_CPU_FAULT";
 103                         gpios = <&gpio ASPEED_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
 104                         linux,code = <ASPEED_GPIO(Z, 1)>;
 105                 };
 106
 107                 id_button {
 108                         label = "ID_BUTTON";
 109                         gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
 110                         linux,code = <ASPEED_GPIO(Q, 5)>;
 111                 };
 112
 113                 psu1_vin_good {
 114                         label = "PSU1_VIN_GOOD";
 115                         gpios = <&gpio ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>;
 116                         linux,code = <ASPEED_GPIO(H, 4)>;
 117                 };
 118
 119                 psu2_vin_good {
 120                         label = "PSU2_VIN_GOOD";
 121                         gpios = <&gpio ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>;
 122                         linux,code = <ASPEED_GPIO(H, 5)>;
 123                 };
 124
 125                 psu1_present {
 126                         label = "PSU1_PRESENT";
 127                         gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
 128                         linux,code = <ASPEED_GPIO(I, 0)>;
 129                 };
 130
 131                 psu2_present {
 132                         label = "PSU2_PRESENT";
 133                         gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>;
 134                         linux,code = <ASPEED_GPIO(I, 1)>;
 135                 };
 136
 137         };
 138
 139         gpioA0mux: mux-controller {
 140                 compatible = "gpio-mux";
 141                 #mux-control-cells = <0>;
 142                 mux-gpios = <&gpio ASPEED_GPIO(A, 0) GPIO_ACTIVE_LOW>;
 143         };
 144
 145         adc0mux: adc0mux {
 146                 compatible = "io-channel-mux";
 147                 io-channels = <&adc 0>;
 148                 #io-channel-cells = <1>;
 149                 io-channel-names = "parent";
 150                 mux-controls = <&gpioA0mux>;
 151                 channels = "s0", "s1";
 152         };
 153
 154         adc1mux: adc1mux {
 155                 compatible = "io-channel-mux";
 156                 io-channels = <&adc 1>;
 157                 #io-channel-cells = <1>;
 158                 io-channel-names = "parent";
 159                 mux-controls = <&gpioA0mux>;
 160                 channels = "s0", "s1";
 161         };
 162
 163         adc2mux: adc2mux {
 164                 compatible = "io-channel-mux";
 165                 io-channels = <&adc 2>;
 166                 #io-channel-cells = <1>;
 167                 io-channel-names = "parent";
 168                 mux-controls = <&gpioA0mux>;
 169                 channels = "s0", "s1";
 170         };
 171
 172         adc3mux: adc3mux {
 173                 compatible = "io-channel-mux";
 174                 io-channels = <&adc 3>;
 175                 #io-channel-cells = <1>;
 176                 io-channel-names = "parent";
 177                 mux-controls = <&gpioA0mux>;
 178                 channels = "s0", "s1";
 179         };
 180
 181         adc4mux: adc4mux {
 182                 compatible = "io-channel-mux";
 183                 io-channels = <&adc 4>;
 184                 #io-channel-cells = <1>;
 185                 io-channel-names = "parent";
 186                 mux-controls = <&gpioA0mux>;
 187                 channels = "s0", "s1";
 188         };
 189
 190         adc5mux: adc5mux {
 191                 compatible = "io-channel-mux";
 192                 io-channels = <&adc 5>;
 193                 #io-channel-cells = <1>;
 194                 io-channel-names = "parent";
 195                 mux-controls = <&gpioA0mux>;
 196                 channels = "s0", "s1";
 197         };
 198
 199         adc6mux: adc6mux {
 200                 compatible = "io-channel-mux";
 201                 io-channels = <&adc 6>;
 202                 #io-channel-cells = <1>;
 203                 io-channel-names = "parent";
 204                 mux-controls = <&gpioA0mux>;
 205                 channels = "s0", "s1";
 206         };
 207
 208         adc7mux: adc7mux {
 209                 compatible = "io-channel-mux";
 210                 io-channels = <&adc 7>;
 211                 #io-channel-cells = <1>;
 212                 io-channel-names = "parent";
 213                 mux-controls = <&gpioA0mux>;
 214                 channels = "s0", "s1";
 215         };
 216
 217         adc8mux: adc8mux {
 218                 compatible = "io-channel-mux";
 219                 io-channels = <&adc 8>;
 220                 #io-channel-cells = <1>;
 221                 io-channel-names = "parent";
 222                 mux-controls = <&gpioA0mux>;
 223                 channels = "s0", "s1";
 224         };
 225
 226         adc9mux: adc9mux {
 227                 compatible = "io-channel-mux";
 228                 io-channels = <&adc 9>;
 229                 #io-channel-cells = <1>;
 230                 io-channel-names = "parent";
 231                 mux-controls = <&gpioA0mux>;
 232                 channels = "s0", "s1";
 233         };
 234
 235         adc10mux: adc10mux {
 236                 compatible = "io-channel-mux";
 237                 io-channels = <&adc 10>;
 238                 #io-channel-cells = <1>;
 239                 io-channel-names = "parent";
 240                 mux-controls = <&gpioA0mux>;
 241                 channels = "s0", "s1";
 242         };
 243
 244         adc11mux: adc11mux {
 245                 compatible = "io-channel-mux";
 246                 io-channels = <&adc 11>;
 247                 #io-channel-cells = <1>;
 248                 io-channel-names = "parent";
 249                 mux-controls = <&gpioA0mux>;
 250                 channels = "s0", "s1";
 251         };
 252
 253         adc12mux: adc12mux {
 254                 compatible = "io-channel-mux";
 255                 io-channels = <&adc 12>;
 256                 #io-channel-cells = <1>;
 257                 io-channel-names = "parent";
 258                 mux-controls = <&gpioA0mux>;
 259                 channels = "s0", "s1";
 260         };
 261
 262         adc13mux: adc13mux {
 263                 compatible = "io-channel-mux";
 264                 io-channels = <&adc 13>;
 265                 #io-channel-cells = <1>;
 266                 io-channel-names = "parent";
 267                 mux-controls = <&gpioA0mux>;
 268                 channels = "s0", "s1";
 269         };
 270
 271         iio-hwmon {
 272                 compatible = "iio-hwmon";
 273                 io-channels = <&adc0mux 0>, <&adc0mux 1>,
 274                         <&adc1mux 0>, <&adc1mux 1>,
 275                         <&adc2mux 0>, <&adc2mux 1>,
 276                         <&adc3mux 0>, <&adc3mux 1>,
 277                         <&adc4mux 0>, <&adc4mux 1>,
 278                         <&adc5mux 0>, <&adc5mux 1>,
 279                         <&adc6mux 0>, <&adc6mux 1>,
 280                         <&adc7mux 0>, <&adc7mux 1>,
 281                         <&adc8mux 0>, <&adc8mux 1>,
 282                         <&adc9mux 0>, <&adc9mux 1>,
 283                         <&adc10mux 0>, <&adc10mux 1>,
 284                         <&adc11mux 0>, <&adc11mux 1>,
 285                         <&adc12mux 0>, <&adc12mux 1>,
 286                         <&adc13mux 0>, <&adc13mux 1>;
 287         };
 288
 289         iio-hwmon-adc14 {
 290                 compatible = "iio-hwmon";
 291                 io-channels = <&adc 14>;
 292         };
 293
 294         iio-hwmon-battery {
 295                 compatible = "iio-hwmon";
 296                 io-channels = <&adc 15>;
 297         };
 298 };
 299
 300 &fmc {
 301         status = "okay";
 302         flash@0 {
 303                 status = "okay";
 304                 m25p,fast-read;
 305                 label = "bmc";
 306                 /* spi-max-frequency = <50000000>; */
 307 #include "openbmc-flash-layout-64.dtsi"
 308         };
 309 };
 310
 311 &spi1 {
 312         status = "okay";
 313         pinctrl-names = "default";
 314         pinctrl-0 = <&pinctrl_spi1_default>;
 315
 316         flash@0 {
 317                 status = "okay";
 318                 m25p,fast-read;
 319                 label = "pnor";
 320                 /* spi-max-frequency = <100000000>; */
 321         };
 322 };
 323
 324 &uart1 {
 325         status = "okay";
 326         pinctrl-names = "default";
 327         pinctrl-0 = <&pinctrl_txd1_default
 328                          &pinctrl_rxd1_default
 329                          &pinctrl_ncts1_default
 330                          &pinctrl_nrts1_default>;
 331 };
 332
 333 &uart2 {
 334         status = "okay";
 335         pinctrl-names = "default";
 336         pinctrl-0 = <&pinctrl_txd2_default
 337                          &pinctrl_rxd2_default>;
 338 };
 339
 340 &uart3 {
 341         status = "okay";
 342         pinctrl-names = "default";
 343         pinctrl-0 = <&pinctrl_txd3_default
 344                          &pinctrl_rxd3_default>;
 345 };
 346
 347 &uart4 {
 348         status = "okay";
 349         pinctrl-names = "default";
 350         pinctrl-0 = <&pinctrl_txd4_default
 351                          &pinctrl_rxd4_default>;
 352 };
 353
 354 /* The BMC's uart */
 355 &uart5 {
 356         status = "okay";
 357 };
 358
 359 &mac0 {
 360         status = "okay";
 361         pinctrl-names = "default";
 362         pinctrl-0 = <&pinctrl_rmii1_default>;
 363         clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
 364                  <&syscon ASPEED_CLK_MAC1RCLK>;
 365         clock-names = "MACCLK", "RCLK";
 366         use-ncsi;
 367 };
 368
 369 &mac1 {
 370         status = "okay";
 371         pinctrl-names = "default";
 372         pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
 373 };
 374
 375 &i2c0 {
 376         status = "okay";
 377 };
 378
 379 &i2c1 {
 380         status = "okay";
 381 };
 382
 383 &i2c2 {
 384         status = "okay";
 385 };
 386
 387 &i2c3 {
 388         status = "okay";
 389         eeprom@50 {
 390                 compatible = "microchip,24c64", "atmel,24c64";
 391                 reg = <0x50>;
 392                 pagesize = <32>;
 393         };
 394
 395         inlet_mem2: tmp175@28 {
 396                 compatible = "ti,tmp175";
 397                 reg = <0x28>;
 398         };
 399
 400         inlet_cpu: tmp175@29 {
 401                 compatible = "ti,tmp175";
 402                 reg = <0x29>;
 403         };
 404
 405         inlet_mem1: tmp175@2a {
 406                 compatible = "ti,tmp175";
 407                 reg = <0x2a>;
 408         };
 409
 410         outlet_cpu: tmp175@2b {
 411                 compatible = "ti,tmp175";
 412                 reg = <0x2b>;
 413         };
 414
 415         outlet1: tmp175@2c {
 416                 compatible = "ti,tmp175";
 417                 reg = <0x2c>;
 418         };
 419
 420         outlet2: tmp175@2d {
 421                 compatible = "ti,tmp175";
 422                 reg = <0x2d>;
 423         };
 424 };
 425
 426 &i2c4 {
 427         status = "okay";
 428         rtc@51 {
 429                 compatible = "nxp,pcf85063a";
 430                 reg = <0x51>;
 431         };
 432 };
 433
 434 &i2c5 {
 435         status = "okay";
 436 };
 437
 438 &i2c6 {
 439         status = "okay";
 440         psu@58 {
 441                 compatible = "pmbus";
 442                 reg = <0x58>;
 443         };
 444
 445         psu@59 {
 446                 compatible = "pmbus";
 447                 reg = <0x59>;
 448         };
 449 };
 450
 451 &i2c7 {
 452         status = "okay";
 453 };
 454
 455 &i2c8 {
 456         status = "okay";
 457 };
 458
 459 &i2c9 {
 460         status = "okay";
 461 };
 462
 463 &i2c10 {
 464         status = "okay";
 465         adm1278@10 {
 466                 compatible = "adi,adm1278";
 467                 reg = <0x10>;
 468         };
 469
 470         adm1278@11 {
 471                 compatible = "adi,adm1278";
 472                 reg = <0x11>;
 473         };
 474 };
 475
 476 &gfx {
 477         status = "okay";
 478         memory-region = <&gfx_memory>;
 479 };
 480
 481 &pinctrl {
 482         aspeed,external-nodes = <&gfx &lhc>;
 483 };
 484
 485 &pwm_tacho {
 486         status = "okay";
 487         pinctrl-names = "default";
 488         pinctrl-0 = <&pinctrl_pwm2_default &pinctrl_pwm3_default
 489                         &pinctrl_pwm4_default &pinctrl_pwm5_default
 490                         &pinctrl_pwm6_default &pinctrl_pwm7_default>;
 491
 492         fan@0 {
 493                 reg = <0x02>;
 494                 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
 495         };
 496
 497         fan@1 {
 498                 reg = <0x02>;
 499                 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
 500         };
 501
 502         fan@2 {
 503                 reg = <0x03>;
 504                 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
 505         };
 506
 507         fan@3 {
 508                 reg = <0x03>;
 509                 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
 510         };
 511
 512         fan@4 {
 513                 reg = <0x04>;
 514                 aspeed,fan-tach-ch = /bits/ 8 <0x08>;
 515         };
 516
 517         fan@5 {
 518                 reg = <0x04>;
 519                 aspeed,fan-tach-ch = /bits/ 8 <0x09>;
 520         };
 521
 522         fan@6 {
 523                 reg = <0x05>;
 524                 aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
 525         };
 526
 527         fan@7 {
 528                 reg = <0x05>;
 529                 aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
 530         };
 531
 532         fan@8 {
 533                 reg = <0x06>;
 534                 aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
 535         };
 536
 537         fan@9 {
 538                 reg = <0x06>;
 539                 aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
 540         };
 541
 542         fan@10 {
 543                 reg = <0x07>;
 544                 aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
 545         };
 546
 547         fan@11 {
 548                 reg = <0x07>;
 549                 aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
 550         };
 551
 552 };
 553
 554 &vhub {
 555         status = "okay";
 556 };
 557
 558 &adc {
 559         status = "okay";
 560 };
 561
 562 &video {
 563         status = "okay";
 564         memory-region = <&video_engine_memory>;
 565 };
 566
 567 &gpio {
 568         gpio-line-names =
 569         /*A0-A7*/       "","","","S0_BMC_SPECIAL_BOOT","","","","",
 570         /*B0-B7*/       "BMC_SELECT_EEPROM","","","",
 571                         "POWER_BUTTON","","","",
 572         /*C0-C7*/       "","","","","","","","",
 573         /*D0-D7*/       "","","","","","","","",
 574         /*E0-E7*/       "","","","","","","","",
 575         /*F0-F7*/       "","","BMC_SYS_PSON_L","S0_DDR_SAVE","PGOOD",
 576                         "S1_DDR_SAVE","","",
 577         /*G0-G7*/       "S0_FW_BOOT_OK","SHD_REQ_L","","S0_OVERTEMP_L","","",
 578                         "","",
 579         /*H0-H7*/       "","","","","PSU1_VIN_GOOD","PSU2_VIN_GOOD","","",
 580         /*I0-I7*/       "PSU1_PRESENT","PSU2_PRESENT","S1_BMC_SPECIAL_BOOT",
 581                         "","","","","",
 582         /*J0-J7*/       "S0_HIGHTEMP_L","S0_FAULT_L","S0_SCP_AUTH_FAIL_L","",
 583                         "","","","",
 584         /*K0-K7*/       "","","","","","","","",
 585         /*L0-L7*/       "","","","BMC_SYSRESET_L","SPI_AUTH_FAIL_L","","","",
 586         /*M0-M7*/       "","","","","","","","",
 587         /*N0-N7*/       "","","","","","","","",
 588         /*O0-O7*/       "","","","","","","","",
 589         /*P0-P7*/       "","","","","","","","",
 590         /*Q0-Q7*/       "","","","","","UID_BUTTON","","",
 591         /*R0-R7*/       "","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN",
 592                         "OCP_MAIN_PWREN","RESET_BUTTON","","",
 593         /*S0-S7*/       "","","","","","","","",
 594         /*T0-T7*/       "","","","","","","","",
 595         /*U0-U7*/       "","","","","","","","",
 596         /*V0-V7*/       "","","","","","","","",
 597         /*W0-W7*/       "","","","","","","","",
 598         /*X0-X7*/       "","","","","","","","",
 599         /*Y0-Y7*/       "","","","","","","","",
 600         /*Z0-Z7*/       "S0_BMC_PLIMIT","S1_FAULT_L","S1_FW_BOOT_OK","","",
 601                         "S1_SCP_AUTH_FAIL_L","S1_OVERTEMP_L","",
 602         /*AA0-AA7*/     "","","","","","","","",
 603         /*AB0-AB7*/     "S1_HIGHTEMP_L","S1_BMC_PLIMIT","S0_BMC_DDR_ADDR",
 604                         "S1_BMC_DDR_ADR","","","","",
 605         /*AC0-AC7*/     "SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
 606                         "BMC_OCP_PG";
 607 };