arch/arm/boot/dts/am33xx.dtsi

   1 /*
   2  * Device Tree Source for AM33XX SoC
   3  *
   4  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/bus/ti-sysc.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/pinctrl/am33xx.h>
  14 #include <dt-bindings/clock/am3.h>
  15
  16 / {
  17         compatible = "ti,am33xx";
  18         interrupt-parent = <&intc>;
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         chosen { };
  22
  23         aliases {
  24                 i2c0 = &i2c0;
  25                 i2c1 = &i2c1;
  26                 i2c2 = &i2c2;
  27                 serial0 = &uart0;
  28                 serial1 = &uart1;
  29                 serial2 = &uart2;
  30                 serial3 = &uart3;
  31                 serial4 = &uart4;
  32                 serial5 = &uart5;
  33                 d-can0 = &dcan0;
  34                 d-can1 = &dcan1;
  35                 usb0 = &usb0;
  36                 usb1 = &usb1;
  37                 phy0 = &usb0_phy;
  38                 phy1 = &usb1_phy;
  39                 ethernet0 = &cpsw_emac0;
  40                 ethernet1 = &cpsw_emac1;
  41                 spi0 = &spi0;
  42                 spi1 = &spi1;
  43         };
  44
  45         cpus {
  46                 #address-cells = <1>;
  47                 #size-cells = <0>;
  48                 cpu@0 {
  49                         compatible = "arm,cortex-a8";
  50                         enable-method = "ti,am3352";
  51                         device_type = "cpu";
  52                         reg = <0>;
  53
  54                         operating-points-v2 = <&cpu0_opp_table>;
  55
  56                         clocks = <&dpll_mpu_ck>;
  57                         clock-names = "cpu";
  58
  59                         clock-latency = <300000>; /* From omap-cpufreq driver */
  60                         cpu-idle-states = <&mpu_gate>;
  61                 };
  62
  63                 idle-states {
  64                         mpu_gate: mpu_gate {
  65                                 compatible = "arm,idle-state";
  66                                 entry-latency-us = <40>;
  67                                 exit-latency-us = <90>;
  68                                 min-residency-us = <300>;
  69                                 ti,idle-wkup-m3;
  70                         };
  71                 };
  72         };
  73
  74         cpu0_opp_table: opp-table {
  75                 compatible = "operating-points-v2-ti-cpu";
  76                 syscon = <&scm_conf>;
  77
  78                 /*
  79                  * The three following nodes are marked with opp-suspend
  80                  * because the can not be enabled simultaneously on a
  81                  * single SoC.
  82                  */
  83                 opp50-300000000 {
  84                         opp-hz = /bits/ 64 <300000000>;
  85                         opp-microvolt = <950000 931000 969000>;
  86                         opp-supported-hw = <0x06 0x0010>;
  87                         opp-suspend;
  88                 };
  89
  90                 opp100-275000000 {
  91                         opp-hz = /bits/ 64 <275000000>;
  92                         opp-microvolt = <1100000 1078000 1122000>;
  93                         opp-supported-hw = <0x01 0x00FF>;
  94                         opp-suspend;
  95                 };
  96
  97                 opp100-300000000 {
  98                         opp-hz = /bits/ 64 <300000000>;
  99                         opp-microvolt = <1100000 1078000 1122000>;
 100                         opp-supported-hw = <0x06 0x0020>;
 101                         opp-suspend;
 102                 };
 103
 104                 opp100-500000000 {
 105                         opp-hz = /bits/ 64 <500000000>;
 106                         opp-microvolt = <1100000 1078000 1122000>;
 107                         opp-supported-hw = <0x01 0xFFFF>;
 108                 };
 109
 110                 opp100-600000000 {
 111                         opp-hz = /bits/ 64 <600000000>;
 112                         opp-microvolt = <1100000 1078000 1122000>;
 113                         opp-supported-hw = <0x06 0x0040>;
 114                 };
 115
 116                 opp120-600000000 {
 117                         opp-hz = /bits/ 64 <600000000>;
 118                         opp-microvolt = <1200000 1176000 1224000>;
 119                         opp-supported-hw = <0x01 0xFFFF>;
 120                 };
 121
 122                 opp120-720000000 {
 123                         opp-hz = /bits/ 64 <720000000>;
 124                         opp-microvolt = <1200000 1176000 1224000>;
 125                         opp-supported-hw = <0x06 0x0080>;
 126                 };
 127
 128                 oppturbo-720000000 {
 129                         opp-hz = /bits/ 64 <720000000>;
 130                         opp-microvolt = <1260000 1234800 1285200>;
 131                         opp-supported-hw = <0x01 0xFFFF>;
 132                 };
 133
 134                 oppturbo-800000000 {
 135                         opp-hz = /bits/ 64 <800000000>;
 136                         opp-microvolt = <1260000 1234800 1285200>;
 137                         opp-supported-hw = <0x06 0x0100>;
 138                 };
 139
 140                 oppnitro-1000000000 {
 141                         opp-hz = /bits/ 64 <1000000000>;
 142                         opp-microvolt = <1325000 1298500 1351500>;
 143                         opp-supported-hw = <0x04 0x0200>;
 144                 };
 145         };
 146
 147         target-module@4b000000 {
 148                 compatible = "ti,sysc-omap4-simple", "ti,sysc";
 149                 clocks = <&l3_clkctrl AM3_L3_L3_INSTR_CLKCTRL 0>;
 150                 clock-names = "fck";
 151                 ti,no-idle;
 152                 #address-cells = <1>;
 153                 #size-cells = <1>;
 154                 ranges = <0x0 0x4b000000 0x1000000>;
 155
 156                 target-module@140000 {
 157                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 158                         clocks = <&l3_aon_clkctrl AM3_L3_AON_DEBUGSS_CLKCTRL 0>;
 159                         clock-names = "fck";
 160                         #address-cells = <1>;
 161                         #size-cells = <1>;
 162                         ranges = <0x0 0x140000 0xec0000>;
 163
 164                         pmu@0 {
 165                                 compatible = "arm,cortex-a8-pmu";
 166                                 interrupts = <3>;
 167                         };
 168                 };
 169         };
 170
 171         /*
 172          * The soc node represents the soc top level view. It is used for IPs
 173          * that are not memory mapped in the MPU view or for the MPU itself.
 174          */
 175         soc {
 176                 compatible = "ti,omap-infra";
 177         };
 178
 179         /*
 180          * XXX: Use a flat representation of the AM33XX interconnect.
 181          * The real AM33XX interconnect network is quite complex. Since
 182          * it will not bring real advantage to represent that in DT
 183          * for the moment, just use a fake OCP bus entry to represent
 184          * the whole bus hierarchy.
 185          */
 186         ocp: ocp {
 187                 compatible = "simple-bus";
 188                 #address-cells = <1>;
 189                 #size-cells = <1>;
 190                 ranges;
 191                 ti,hwmods = "l3_main";
 192
 193                 l4_wkup: interconnect@44c00000 {
 194                 };
 195                 l4_per: interconnect@48000000 {
 196                 };
 197                 l4_fw: interconnect@47c00000 {
 198                 };
 199                 l4_fast: interconnect@4a000000 {
 200                 };
 201                 l4_mpuss: interconnect@4b140000 {
 202                 };
 203
 204                 intc: interrupt-controller@48200000 {
 205                         compatible = "ti,am33xx-intc";
 206                         interrupt-controller;
 207                         #interrupt-cells = <1>;
 208                         reg = <0x48200000 0x1000>;
 209                 };
 210
 211                 target-module@49000000 {
 212                         compatible = "ti,sysc-omap4", "ti,sysc";
 213                         reg = <0x49000000 0x4>;
 214                         reg-names = "rev";
 215                         clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>;
 216                         clock-names = "fck";
 217                         #address-cells = <1>;
 218                         #size-cells = <1>;
 219                         ranges = <0x0 0x49000000 0x10000>;
 220
 221                         edma: dma@0 {
 222                                 compatible = "ti,edma3-tpcc";
 223                                 reg = <0 0x10000>;
 224                                 reg-names = "edma3_cc";
 225                                 interrupts = <12 13 14>;
 226                                 interrupt-names = "edma3_ccint", "edma3_mperr",
 227                                                   "edma3_ccerrint";
 228                                 dma-requests = <64>;
 229                                 #dma-cells = <2>;
 230
 231                                 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
 232                                            <&edma_tptc2 0>;
 233
 234                                 ti,edma-memcpy-channels = <20 21>;
 235                         };
 236                 };
 237
 238                 target-module@49800000 {
 239                         compatible = "ti,sysc-omap4", "ti,sysc";
 240                         reg = <0x49800000 0x4>,
 241                               <0x49800010 0x4>;
 242                         reg-names = "rev", "sysc";
 243                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 244                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 245                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 246                                         <SYSC_IDLE_SMART>;
 247                         clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>;
 248                         clock-names = "fck";
 249                         #address-cells = <1>;
 250                         #size-cells = <1>;
 251                         ranges = <0x0 0x49800000 0x100000>;
 252
 253                         edma_tptc0: dma@0 {
 254                                 compatible = "ti,edma3-tptc";
 255                                 reg = <0 0x100000>;
 256                                 interrupts = <112>;
 257                                 interrupt-names = "edma3_tcerrint";
 258                         };
 259                 };
 260
 261                 target-module@49900000 {
 262                         compatible = "ti,sysc-omap4", "ti,sysc";
 263                         reg = <0x49900000 0x4>,
 264                               <0x49900010 0x4>;
 265                         reg-names = "rev", "sysc";
 266                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 267                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 268                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 269                                         <SYSC_IDLE_SMART>;
 270                         clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>;
 271                         clock-names = "fck";
 272                         #address-cells = <1>;
 273                         #size-cells = <1>;
 274                         ranges = <0x0 0x49900000 0x100000>;
 275
 276                         edma_tptc1: dma@0 {
 277                                 compatible = "ti,edma3-tptc";
 278                                 reg = <0 0x100000>;
 279                                 interrupts = <113>;
 280                                 interrupt-names = "edma3_tcerrint";
 281                         };
 282                 };
 283
 284                 target-module@49a00000 {
 285                         compatible = "ti,sysc-omap4", "ti,sysc";
 286                         reg = <0x49a00000 0x4>,
 287                               <0x49a00010 0x4>;
 288                         reg-names = "rev", "sysc";
 289                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 290                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 291                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 292                                         <SYSC_IDLE_SMART>;
 293                         clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>;
 294                         clock-names = "fck";
 295                         #address-cells = <1>;
 296                         #size-cells = <1>;
 297                         ranges = <0x0 0x49a00000 0x100000>;
 298
 299                         edma_tptc2: dma@0 {
 300                                 compatible = "ti,edma3-tptc";
 301                                 reg = <0 0x100000>;
 302                                 interrupts = <114>;
 303                                 interrupt-names = "edma3_tcerrint";
 304                         };
 305                 };
 306
 307                 target-module@47810000 {
 308                         compatible = "ti,sysc-omap2", "ti,sysc";
 309                         reg = <0x478102fc 0x4>,
 310                               <0x47810110 0x4>,
 311                               <0x47810114 0x4>;
 312                         reg-names = "rev", "sysc", "syss";
 313                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 314                                          SYSC_OMAP2_ENAWAKEUP |
 315                                          SYSC_OMAP2_SOFTRESET |
 316                                          SYSC_OMAP2_AUTOIDLE)>;
 317                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 318                                         <SYSC_IDLE_NO>,
 319                                         <SYSC_IDLE_SMART>;
 320                         ti,syss-mask = <1>;
 321                         clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
 322                         clock-names = "fck";
 323                         #address-cells = <1>;
 324                         #size-cells = <1>;
 325                         ranges = <0x0 0x47810000 0x1000>;
 326
 327                         mmc3: mmc@0 {
 328                                 compatible = "ti,am335-sdhci";
 329                                 ti,needs-special-reset;
 330                                 interrupts = <29>;
 331                                 reg = <0x0 0x1000>;
 332                                 status = "disabled";
 333                         };
 334                 };
 335
 336                 usb: target-module@47400000 {
 337                         compatible = "ti,sysc-omap4", "ti,sysc";
 338                         reg = <0x47400000 0x4>,
 339                               <0x47400010 0x4>;
 340                         reg-names = "rev", "sysc";
 341                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
 342                                          SYSC_OMAP4_SOFTRESET)>;
 343                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 344                                         <SYSC_IDLE_NO>,
 345                                         <SYSC_IDLE_SMART>;
 346                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 347                                         <SYSC_IDLE_NO>,
 348                                         <SYSC_IDLE_SMART>,
 349                                         <SYSC_IDLE_SMART_WKUP>;
 350                         clocks = <&l3s_clkctrl AM3_L3S_USB_OTG_HS_CLKCTRL 0>;
 351                         clock-names = "fck";
 352                         #address-cells = <1>;
 353                         #size-cells = <1>;
 354                         ranges = <0x0 0x47400000 0x8000>;
 355
 356                         usb0_phy: usb-phy@1300 {
 357                                 compatible = "ti,am335x-usb-phy";
 358                                 reg = <0x1300 0x100>;
 359                                 reg-names = "phy";
 360                                 ti,ctrl_mod = <&usb_ctrl_mod>;
 361                                 #phy-cells = <0>;
 362                         };
 363
 364                         usb0: usb@1400 {
 365                                 compatible = "ti,musb-am33xx";
 366                                 reg = <0x1400 0x400>,
 367                                       <0x1000 0x200>;
 368                                 reg-names = "mc", "control";
 369
 370                                 interrupts = <18>;
 371                                 interrupt-names = "mc";
 372                                 dr_mode = "otg";
 373                                 mentor,multipoint = <1>;
 374                                 mentor,num-eps = <16>;
 375                                 mentor,ram-bits = <12>;
 376                                 mentor,power = <500>;
 377                                 phys = <&usb0_phy>;
 378
 379                                 dmas = <&cppi41dma  0 0 &cppi41dma  1 0
 380                                         &cppi41dma  2 0 &cppi41dma  3 0
 381                                         &cppi41dma  4 0 &cppi41dma  5 0
 382                                         &cppi41dma  6 0 &cppi41dma  7 0
 383                                         &cppi41dma  8 0 &cppi41dma  9 0
 384                                         &cppi41dma 10 0 &cppi41dma 11 0
 385                                         &cppi41dma 12 0 &cppi41dma 13 0
 386                                         &cppi41dma 14 0 &cppi41dma  0 1
 387                                         &cppi41dma  1 1 &cppi41dma  2 1
 388                                         &cppi41dma  3 1 &cppi41dma  4 1
 389                                         &cppi41dma  5 1 &cppi41dma  6 1
 390                                         &cppi41dma  7 1 &cppi41dma  8 1
 391                                         &cppi41dma  9 1 &cppi41dma 10 1
 392                                         &cppi41dma 11 1 &cppi41dma 12 1
 393                                         &cppi41dma 13 1 &cppi41dma 14 1>;
 394                                 dma-names =
 395                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
 396                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
 397                                         "rx14", "rx15",
 398                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
 399                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
 400                                         "tx14", "tx15";
 401                         };
 402
 403                         usb1_phy: usb-phy@1b00 {
 404                                 compatible = "ti,am335x-usb-phy";
 405                                 reg = <0x1b00 0x100>;
 406                                 reg-names = "phy";
 407                                 ti,ctrl_mod = <&usb_ctrl_mod>;
 408                                 #phy-cells = <0>;
 409                         };
 410
 411                         usb1: usb@1800 {
 412                                 compatible = "ti,musb-am33xx";
 413                                 reg = <0x1c00 0x400>,
 414                                       <0x1800 0x200>;
 415                                 reg-names = "mc", "control";
 416                                 interrupts = <19>;
 417                                 interrupt-names = "mc";
 418                                 dr_mode = "otg";
 419                                 mentor,multipoint = <1>;
 420                                 mentor,num-eps = <16>;
 421                                 mentor,ram-bits = <12>;
 422                                 mentor,power = <500>;
 423                                 phys = <&usb1_phy>;
 424
 425                                 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
 426                                         &cppi41dma 17 0 &cppi41dma 18 0
 427                                         &cppi41dma 19 0 &cppi41dma 20 0
 428                                         &cppi41dma 21 0 &cppi41dma 22 0
 429                                         &cppi41dma 23 0 &cppi41dma 24 0
 430                                         &cppi41dma 25 0 &cppi41dma 26 0
 431                                         &cppi41dma 27 0 &cppi41dma 28 0
 432                                         &cppi41dma 29 0 &cppi41dma 15 1
 433                                         &cppi41dma 16 1 &cppi41dma 17 1
 434                                         &cppi41dma 18 1 &cppi41dma 19 1
 435                                         &cppi41dma 20 1 &cppi41dma 21 1
 436                                         &cppi41dma 22 1 &cppi41dma 23 1
 437                                         &cppi41dma 24 1 &cppi41dma 25 1
 438                                         &cppi41dma 26 1 &cppi41dma 27 1
 439                                         &cppi41dma 28 1 &cppi41dma 29 1>;
 440                                 dma-names =
 441                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
 442                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
 443                                         "rx14", "rx15",
 444                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
 445                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
 446                                         "tx14", "tx15";
 447                         };
 448
 449                         cppi41dma: dma-controller@2000 {
 450                                 compatible = "ti,am3359-cppi41";
 451                                 reg =  <0x0000 0x1000>,
 452                                        <0x2000 0x1000>,
 453                                        <0x3000 0x1000>,
 454                                        <0x4000 0x4000>;
 455                                 reg-names = "glue", "controller", "scheduler", "queuemgr";
 456                                 interrupts = <17>;
 457                                 interrupt-names = "glue";
 458                                 #dma-cells = <2>;
 459                                 #dma-channels = <30>;
 460                                 #dma-requests = <256>;
 461                         };
 462                 };
 463
 464                 target-module@40300000 {
 465                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 466                         clocks = <&l3_clkctrl AM3_L3_OCMCRAM_CLKCTRL 0>;
 467                         clock-names = "fck";
 468                         ti,no-idle;
 469                         #address-cells = <1>;
 470                         #size-cells = <1>;
 471                         ranges = <0 0x40300000 0x10000>;
 472
 473                         ocmcram: sram@0 {
 474                                 compatible = "mmio-sram";
 475                                 reg = <0 0x10000>; /* 64k */
 476                                 ranges = <0 0 0x10000>;
 477                                 #address-cells = <1>;
 478                                 #size-cells = <1>;
 479
 480                                 pm_sram_code: pm-code-sram@0 {
 481                                         compatible = "ti,sram";
 482                                         reg = <0x0 0x1000>;
 483                                         protect-exec;
 484                                 };
 485
 486                                 pm_sram_data: pm-data-sram@1000 {
 487                                         compatible = "ti,sram";
 488                                         reg = <0x1000 0x1000>;
 489                                         pool;
 490                                 };
 491                         };
 492                 };
 493
 494                 target-module@4c000000 {
 495                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 496                         reg = <0x4c000000 0x4>;
 497                         reg-names = "rev";
 498                         clocks = <&l3_clkctrl AM3_L3_EMIF_CLKCTRL 0>;
 499                         clock-names = "fck";
 500                         ti,no-idle;
 501                         #address-cells = <1>;
 502                         #size-cells = <1>;
 503                         ranges = <0x0 0x4c000000 0x1000000>;
 504
 505                         emif: emif@0 {
 506                                 compatible = "ti,emif-am3352";
 507                                 reg = <0 0x1000000>;
 508                                 interrupts = <101>;
 509                                 sram = <&pm_sram_code
 510                                         &pm_sram_data>;
 511                         };
 512                 };
 513
 514                 target-module@50000000 {
 515                         compatible = "ti,sysc-omap2", "ti,sysc";
 516                         reg = <0x50000000 4>,
 517                               <0x50000010 4>,
 518                               <0x50000014 4>;
 519                         reg-names = "rev", "sysc", "syss";
 520                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 521                                         <SYSC_IDLE_NO>,
 522                                         <SYSC_IDLE_SMART>;
 523                         ti,syss-mask = <1>;
 524                         clocks = <&l3s_clkctrl AM3_L3S_GPMC_CLKCTRL 0>;
 525                         clock-names = "fck";
 526                         #address-cells = <1>;
 527                         #size-cells = <1>;
 528                         ranges = <0x50000000 0x50000000 0x00001000>, /* regs */
 529                                  <0x00000000 0x00000000 0x40000000>; /* data */
 530
 531                         gpmc: gpmc@50000000 {
 532                                 compatible = "ti,am3352-gpmc";
 533                                 reg = <0x50000000 0x2000>;
 534                                 interrupts = <100>;
 535                                 dmas = <&edma 52 0>;
 536                                 dma-names = "rxtx";
 537                                 gpmc,num-cs = <7>;
 538                                 gpmc,num-waitpins = <2>;
 539                                 #address-cells = <2>;
 540                                 #size-cells = <1>;
 541                                 interrupt-controller;
 542                                 #interrupt-cells = <2>;
 543                                 gpio-controller;
 544                                 #gpio-cells = <2>;
 545                                 status = "disabled";
 546                         };
 547                 };
 548
 549                 sham_target: target-module@53100000 {
 550                         compatible = "ti,sysc-omap3-sham", "ti,sysc";
 551                         reg = <0x53100100 0x4>,
 552                               <0x53100110 0x4>,
 553                               <0x53100114 0x4>;
 554                         reg-names = "rev", "sysc", "syss";
 555                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 556                                          SYSC_OMAP2_AUTOIDLE)>;
 557                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 558                                         <SYSC_IDLE_NO>,
 559                                         <SYSC_IDLE_SMART>;
 560                         ti,syss-mask = <1>;
 561                         /* Domains (P, C): per_pwrdm, l3_clkdm */
 562                         clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
 563                         clock-names = "fck";
 564                         #address-cells = <1>;
 565                         #size-cells = <1>;
 566                         ranges = <0x0 0x53100000 0x1000>;
 567
 568                         sham: sham@0 {
 569                                 compatible = "ti,omap4-sham";
 570                                 reg = <0 0x200>;
 571                                 interrupts = <109>;
 572                                 dmas = <&edma 36 0>;
 573                                 dma-names = "rx";
 574                         };
 575                 };
 576
 577                 aes_target: target-module@53500000 {
 578                         compatible = "ti,sysc-omap2", "ti,sysc";
 579                         reg = <0x53500080 0x4>,
 580                               <0x53500084 0x4>,
 581                               <0x53500088 0x4>;
 582                         reg-names = "rev", "sysc", "syss";
 583                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 584                                          SYSC_OMAP2_AUTOIDLE)>;
 585                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 586                                         <SYSC_IDLE_NO>,
 587                                         <SYSC_IDLE_SMART>,
 588                                         <SYSC_IDLE_SMART_WKUP>;
 589                         ti,syss-mask = <1>;
 590                         /* Domains (P, C): per_pwrdm, l3_clkdm */
 591                         clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
 592                         clock-names = "fck";
 593                         #address-cells = <1>;
 594                         #size-cells = <1>;
 595                         ranges = <0x0 0x53500000 0x1000>;
 596
 597                         aes: aes@0 {
 598                                 compatible = "ti,omap4-aes";
 599                                 reg = <0 0xa0>;
 600                                 interrupts = <103>;
 601                                 dmas = <&edma 6 0>,
 602                                        <&edma 5 0>;
 603                                 dma-names = "tx", "rx";
 604                         };
 605                 };
 606
 607                 target-module@56000000 {
 608                         compatible = "ti,sysc-omap4", "ti,sysc";
 609                         reg = <0x5600fe00 0x4>,
 610                               <0x5600fe10 0x4>;
 611                         reg-names = "rev", "sysc";
 612                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 613                                         <SYSC_IDLE_NO>,
 614                                         <SYSC_IDLE_SMART>;
 615                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 616                                         <SYSC_IDLE_NO>,
 617                                         <SYSC_IDLE_SMART>;
 618                         clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
 619                         clock-names = "fck";
 620                         power-domains = <&prm_gfx>;
 621                         resets = <&prm_gfx 0>;
 622                         reset-names = "rstctrl";
 623                         #address-cells = <1>;
 624                         #size-cells = <1>;
 625                         ranges = <0 0x56000000 0x1000000>;
 626
 627                         /*
 628                          * Closed source PowerVR driver, no child device
 629                          * binding or driver in mainline
 630                          */
 631                 };
 632         };
 633 };
 634
 635 #include "am33xx-l4.dtsi"
 636 #include "am33xx-clocks.dtsi"
 637
 638 &prcm {
 639         prm_per: prm@c00 {
 640                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 641                 reg = <0xc00 0x100>;
 642                 #reset-cells = <1>;
 643                 #power-domain-cells = <0>;
 644         };
 645
 646         prm_wkup: prm@d00 {
 647                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 648                 reg = <0xd00 0x100>;
 649                 #reset-cells = <1>;
 650                 #power-domain-cells = <0>;
 651         };
 652
 653         prm_mpu: prm@e00 {
 654                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 655                 reg = <0xe00 0x100>;
 656                 #power-domain-cells = <0>;
 657         };
 658
 659         prm_device: prm@f00 {
 660                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 661                 reg = <0xf00 0x100>;
 662                 #reset-cells = <1>;
 663         };
 664
 665         prm_rtc: prm@1000 {
 666                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 667                 reg = <0x1000 0x100>;
 668                 #power-domain-cells = <0>;
 669         };
 670
 671         prm_gfx: prm@1100 {
 672                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 673                 reg = <0x1100 0x100>;
 674                 #power-domain-cells = <0>;
 675                 #reset-cells = <1>;
 676         };
 677
 678         prm_cefuse: prm@1200 {
 679                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 680                 reg = <0x1200 0x100>;
 681                 #power-domain-cells = <0>;
 682         };
 683 };
 684
 685 /* Preferred always-on timer for clocksource */
 686 &timer1_target {
 687         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>,
 688                  <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
 689         clock-names = "fck", "ick";
 690         ti,no-reset-on-init;
 691         ti,no-idle;
 692         timer@0 {
 693                 assigned-clocks = <&timer1_fck>;
 694                 assigned-clock-parents = <&sys_clkin_ck>;
 695         };
 696 };
 697
 698 /* Preferred timer for clockevent */
 699 &timer2_target {
 700         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>,
 701                  <&l4ls_clkctrl AM3_L4LS_L4_LS_CLKCTRL 0>;
 702         clock-names = "fck", "ick";
 703         ti,no-reset-on-init;
 704         ti,no-idle;
 705         timer@0 {
 706                 assigned-clocks = <&timer2_fck>;
 707                 assigned-clock-parents = <&sys_clkin_ck>;
 708         };
 709 };