arch/arm/boot/dts/am33xx.dtsi

   1 /*
   2  * Device Tree Source for AM33XX SoC
   3  *
   4  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/bus/ti-sysc.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/pinctrl/am33xx.h>
  14 #include <dt-bindings/clock/am3.h>
  15
  16 / {
  17         compatible = "ti,am33xx";
  18         interrupt-parent = <&intc>;
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         chosen { };
  22
  23         aliases {
  24                 i2c0 = &i2c0;
  25                 i2c1 = &i2c1;
  26                 i2c2 = &i2c2;
  27                 serial0 = &uart0;
  28                 serial1 = &uart1;
  29                 serial2 = &uart2;
  30                 serial3 = &uart3;
  31                 serial4 = &uart4;
  32                 serial5 = &uart5;
  33                 d-can0 = &dcan0;
  34                 d-can1 = &dcan1;
  35                 usb0 = &usb0;
  36                 usb1 = &usb1;
  37                 phy0 = &usb0_phy;
  38                 phy1 = &usb1_phy;
  39                 ethernet0 = &cpsw_emac0;
  40                 ethernet1 = &cpsw_emac1;
  41                 spi0 = &spi0;
  42                 spi1 = &spi1;
  43         };
  44
  45         cpus {
  46                 #address-cells = <1>;
  47                 #size-cells = <0>;
  48                 cpu@0 {
  49                         compatible = "arm,cortex-a8";
  50                         enable-method = "ti,am3352";
  51                         device_type = "cpu";
  52                         reg = <0>;
  53
  54                         operating-points-v2 = <&cpu0_opp_table>;
  55
  56                         clocks = <&dpll_mpu_ck>;
  57                         clock-names = "cpu";
  58
  59                         clock-latency = <300000>; /* From omap-cpufreq driver */
  60                         cpu-idle-states = <&mpu_gate>;
  61                 };
  62
  63                 idle-states {
  64                         mpu_gate: mpu_gate {
  65                                 compatible = "arm,idle-state";
  66                                 entry-latency-us = <40>;
  67                                 exit-latency-us = <90>;
  68                                 min-residency-us = <300>;
  69                                 ti,idle-wkup-m3;
  70                         };
  71                 };
  72         };
  73
  74         cpu0_opp_table: opp-table {
  75                 compatible = "operating-points-v2-ti-cpu";
  76                 syscon = <&scm_conf>;
  77
  78                 /*
  79                  * The three following nodes are marked with opp-suspend
  80                  * because the can not be enabled simultaneously on a
  81                  * single SoC.
  82                  */
  83                 opp50-300000000 {
  84                         opp-hz = /bits/ 64 <300000000>;
  85                         opp-microvolt = <950000 931000 969000>;
  86                         opp-supported-hw = <0x06 0x0010>;
  87                         opp-suspend;
  88                 };
  89
  90                 opp100-275000000 {
  91                         opp-hz = /bits/ 64 <275000000>;
  92                         opp-microvolt = <1100000 1078000 1122000>;
  93                         opp-supported-hw = <0x01 0x00FF>;
  94                         opp-suspend;
  95                 };
  96
  97                 opp100-300000000 {
  98                         opp-hz = /bits/ 64 <300000000>;
  99                         opp-microvolt = <1100000 1078000 1122000>;
 100                         opp-supported-hw = <0x06 0x0020>;
 101                         opp-suspend;
 102                 };
 103
 104                 opp100-500000000 {
 105                         opp-hz = /bits/ 64 <500000000>;
 106                         opp-microvolt = <1100000 1078000 1122000>;
 107                         opp-supported-hw = <0x01 0xFFFF>;
 108                 };
 109
 110                 opp100-600000000 {
 111                         opp-hz = /bits/ 64 <600000000>;
 112                         opp-microvolt = <1100000 1078000 1122000>;
 113                         opp-supported-hw = <0x06 0x0040>;
 114                 };
 115
 116                 opp120-600000000 {
 117                         opp-hz = /bits/ 64 <600000000>;
 118                         opp-microvolt = <1200000 1176000 1224000>;
 119                         opp-supported-hw = <0x01 0xFFFF>;
 120                 };
 121
 122                 opp120-720000000 {
 123                         opp-hz = /bits/ 64 <720000000>;
 124                         opp-microvolt = <1200000 1176000 1224000>;
 125                         opp-supported-hw = <0x06 0x0080>;
 126                 };
 127
 128                 oppturbo-720000000 {
 129                         opp-hz = /bits/ 64 <720000000>;
 130                         opp-microvolt = <1260000 1234800 1285200>;
 131                         opp-supported-hw = <0x01 0xFFFF>;
 132                 };
 133
 134                 oppturbo-800000000 {
 135                         opp-hz = /bits/ 64 <800000000>;
 136                         opp-microvolt = <1260000 1234800 1285200>;
 137                         opp-supported-hw = <0x06 0x0100>;
 138                 };
 139
 140                 oppnitro-1000000000 {
 141                         opp-hz = /bits/ 64 <1000000000>;
 142                         opp-microvolt = <1325000 1298500 1351500>;
 143                         opp-supported-hw = <0x04 0x0200>;
 144                 };
 145         };
 146
 147         target-module@4b000000 {
 148                 compatible = "ti,sysc-omap4-simple", "ti,sysc";
 149                 clocks = <&l3_clkctrl AM3_L3_L3_INSTR_CLKCTRL 0>;
 150                 clock-names = "fck";
 151                 ti,no-idle;
 152                 #address-cells = <1>;
 153                 #size-cells = <1>;
 154                 ranges = <0x0 0x4b000000 0x1000000>;
 155
 156                 target-module@140000 {
 157                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 158                         clocks = <&l3_aon_clkctrl AM3_L3_AON_DEBUGSS_CLKCTRL 0>;
 159                         clock-names = "fck";
 160                         #address-cells = <1>;
 161                         #size-cells = <1>;
 162                         ranges = <0x0 0x140000 0xec0000>;
 163
 164                         pmu@0 {
 165                                 compatible = "arm,cortex-a8-pmu";
 166                                 interrupts = <3>;
 167                         };
 168                 };
 169         };
 170
 171         /*
 172          * The soc node represents the soc top level view. It is used for IPs
 173          * that are not memory mapped in the MPU view or for the MPU itself.
 174          */
 175         soc {
 176                 compatible = "ti,omap-infra";
 177                 mpu {
 178                         compatible = "ti,omap3-mpu";
 179                         ti,hwmods = "mpu";
 180                         pm-sram = <&pm_sram_code
 181                                    &pm_sram_data>;
 182                 };
 183         };
 184
 185         /*
 186          * XXX: Use a flat representation of the AM33XX interconnect.
 187          * The real AM33XX interconnect network is quite complex. Since
 188          * it will not bring real advantage to represent that in DT
 189          * for the moment, just use a fake OCP bus entry to represent
 190          * the whole bus hierarchy.
 191          */
 192         ocp: ocp {
 193                 compatible = "simple-bus";
 194                 #address-cells = <1>;
 195                 #size-cells = <1>;
 196                 ranges;
 197                 ti,hwmods = "l3_main";
 198
 199                 l4_wkup: interconnect@44c00000 {
 200                 };
 201                 l4_per: interconnect@48000000 {
 202                 };
 203                 l4_fw: interconnect@47c00000 {
 204                 };
 205                 l4_fast: interconnect@4a000000 {
 206                 };
 207                 l4_mpuss: interconnect@4b140000 {
 208                 };
 209
 210                 intc: interrupt-controller@48200000 {
 211                         compatible = "ti,am33xx-intc";
 212                         interrupt-controller;
 213                         #interrupt-cells = <1>;
 214                         reg = <0x48200000 0x1000>;
 215                 };
 216
 217                 target-module@49000000 {
 218                         compatible = "ti,sysc-omap4", "ti,sysc";
 219                         reg = <0x49000000 0x4>;
 220                         reg-names = "rev";
 221                         clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>;
 222                         clock-names = "fck";
 223                         #address-cells = <1>;
 224                         #size-cells = <1>;
 225                         ranges = <0x0 0x49000000 0x10000>;
 226
 227                         edma: dma@0 {
 228                                 compatible = "ti,edma3-tpcc";
 229                                 reg = <0 0x10000>;
 230                                 reg-names = "edma3_cc";
 231                                 interrupts = <12 13 14>;
 232                                 interrupt-names = "edma3_ccint", "edma3_mperr",
 233                                                   "edma3_ccerrint";
 234                                 dma-requests = <64>;
 235                                 #dma-cells = <2>;
 236
 237                                 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
 238                                            <&edma_tptc2 0>;
 239
 240                                 ti,edma-memcpy-channels = <20 21>;
 241                         };
 242                 };
 243
 244                 target-module@49800000 {
 245                         compatible = "ti,sysc-omap4", "ti,sysc";
 246                         reg = <0x49800000 0x4>,
 247                               <0x49800010 0x4>;
 248                         reg-names = "rev", "sysc";
 249                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 250                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 251                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 252                                         <SYSC_IDLE_SMART>;
 253                         clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>;
 254                         clock-names = "fck";
 255                         #address-cells = <1>;
 256                         #size-cells = <1>;
 257                         ranges = <0x0 0x49800000 0x100000>;
 258
 259                         edma_tptc0: dma@0 {
 260                                 compatible = "ti,edma3-tptc";
 261                                 reg = <0 0x100000>;
 262                                 interrupts = <112>;
 263                                 interrupt-names = "edma3_tcerrint";
 264                         };
 265                 };
 266
 267                 target-module@49900000 {
 268                         compatible = "ti,sysc-omap4", "ti,sysc";
 269                         reg = <0x49900000 0x4>,
 270                               <0x49900010 0x4>;
 271                         reg-names = "rev", "sysc";
 272                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 273                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 274                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 275                                         <SYSC_IDLE_SMART>;
 276                         clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>;
 277                         clock-names = "fck";
 278                         #address-cells = <1>;
 279                         #size-cells = <1>;
 280                         ranges = <0x0 0x49900000 0x100000>;
 281
 282                         edma_tptc1: dma@0 {
 283                                 compatible = "ti,edma3-tptc";
 284                                 reg = <0 0x100000>;
 285                                 interrupts = <113>;
 286                                 interrupt-names = "edma3_tcerrint";
 287                         };
 288                 };
 289
 290                 target-module@49a00000 {
 291                         compatible = "ti,sysc-omap4", "ti,sysc";
 292                         reg = <0x49a00000 0x4>,
 293                               <0x49a00010 0x4>;
 294                         reg-names = "rev", "sysc";
 295                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 296                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 297                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 298                                         <SYSC_IDLE_SMART>;
 299                         clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>;
 300                         clock-names = "fck";
 301                         #address-cells = <1>;
 302                         #size-cells = <1>;
 303                         ranges = <0x0 0x49a00000 0x100000>;
 304
 305                         edma_tptc2: dma@0 {
 306                                 compatible = "ti,edma3-tptc";
 307                                 reg = <0 0x100000>;
 308                                 interrupts = <114>;
 309                                 interrupt-names = "edma3_tcerrint";
 310                         };
 311                 };
 312
 313                 target-module@47810000 {
 314                         compatible = "ti,sysc-omap2", "ti,sysc";
 315                         reg = <0x478102fc 0x4>,
 316                               <0x47810110 0x4>,
 317                               <0x47810114 0x4>;
 318                         reg-names = "rev", "sysc", "syss";
 319                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 320                                          SYSC_OMAP2_ENAWAKEUP |
 321                                          SYSC_OMAP2_SOFTRESET |
 322                                          SYSC_OMAP2_AUTOIDLE)>;
 323                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 324                                         <SYSC_IDLE_NO>,
 325                                         <SYSC_IDLE_SMART>;
 326                         ti,syss-mask = <1>;
 327                         clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
 328                         clock-names = "fck";
 329                         #address-cells = <1>;
 330                         #size-cells = <1>;
 331                         ranges = <0x0 0x47810000 0x1000>;
 332
 333                         mmc3: mmc@0 {
 334                                 compatible = "ti,am335-sdhci";
 335                                 ti,needs-special-reset;
 336                                 interrupts = <29>;
 337                                 reg = <0x0 0x1000>;
 338                                 status = "disabled";
 339                         };
 340                 };
 341
 342                 usb: target-module@47400000 {
 343                         compatible = "ti,sysc-omap4", "ti,sysc";
 344                         reg = <0x47400000 0x4>,
 345                               <0x47400010 0x4>;
 346                         reg-names = "rev", "sysc";
 347                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
 348                                          SYSC_OMAP4_SOFTRESET)>;
 349                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 350                                         <SYSC_IDLE_NO>,
 351                                         <SYSC_IDLE_SMART>;
 352                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 353                                         <SYSC_IDLE_NO>,
 354                                         <SYSC_IDLE_SMART>,
 355                                         <SYSC_IDLE_SMART_WKUP>;
 356                         clocks = <&l3s_clkctrl AM3_L3S_USB_OTG_HS_CLKCTRL 0>;
 357                         clock-names = "fck";
 358                         #address-cells = <1>;
 359                         #size-cells = <1>;
 360                         ranges = <0x0 0x47400000 0x8000>;
 361
 362                         usb0_phy: usb-phy@1300 {
 363                                 compatible = "ti,am335x-usb-phy";
 364                                 reg = <0x1300 0x100>;
 365                                 reg-names = "phy";
 366                                 ti,ctrl_mod = <&usb_ctrl_mod>;
 367                                 #phy-cells = <0>;
 368                         };
 369
 370                         usb0: usb@1400 {
 371                                 compatible = "ti,musb-am33xx";
 372                                 reg = <0x1400 0x400>,
 373                                       <0x1000 0x200>;
 374                                 reg-names = "mc", "control";
 375
 376                                 interrupts = <18>;
 377                                 interrupt-names = "mc";
 378                                 dr_mode = "otg";
 379                                 mentor,multipoint = <1>;
 380                                 mentor,num-eps = <16>;
 381                                 mentor,ram-bits = <12>;
 382                                 mentor,power = <500>;
 383                                 phys = <&usb0_phy>;
 384
 385                                 dmas = <&cppi41dma  0 0 &cppi41dma  1 0
 386                                         &cppi41dma  2 0 &cppi41dma  3 0
 387                                         &cppi41dma  4 0 &cppi41dma  5 0
 388                                         &cppi41dma  6 0 &cppi41dma  7 0
 389                                         &cppi41dma  8 0 &cppi41dma  9 0
 390                                         &cppi41dma 10 0 &cppi41dma 11 0
 391                                         &cppi41dma 12 0 &cppi41dma 13 0
 392                                         &cppi41dma 14 0 &cppi41dma  0 1
 393                                         &cppi41dma  1 1 &cppi41dma  2 1
 394                                         &cppi41dma  3 1 &cppi41dma  4 1
 395                                         &cppi41dma  5 1 &cppi41dma  6 1
 396                                         &cppi41dma  7 1 &cppi41dma  8 1
 397                                         &cppi41dma  9 1 &cppi41dma 10 1
 398                                         &cppi41dma 11 1 &cppi41dma 12 1
 399                                         &cppi41dma 13 1 &cppi41dma 14 1>;
 400                                 dma-names =
 401                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
 402                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
 403                                         "rx14", "rx15",
 404                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
 405                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
 406                                         "tx14", "tx15";
 407                         };
 408
 409                         usb1_phy: usb-phy@1b00 {
 410                                 compatible = "ti,am335x-usb-phy";
 411                                 reg = <0x1b00 0x100>;
 412                                 reg-names = "phy";
 413                                 ti,ctrl_mod = <&usb_ctrl_mod>;
 414                                 #phy-cells = <0>;
 415                         };
 416
 417                         usb1: usb@1800 {
 418                                 compatible = "ti,musb-am33xx";
 419                                 reg = <0x1c00 0x400>,
 420                                       <0x1800 0x200>;
 421                                 reg-names = "mc", "control";
 422                                 interrupts = <19>;
 423                                 interrupt-names = "mc";
 424                                 dr_mode = "otg";
 425                                 mentor,multipoint = <1>;
 426                                 mentor,num-eps = <16>;
 427                                 mentor,ram-bits = <12>;
 428                                 mentor,power = <500>;
 429                                 phys = <&usb1_phy>;
 430
 431                                 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
 432                                         &cppi41dma 17 0 &cppi41dma 18 0
 433                                         &cppi41dma 19 0 &cppi41dma 20 0
 434                                         &cppi41dma 21 0 &cppi41dma 22 0
 435                                         &cppi41dma 23 0 &cppi41dma 24 0
 436                                         &cppi41dma 25 0 &cppi41dma 26 0
 437                                         &cppi41dma 27 0 &cppi41dma 28 0
 438                                         &cppi41dma 29 0 &cppi41dma 15 1
 439                                         &cppi41dma 16 1 &cppi41dma 17 1
 440                                         &cppi41dma 18 1 &cppi41dma 19 1
 441                                         &cppi41dma 20 1 &cppi41dma 21 1
 442                                         &cppi41dma 22 1 &cppi41dma 23 1
 443                                         &cppi41dma 24 1 &cppi41dma 25 1
 444                                         &cppi41dma 26 1 &cppi41dma 27 1
 445                                         &cppi41dma 28 1 &cppi41dma 29 1>;
 446                                 dma-names =
 447                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
 448                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
 449                                         "rx14", "rx15",
 450                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
 451                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
 452                                         "tx14", "tx15";
 453                         };
 454
 455                         cppi41dma: dma-controller@2000 {
 456                                 compatible = "ti,am3359-cppi41";
 457                                 reg =  <0x0000 0x1000>,
 458                                        <0x2000 0x1000>,
 459                                        <0x3000 0x1000>,
 460                                        <0x4000 0x4000>;
 461                                 reg-names = "glue", "controller", "scheduler", "queuemgr";
 462                                 interrupts = <17>;
 463                                 interrupt-names = "glue";
 464                                 #dma-cells = <2>;
 465                                 #dma-channels = <30>;
 466                                 #dma-requests = <256>;
 467                         };
 468                 };
 469
 470                 target-module@40300000 {
 471                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 472                         clocks = <&l3_clkctrl AM3_L3_OCMCRAM_CLKCTRL 0>;
 473                         clock-names = "fck";
 474                         ti,no-idle;
 475                         #address-cells = <1>;
 476                         #size-cells = <1>;
 477                         ranges = <0 0x40300000 0x10000>;
 478
 479                         ocmcram: sram@0 {
 480                                 compatible = "mmio-sram";
 481                                 reg = <0 0x10000>; /* 64k */
 482                                 ranges = <0 0 0x10000>;
 483                                 #address-cells = <1>;
 484                                 #size-cells = <1>;
 485
 486                                 pm_sram_code: pm-code-sram@0 {
 487                                         compatible = "ti,sram";
 488                                         reg = <0x0 0x1000>;
 489                                         protect-exec;
 490                                 };
 491
 492                                 pm_sram_data: pm-data-sram@1000 {
 493                                         compatible = "ti,sram";
 494                                         reg = <0x1000 0x1000>;
 495                                         pool;
 496                                 };
 497                         };
 498                 };
 499
 500                 target-module@4c000000 {
 501                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 502                         reg = <0x4c000000 0x4>;
 503                         reg-names = "rev";
 504                         clocks = <&l3_clkctrl AM3_L3_EMIF_CLKCTRL 0>;
 505                         clock-names = "fck";
 506                         ti,no-idle;
 507                         #address-cells = <1>;
 508                         #size-cells = <1>;
 509                         ranges = <0x0 0x4c000000 0x1000000>;
 510
 511                         emif: emif@0 {
 512                                 compatible = "ti,emif-am3352";
 513                                 reg = <0 0x1000000>;
 514                                 interrupts = <101>;
 515                                 sram = <&pm_sram_code
 516                                         &pm_sram_data>;
 517                         };
 518                 };
 519
 520                 target-module@50000000 {
 521                         compatible = "ti,sysc-omap2", "ti,sysc";
 522                         reg = <0x50000000 4>,
 523                               <0x50000010 4>,
 524                               <0x50000014 4>;
 525                         reg-names = "rev", "sysc", "syss";
 526                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 527                                         <SYSC_IDLE_NO>,
 528                                         <SYSC_IDLE_SMART>;
 529                         ti,syss-mask = <1>;
 530                         clocks = <&l3s_clkctrl AM3_L3S_GPMC_CLKCTRL 0>;
 531                         clock-names = "fck";
 532                         #address-cells = <1>;
 533                         #size-cells = <1>;
 534                         ranges = <0x50000000 0x50000000 0x00001000>, /* regs */
 535                                  <0x00000000 0x00000000 0x40000000>; /* data */
 536
 537                         gpmc: gpmc@50000000 {
 538                                 compatible = "ti,am3352-gpmc";
 539                                 reg = <0x50000000 0x2000>;
 540                                 interrupts = <100>;
 541                                 dmas = <&edma 52 0>;
 542                                 dma-names = "rxtx";
 543                                 gpmc,num-cs = <7>;
 544                                 gpmc,num-waitpins = <2>;
 545                                 #address-cells = <2>;
 546                                 #size-cells = <1>;
 547                                 interrupt-controller;
 548                                 #interrupt-cells = <2>;
 549                                 gpio-controller;
 550                                 #gpio-cells = <2>;
 551                                 status = "disabled";
 552                         };
 553                 };
 554
 555                 sham_target: target-module@53100000 {
 556                         compatible = "ti,sysc-omap3-sham", "ti,sysc";
 557                         reg = <0x53100100 0x4>,
 558                               <0x53100110 0x4>,
 559                               <0x53100114 0x4>;
 560                         reg-names = "rev", "sysc", "syss";
 561                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 562                                          SYSC_OMAP2_AUTOIDLE)>;
 563                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 564                                         <SYSC_IDLE_NO>,
 565                                         <SYSC_IDLE_SMART>;
 566                         ti,syss-mask = <1>;
 567                         /* Domains (P, C): per_pwrdm, l3_clkdm */
 568                         clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
 569                         clock-names = "fck";
 570                         #address-cells = <1>;
 571                         #size-cells = <1>;
 572                         ranges = <0x0 0x53100000 0x1000>;
 573
 574                         sham: sham@0 {
 575                                 compatible = "ti,omap4-sham";
 576                                 reg = <0 0x200>;
 577                                 interrupts = <109>;
 578                                 dmas = <&edma 36 0>;
 579                                 dma-names = "rx";
 580                         };
 581                 };
 582
 583                 aes_target: target-module@53500000 {
 584                         compatible = "ti,sysc-omap2", "ti,sysc";
 585                         reg = <0x53500080 0x4>,
 586                               <0x53500084 0x4>,
 587                               <0x53500088 0x4>;
 588                         reg-names = "rev", "sysc", "syss";
 589                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 590                                          SYSC_OMAP2_AUTOIDLE)>;
 591                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 592                                         <SYSC_IDLE_NO>,
 593                                         <SYSC_IDLE_SMART>,
 594                                         <SYSC_IDLE_SMART_WKUP>;
 595                         ti,syss-mask = <1>;
 596                         /* Domains (P, C): per_pwrdm, l3_clkdm */
 597                         clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
 598                         clock-names = "fck";
 599                         #address-cells = <1>;
 600                         #size-cells = <1>;
 601                         ranges = <0x0 0x53500000 0x1000>;
 602
 603                         aes: aes@0 {
 604                                 compatible = "ti,omap4-aes";
 605                                 reg = <0 0xa0>;
 606                                 interrupts = <103>;
 607                                 dmas = <&edma 6 0>,
 608                                        <&edma 5 0>;
 609                                 dma-names = "tx", "rx";
 610                         };
 611                 };
 612
 613                 target-module@56000000 {
 614                         compatible = "ti,sysc-omap4", "ti,sysc";
 615                         reg = <0x5600fe00 0x4>,
 616                               <0x5600fe10 0x4>;
 617                         reg-names = "rev", "sysc";
 618                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 619                                         <SYSC_IDLE_NO>,
 620                                         <SYSC_IDLE_SMART>;
 621                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 622                                         <SYSC_IDLE_NO>,
 623                                         <SYSC_IDLE_SMART>;
 624                         clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
 625                         clock-names = "fck";
 626                         power-domains = <&prm_gfx>;
 627                         resets = <&prm_gfx 0>;
 628                         reset-names = "rstctrl";
 629                         #address-cells = <1>;
 630                         #size-cells = <1>;
 631                         ranges = <0 0x56000000 0x1000000>;
 632
 633                         /*
 634                          * Closed source PowerVR driver, no child device
 635                          * binding or driver in mainline
 636                          */
 637                 };
 638         };
 639 };
 640
 641 #include "am33xx-l4.dtsi"
 642 #include "am33xx-clocks.dtsi"
 643
 644 &prcm {
 645         prm_per: prm@c00 {
 646                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 647                 reg = <0xc00 0x100>;
 648                 #reset-cells = <1>;
 649                 #power-domain-cells = <0>;
 650         };
 651
 652         prm_wkup: prm@d00 {
 653                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 654                 reg = <0xd00 0x100>;
 655                 #reset-cells = <1>;
 656                 #power-domain-cells = <0>;
 657         };
 658
 659         prm_mpu: prm@e00 {
 660                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 661                 reg = <0xe00 0x100>;
 662                 #power-domain-cells = <0>;
 663         };
 664
 665         prm_device: prm@f00 {
 666                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 667                 reg = <0xf00 0x100>;
 668                 #reset-cells = <1>;
 669         };
 670
 671         prm_rtc: prm@1000 {
 672                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 673                 reg = <0x1000 0x100>;
 674                 #power-domain-cells = <0>;
 675         };
 676
 677         prm_gfx: prm@1100 {
 678                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 679                 reg = <0x1100 0x100>;
 680                 #power-domain-cells = <0>;
 681                 #reset-cells = <1>;
 682         };
 683
 684         prm_cefuse: prm@1200 {
 685                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 686                 reg = <0x1200 0x100>;
 687                 #power-domain-cells = <0>;
 688         };
 689 };
 690
 691 /* Preferred always-on timer for clocksource */
 692 &timer1_target {
 693         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>,
 694                  <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
 695         clock-names = "fck", "ick";
 696         ti,no-reset-on-init;
 697         ti,no-idle;
 698         timer@0 {
 699                 assigned-clocks = <&timer1_fck>;
 700                 assigned-clock-parents = <&sys_clkin_ck>;
 701         };
 702 };
 703
 704 /* Preferred timer for clockevent */
 705 &timer2_target {
 706         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>,
 707                  <&l4ls_clkctrl AM3_L4LS_L4_LS_CLKCTRL 0>;
 708         clock-names = "fck", "ick";
 709         ti,no-reset-on-init;
 710         ti,no-idle;
 711         timer@0 {
 712                 assigned-clocks = <&timer2_fck>;
 713                 assigned-clock-parents = <&sys_clkin_ck>;
 714         };
 715 };