arch/arm/boot/dts/am33xx.dtsi

   1 /*
   2  * Device Tree Source for AM33XX SoC
   3  *
   4  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/bus/ti-sysc.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/pinctrl/am33xx.h>
  14 #include <dt-bindings/clock/am3.h>
  15
  16 / {
  17         compatible = "ti,am33xx";
  18         interrupt-parent = <&intc>;
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         chosen { };
  22
  23         aliases {
  24                 i2c0 = &i2c0;
  25                 i2c1 = &i2c1;
  26                 i2c2 = &i2c2;
  27                 serial0 = &uart0;
  28                 serial1 = &uart1;
  29                 serial2 = &uart2;
  30                 serial3 = &uart3;
  31                 serial4 = &uart4;
  32                 serial5 = &uart5;
  33                 d-can0 = &dcan0;
  34                 d-can1 = &dcan1;
  35                 usb0 = &usb0;
  36                 usb1 = &usb1;
  37                 phy0 = &usb0_phy;
  38                 phy1 = &usb1_phy;
  39                 ethernet0 = &cpsw_emac0;
  40                 ethernet1 = &cpsw_emac1;
  41                 spi0 = &spi0;
  42                 spi1 = &spi1;
  43         };
  44
  45         cpus {
  46                 #address-cells = <1>;
  47                 #size-cells = <0>;
  48                 cpu@0 {
  49                         compatible = "arm,cortex-a8";
  50                         enable-method = "ti,am3352";
  51                         device_type = "cpu";
  52                         reg = <0>;
  53
  54                         operating-points-v2 = <&cpu0_opp_table>;
  55
  56                         clocks = <&dpll_mpu_ck>;
  57                         clock-names = "cpu";
  58
  59                         clock-latency = <300000>; /* From omap-cpufreq driver */
  60                         cpu-idle-states = <&mpu_gate>;
  61                 };
  62
  63                 idle-states {
  64                         mpu_gate: mpu_gate {
  65                                 compatible = "arm,idle-state";
  66                                 entry-latency-us = <40>;
  67                                 exit-latency-us = <90>;
  68                                 min-residency-us = <300>;
  69                                 ti,idle-wkup-m3;
  70                         };
  71                 };
  72         };
  73
  74         cpu0_opp_table: opp-table {
  75                 compatible = "operating-points-v2-ti-cpu";
  76                 syscon = <&scm_conf>;
  77
  78                 /*
  79                  * The three following nodes are marked with opp-suspend
  80                  * because the can not be enabled simultaneously on a
  81                  * single SoC.
  82                  */
  83                 opp50-300000000 {
  84                         opp-hz = /bits/ 64 <300000000>;
  85                         opp-microvolt = <950000 931000 969000>;
  86                         opp-supported-hw = <0x06 0x0010>;
  87                         opp-suspend;
  88                 };
  89
  90                 opp100-275000000 {
  91                         opp-hz = /bits/ 64 <275000000>;
  92                         opp-microvolt = <1100000 1078000 1122000>;
  93                         opp-supported-hw = <0x01 0x00FF>;
  94                         opp-suspend;
  95                 };
  96
  97                 opp100-300000000 {
  98                         opp-hz = /bits/ 64 <300000000>;
  99                         opp-microvolt = <1100000 1078000 1122000>;
 100                         opp-supported-hw = <0x06 0x0020>;
 101                         opp-suspend;
 102                 };
 103
 104                 opp100-500000000 {
 105                         opp-hz = /bits/ 64 <500000000>;
 106                         opp-microvolt = <1100000 1078000 1122000>;
 107                         opp-supported-hw = <0x01 0xFFFF>;
 108                 };
 109
 110                 opp100-600000000 {
 111                         opp-hz = /bits/ 64 <600000000>;
 112                         opp-microvolt = <1100000 1078000 1122000>;
 113                         opp-supported-hw = <0x06 0x0040>;
 114                 };
 115
 116                 opp120-600000000 {
 117                         opp-hz = /bits/ 64 <600000000>;
 118                         opp-microvolt = <1200000 1176000 1224000>;
 119                         opp-supported-hw = <0x01 0xFFFF>;
 120                 };
 121
 122                 opp120-720000000 {
 123                         opp-hz = /bits/ 64 <720000000>;
 124                         opp-microvolt = <1200000 1176000 1224000>;
 125                         opp-supported-hw = <0x06 0x0080>;
 126                 };
 127
 128                 oppturbo-720000000 {
 129                         opp-hz = /bits/ 64 <720000000>;
 130                         opp-microvolt = <1260000 1234800 1285200>;
 131                         opp-supported-hw = <0x01 0xFFFF>;
 132                 };
 133
 134                 oppturbo-800000000 {
 135                         opp-hz = /bits/ 64 <800000000>;
 136                         opp-microvolt = <1260000 1234800 1285200>;
 137                         opp-supported-hw = <0x06 0x0100>;
 138                 };
 139
 140                 oppnitro-1000000000 {
 141                         opp-hz = /bits/ 64 <1000000000>;
 142                         opp-microvolt = <1325000 1298500 1351500>;
 143                         opp-supported-hw = <0x04 0x0200>;
 144                 };
 145         };
 146
 147         target-module@4b000000 {
 148                 compatible = "ti,sysc-omap4-simple", "ti,sysc";
 149                 clocks = <&l3_aon_clkctrl AM3_L3_AON_DEBUGSS_CLKCTRL 0>;
 150                 clock-names = "fck";
 151                 #address-cells = <1>;
 152                 #size-cells = <1>;
 153                 ranges = <0x0 0x4b000000 0x1000000>;
 154
 155                 pmu@0 {
 156                         compatible = "arm,cortex-a8-pmu";
 157                         interrupts = <3>;
 158                         reg = <0 0x1000000>;
 159                         ti,hwmods = "debugss";
 160                 };
 161         };
 162
 163         /*
 164          * The soc node represents the soc top level view. It is used for IPs
 165          * that are not memory mapped in the MPU view or for the MPU itself.
 166          */
 167         soc {
 168                 compatible = "ti,omap-infra";
 169                 mpu {
 170                         compatible = "ti,omap3-mpu";
 171                         ti,hwmods = "mpu";
 172                         pm-sram = <&pm_sram_code
 173                                    &pm_sram_data>;
 174                 };
 175         };
 176
 177         /*
 178          * XXX: Use a flat representation of the AM33XX interconnect.
 179          * The real AM33XX interconnect network is quite complex. Since
 180          * it will not bring real advantage to represent that in DT
 181          * for the moment, just use a fake OCP bus entry to represent
 182          * the whole bus hierarchy.
 183          */
 184         ocp: ocp {
 185                 compatible = "simple-bus";
 186                 #address-cells = <1>;
 187                 #size-cells = <1>;
 188                 ranges;
 189                 ti,hwmods = "l3_main";
 190
 191                 l4_wkup: interconnect@44c00000 {
 192                 };
 193                 l4_per: interconnect@48000000 {
 194                 };
 195                 l4_fw: interconnect@47c00000 {
 196                 };
 197                 l4_fast: interconnect@4a000000 {
 198                 };
 199                 l4_mpuss: interconnect@4b140000 {
 200                 };
 201
 202                 intc: interrupt-controller@48200000 {
 203                         compatible = "ti,am33xx-intc";
 204                         interrupt-controller;
 205                         #interrupt-cells = <1>;
 206                         reg = <0x48200000 0x1000>;
 207                 };
 208
 209                 target-module@49000000 {
 210                         compatible = "ti,sysc-omap4", "ti,sysc";
 211                         reg = <0x49000000 0x4>;
 212                         reg-names = "rev";
 213                         clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>;
 214                         clock-names = "fck";
 215                         #address-cells = <1>;
 216                         #size-cells = <1>;
 217                         ranges = <0x0 0x49000000 0x10000>;
 218
 219                         edma: dma@0 {
 220                                 compatible = "ti,edma3-tpcc";
 221                                 reg = <0 0x10000>;
 222                                 reg-names = "edma3_cc";
 223                                 interrupts = <12 13 14>;
 224                                 interrupt-names = "edma3_ccint", "edma3_mperr",
 225                                                   "edma3_ccerrint";
 226                                 dma-requests = <64>;
 227                                 #dma-cells = <2>;
 228
 229                                 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
 230                                            <&edma_tptc2 0>;
 231
 232                                 ti,edma-memcpy-channels = <20 21>;
 233                         };
 234                 };
 235
 236                 target-module@49800000 {
 237                         compatible = "ti,sysc-omap4", "ti,sysc";
 238                         reg = <0x49800000 0x4>,
 239                               <0x49800010 0x4>;
 240                         reg-names = "rev", "sysc";
 241                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 242                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 243                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 244                                         <SYSC_IDLE_SMART>;
 245                         clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>;
 246                         clock-names = "fck";
 247                         #address-cells = <1>;
 248                         #size-cells = <1>;
 249                         ranges = <0x0 0x49800000 0x100000>;
 250
 251                         edma_tptc0: dma@0 {
 252                                 compatible = "ti,edma3-tptc";
 253                                 reg = <0 0x100000>;
 254                                 interrupts = <112>;
 255                                 interrupt-names = "edma3_tcerrint";
 256                         };
 257                 };
 258
 259                 target-module@49900000 {
 260                         compatible = "ti,sysc-omap4", "ti,sysc";
 261                         reg = <0x49900000 0x4>,
 262                               <0x49900010 0x4>;
 263                         reg-names = "rev", "sysc";
 264                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 265                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 266                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 267                                         <SYSC_IDLE_SMART>;
 268                         clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>;
 269                         clock-names = "fck";
 270                         #address-cells = <1>;
 271                         #size-cells = <1>;
 272                         ranges = <0x0 0x49900000 0x100000>;
 273
 274                         edma_tptc1: dma@0 {
 275                                 compatible = "ti,edma3-tptc";
 276                                 reg = <0 0x100000>;
 277                                 interrupts = <113>;
 278                                 interrupt-names = "edma3_tcerrint";
 279                         };
 280                 };
 281
 282                 target-module@49a00000 {
 283                         compatible = "ti,sysc-omap4", "ti,sysc";
 284                         reg = <0x49a00000 0x4>,
 285                               <0x49a00010 0x4>;
 286                         reg-names = "rev", "sysc";
 287                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 288                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
 289                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 290                                         <SYSC_IDLE_SMART>;
 291                         clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>;
 292                         clock-names = "fck";
 293                         #address-cells = <1>;
 294                         #size-cells = <1>;
 295                         ranges = <0x0 0x49a00000 0x100000>;
 296
 297                         edma_tptc2: dma@0 {
 298                                 compatible = "ti,edma3-tptc";
 299                                 reg = <0 0x100000>;
 300                                 interrupts = <114>;
 301                                 interrupt-names = "edma3_tcerrint";
 302                         };
 303                 };
 304
 305                 target-module@47810000 {
 306                         compatible = "ti,sysc-omap2", "ti,sysc";
 307                         reg = <0x478102fc 0x4>,
 308                               <0x47810110 0x4>,
 309                               <0x47810114 0x4>;
 310                         reg-names = "rev", "sysc", "syss";
 311                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 312                                          SYSC_OMAP2_ENAWAKEUP |
 313                                          SYSC_OMAP2_SOFTRESET |
 314                                          SYSC_OMAP2_AUTOIDLE)>;
 315                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 316                                         <SYSC_IDLE_NO>,
 317                                         <SYSC_IDLE_SMART>;
 318                         ti,syss-mask = <1>;
 319                         clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
 320                         clock-names = "fck";
 321                         #address-cells = <1>;
 322                         #size-cells = <1>;
 323                         ranges = <0x0 0x47810000 0x1000>;
 324
 325                         mmc3: mmc@0 {
 326                                 compatible = "ti,am335-sdhci";
 327                                 ti,needs-special-reset;
 328                                 interrupts = <29>;
 329                                 reg = <0x0 0x1000>;
 330                                 status = "disabled";
 331                         };
 332                 };
 333
 334                 usb: target-module@47400000 {
 335                         compatible = "ti,sysc-omap4", "ti,sysc";
 336                         reg = <0x47400000 0x4>,
 337                               <0x47400010 0x4>;
 338                         reg-names = "rev", "sysc";
 339                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
 340                                          SYSC_OMAP4_SOFTRESET)>;
 341                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 342                                         <SYSC_IDLE_NO>,
 343                                         <SYSC_IDLE_SMART>;
 344                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 345                                         <SYSC_IDLE_NO>,
 346                                         <SYSC_IDLE_SMART>,
 347                                         <SYSC_IDLE_SMART_WKUP>;
 348                         clocks = <&l3s_clkctrl AM3_L3S_USB_OTG_HS_CLKCTRL 0>;
 349                         clock-names = "fck";
 350                         #address-cells = <1>;
 351                         #size-cells = <1>;
 352                         ranges = <0x0 0x47400000 0x8000>;
 353
 354                         usb0_phy: usb-phy@1300 {
 355                                 compatible = "ti,am335x-usb-phy";
 356                                 reg = <0x1300 0x100>;
 357                                 reg-names = "phy";
 358                                 ti,ctrl_mod = <&usb_ctrl_mod>;
 359                                 #phy-cells = <0>;
 360                         };
 361
 362                         usb0: usb@1400 {
 363                                 compatible = "ti,musb-am33xx";
 364                                 reg = <0x1400 0x400>,
 365                                       <0x1000 0x200>;
 366                                 reg-names = "mc", "control";
 367
 368                                 interrupts = <18>;
 369                                 interrupt-names = "mc";
 370                                 dr_mode = "otg";
 371                                 mentor,multipoint = <1>;
 372                                 mentor,num-eps = <16>;
 373                                 mentor,ram-bits = <12>;
 374                                 mentor,power = <500>;
 375                                 phys = <&usb0_phy>;
 376
 377                                 dmas = <&cppi41dma  0 0 &cppi41dma  1 0
 378                                         &cppi41dma  2 0 &cppi41dma  3 0
 379                                         &cppi41dma  4 0 &cppi41dma  5 0
 380                                         &cppi41dma  6 0 &cppi41dma  7 0
 381                                         &cppi41dma  8 0 &cppi41dma  9 0
 382                                         &cppi41dma 10 0 &cppi41dma 11 0
 383                                         &cppi41dma 12 0 &cppi41dma 13 0
 384                                         &cppi41dma 14 0 &cppi41dma  0 1
 385                                         &cppi41dma  1 1 &cppi41dma  2 1
 386                                         &cppi41dma  3 1 &cppi41dma  4 1
 387                                         &cppi41dma  5 1 &cppi41dma  6 1
 388                                         &cppi41dma  7 1 &cppi41dma  8 1
 389                                         &cppi41dma  9 1 &cppi41dma 10 1
 390                                         &cppi41dma 11 1 &cppi41dma 12 1
 391                                         &cppi41dma 13 1 &cppi41dma 14 1>;
 392                                 dma-names =
 393                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
 394                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
 395                                         "rx14", "rx15",
 396                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
 397                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
 398                                         "tx14", "tx15";
 399                         };
 400
 401                         usb1_phy: usb-phy@1b00 {
 402                                 compatible = "ti,am335x-usb-phy";
 403                                 reg = <0x1b00 0x100>;
 404                                 reg-names = "phy";
 405                                 ti,ctrl_mod = <&usb_ctrl_mod>;
 406                                 #phy-cells = <0>;
 407                         };
 408
 409                         usb1: usb@1800 {
 410                                 compatible = "ti,musb-am33xx";
 411                                 reg = <0x1c00 0x400>,
 412                                       <0x1800 0x200>;
 413                                 reg-names = "mc", "control";
 414                                 interrupts = <19>;
 415                                 interrupt-names = "mc";
 416                                 dr_mode = "otg";
 417                                 mentor,multipoint = <1>;
 418                                 mentor,num-eps = <16>;
 419                                 mentor,ram-bits = <12>;
 420                                 mentor,power = <500>;
 421                                 phys = <&usb1_phy>;
 422
 423                                 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
 424                                         &cppi41dma 17 0 &cppi41dma 18 0
 425                                         &cppi41dma 19 0 &cppi41dma 20 0
 426                                         &cppi41dma 21 0 &cppi41dma 22 0
 427                                         &cppi41dma 23 0 &cppi41dma 24 0
 428                                         &cppi41dma 25 0 &cppi41dma 26 0
 429                                         &cppi41dma 27 0 &cppi41dma 28 0
 430                                         &cppi41dma 29 0 &cppi41dma 15 1
 431                                         &cppi41dma 16 1 &cppi41dma 17 1
 432                                         &cppi41dma 18 1 &cppi41dma 19 1
 433                                         &cppi41dma 20 1 &cppi41dma 21 1
 434                                         &cppi41dma 22 1 &cppi41dma 23 1
 435                                         &cppi41dma 24 1 &cppi41dma 25 1
 436                                         &cppi41dma 26 1 &cppi41dma 27 1
 437                                         &cppi41dma 28 1 &cppi41dma 29 1>;
 438                                 dma-names =
 439                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
 440                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
 441                                         "rx14", "rx15",
 442                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
 443                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
 444                                         "tx14", "tx15";
 445                         };
 446
 447                         cppi41dma: dma-controller@2000 {
 448                                 compatible = "ti,am3359-cppi41";
 449                                 reg =  <0x0000 0x1000>,
 450                                        <0x2000 0x1000>,
 451                                        <0x3000 0x1000>,
 452                                        <0x4000 0x4000>;
 453                                 reg-names = "glue", "controller", "scheduler", "queuemgr";
 454                                 interrupts = <17>;
 455                                 interrupt-names = "glue";
 456                                 #dma-cells = <2>;
 457                                 #dma-channels = <30>;
 458                                 #dma-requests = <256>;
 459                         };
 460                 };
 461
 462                 target-module@40300000 {
 463                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 464                         clocks = <&l3_clkctrl AM3_L3_OCMCRAM_CLKCTRL 0>;
 465                         clock-names = "fck";
 466                         ti,no-idle;
 467                         #address-cells = <1>;
 468                         #size-cells = <1>;
 469                         ranges = <0 0x40300000 0x10000>;
 470
 471                         ocmcram: sram@0 {
 472                                 compatible = "mmio-sram";
 473                                 reg = <0 0x10000>; /* 64k */
 474                                 ranges = <0 0 0x10000>;
 475                                 #address-cells = <1>;
 476                                 #size-cells = <1>;
 477
 478                                 pm_sram_code: pm-code-sram@0 {
 479                                         compatible = "ti,sram";
 480                                         reg = <0x0 0x1000>;
 481                                         protect-exec;
 482                                 };
 483
 484                                 pm_sram_data: pm-data-sram@1000 {
 485                                         compatible = "ti,sram";
 486                                         reg = <0x1000 0x1000>;
 487                                         pool;
 488                                 };
 489                         };
 490                 };
 491
 492                 target-module@4c000000 {
 493                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 494                         reg = <0x4c000000 0x4>;
 495                         reg-names = "rev";
 496                         clocks = <&l3_clkctrl AM3_L3_EMIF_CLKCTRL 0>;
 497                         clock-names = "fck";
 498                         ti,no-idle;
 499                         #address-cells = <1>;
 500                         #size-cells = <1>;
 501                         ranges = <0x0 0x4c000000 0x1000000>;
 502
 503                         emif: emif@0 {
 504                                 compatible = "ti,emif-am3352";
 505                                 reg = <0 0x1000000>;
 506                                 interrupts = <101>;
 507                                 sram = <&pm_sram_code
 508                                         &pm_sram_data>;
 509                         };
 510                 };
 511
 512                 target-module@50000000 {
 513                         compatible = "ti,sysc-omap2", "ti,sysc";
 514                         reg = <0x50000000 4>,
 515                               <0x50000010 4>,
 516                               <0x50000014 4>;
 517                         reg-names = "rev", "sysc", "syss";
 518                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 519                                         <SYSC_IDLE_NO>,
 520                                         <SYSC_IDLE_SMART>;
 521                         ti,syss-mask = <1>;
 522                         clocks = <&l3s_clkctrl AM3_L3S_GPMC_CLKCTRL 0>;
 523                         clock-names = "fck";
 524                         #address-cells = <1>;
 525                         #size-cells = <1>;
 526                         ranges = <0x50000000 0x50000000 0x00001000>, /* regs */
 527                                  <0x00000000 0x00000000 0x40000000>; /* data */
 528
 529                         gpmc: gpmc@50000000 {
 530                                 compatible = "ti,am3352-gpmc";
 531                                 reg = <0x50000000 0x2000>;
 532                                 interrupts = <100>;
 533                                 dmas = <&edma 52 0>;
 534                                 dma-names = "rxtx";
 535                                 gpmc,num-cs = <7>;
 536                                 gpmc,num-waitpins = <2>;
 537                                 #address-cells = <2>;
 538                                 #size-cells = <1>;
 539                                 interrupt-controller;
 540                                 #interrupt-cells = <2>;
 541                                 gpio-controller;
 542                                 #gpio-cells = <2>;
 543                                 status = "disabled";
 544                         };
 545                 };
 546
 547                 sham_target: target-module@53100000 {
 548                         compatible = "ti,sysc-omap3-sham", "ti,sysc";
 549                         reg = <0x53100100 0x4>,
 550                               <0x53100110 0x4>,
 551                               <0x53100114 0x4>;
 552                         reg-names = "rev", "sysc", "syss";
 553                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 554                                          SYSC_OMAP2_AUTOIDLE)>;
 555                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 556                                         <SYSC_IDLE_NO>,
 557                                         <SYSC_IDLE_SMART>;
 558                         ti,syss-mask = <1>;
 559                         /* Domains (P, C): per_pwrdm, l3_clkdm */
 560                         clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
 561                         clock-names = "fck";
 562                         #address-cells = <1>;
 563                         #size-cells = <1>;
 564                         ranges = <0x0 0x53100000 0x1000>;
 565
 566                         sham: sham@0 {
 567                                 compatible = "ti,omap4-sham";
 568                                 reg = <0 0x200>;
 569                                 interrupts = <109>;
 570                                 dmas = <&edma 36 0>;
 571                                 dma-names = "rx";
 572                         };
 573                 };
 574
 575                 aes_target: target-module@53500000 {
 576                         compatible = "ti,sysc-omap2", "ti,sysc";
 577                         reg = <0x53500080 0x4>,
 578                               <0x53500084 0x4>,
 579                               <0x53500088 0x4>;
 580                         reg-names = "rev", "sysc", "syss";
 581                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 582                                          SYSC_OMAP2_AUTOIDLE)>;
 583                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 584                                         <SYSC_IDLE_NO>,
 585                                         <SYSC_IDLE_SMART>,
 586                                         <SYSC_IDLE_SMART_WKUP>;
 587                         ti,syss-mask = <1>;
 588                         /* Domains (P, C): per_pwrdm, l3_clkdm */
 589                         clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
 590                         clock-names = "fck";
 591                         #address-cells = <1>;
 592                         #size-cells = <1>;
 593                         ranges = <0x0 0x53500000 0x1000>;
 594
 595                         aes: aes@0 {
 596                                 compatible = "ti,omap4-aes";
 597                                 reg = <0 0xa0>;
 598                                 interrupts = <103>;
 599                                 dmas = <&edma 6 0>,
 600                                        <&edma 5 0>;
 601                                 dma-names = "tx", "rx";
 602                         };
 603                 };
 604
 605                 target-module@56000000 {
 606                         compatible = "ti,sysc-omap4", "ti,sysc";
 607                         reg = <0x5600fe00 0x4>,
 608                               <0x5600fe10 0x4>;
 609                         reg-names = "rev", "sysc";
 610                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 611                                         <SYSC_IDLE_NO>,
 612                                         <SYSC_IDLE_SMART>;
 613                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 614                                         <SYSC_IDLE_NO>,
 615                                         <SYSC_IDLE_SMART>;
 616                         clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
 617                         clock-names = "fck";
 618                         power-domains = <&prm_gfx>;
 619                         resets = <&prm_gfx 0>;
 620                         reset-names = "rstctrl";
 621                         #address-cells = <1>;
 622                         #size-cells = <1>;
 623                         ranges = <0 0x56000000 0x1000000>;
 624
 625                         /*
 626                          * Closed source PowerVR driver, no child device
 627                          * binding or driver in mainline
 628                          */
 629                 };
 630         };
 631 };
 632
 633 #include "am33xx-l4.dtsi"
 634 #include "am33xx-clocks.dtsi"
 635
 636 &prcm {
 637         prm_per: prm@c00 {
 638                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 639                 reg = <0xc00 0x100>;
 640                 #reset-cells = <1>;
 641                 #power-domain-cells = <0>;
 642         };
 643
 644         prm_wkup: prm@d00 {
 645                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 646                 reg = <0xd00 0x100>;
 647                 #reset-cells = <1>;
 648                 #power-domain-cells = <0>;
 649         };
 650
 651         prm_mpu: prm@e00 {
 652                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 653                 reg = <0xe00 0x100>;
 654                 #power-domain-cells = <0>;
 655         };
 656
 657         prm_device: prm@f00 {
 658                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 659                 reg = <0xf00 0x100>;
 660                 #reset-cells = <1>;
 661         };
 662
 663         prm_rtc: prm@1000 {
 664                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 665                 reg = <0x1000 0x100>;
 666                 #power-domain-cells = <0>;
 667         };
 668
 669         prm_gfx: prm@1100 {
 670                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 671                 reg = <0x1100 0x100>;
 672                 #power-domain-cells = <0>;
 673                 #reset-cells = <1>;
 674         };
 675
 676         prm_cefuse: prm@1200 {
 677                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
 678                 reg = <0x1200 0x100>;
 679                 #power-domain-cells = <0>;
 680         };
 681 };
 682
 683 /* Preferred always-on timer for clocksource */
 684 &timer1_target {
 685         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>,
 686                  <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
 687         clock-names = "fck", "ick";
 688         ti,no-reset-on-init;
 689         ti,no-idle;
 690         timer@0 {
 691                 assigned-clocks = <&timer1_fck>;
 692                 assigned-clock-parents = <&sys_clkin_ck>;
 693         };
 694 };
 695
 696 /* Preferred timer for clockevent */
 697 &timer2_target {
 698         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>,
 699                  <&l4ls_clkctrl AM3_L4LS_L4_LS_CLKCTRL 0>;
 700         clock-names = "fck", "ick";
 701         ti,no-reset-on-init;
 702         ti,no-idle;
 703         timer@0 {
 704                 assigned-clocks = <&timer2_fck>;
 705                 assigned-clock-parents = <&sys_clkin_ck>;
 706         };
 707 };