arch/arc/kernel/setup.c

   1 /*
   2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/seq_file.h>
  10 #include <linux/fs.h>
  11 #include <linux/delay.h>
  12 #include <linux/root_dev.h>
  13 #include <linux/clk.h>
  14 #include <linux/clk-provider.h>
  15 #include <linux/clocksource.h>
  16 #include <linux/console.h>
  17 #include <linux/module.h>
  18 #include <linux/cpu.h>
  19 #include <linux/of_fdt.h>
  20 #include <linux/of.h>
  21 #include <linux/cache.h>
  22 #include <uapi/linux/mount.h>
  23 #include <asm/sections.h>
  24 #include <asm/arcregs.h>
  25 #include <asm/tlb.h>
  26 #include <asm/setup.h>
  27 #include <asm/page.h>
  28 #include <asm/irq.h>
  29 #include <asm/unwind.h>
  30 #include <asm/mach_desc.h>
  31 #include <asm/smp.h>
  32
  33 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
  34
  35 unsigned int intr_to_DE_cnt;
  36
  37 /* Part of U-boot ABI: see head.S */
  38 int __initdata uboot_tag;
  39 char __initdata *uboot_arg;
  40
  41 const struct machine_desc *machine_desc;
  42
  43 struct task_struct *_current_task[NR_CPUS];     /* For stack switching */
  44
  45 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  46
  47 static const struct id_to_str arc_cpu_rel[] = {
  48 #ifdef CONFIG_ISA_ARCOMPACT
  49         { 0x34, "R4.10"},
  50         { 0x35, "R4.11"},
  51 #else
  52         { 0x51, "R2.0" },
  53         { 0x52, "R2.1" },
  54         { 0x53, "R3.0" },
  55         { 0x54, "R3.10a" },
  56 #endif
  57         { 0x00, NULL   }
  58 };
  59
  60 static const struct id_to_str arc_cpu_nm[] = {
  61 #ifdef CONFIG_ISA_ARCOMPACT
  62         { 0x20, "ARC 600"   },
  63         { 0x30, "ARC 770"   },  /* 750 identified seperately */
  64 #else
  65         { 0x40, "ARC EM"  },
  66         { 0x50, "ARC HS38"  },
  67         { 0x54, "ARC HS48"  },
  68 #endif
  69         { 0x00, "Unknown"   }
  70 };
  71
  72 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
  73 {
  74         if (is_isa_arcompact()) {
  75                 struct bcr_iccm_arcompact iccm;
  76                 struct bcr_dccm_arcompact dccm;
  77
  78                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  79                 if (iccm.ver) {
  80                         cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
  81                         cpu->iccm.base_addr = iccm.base << 16;
  82                 }
  83
  84                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  85                 if (dccm.ver) {
  86                         unsigned long base;
  87                         cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
  88
  89                         base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
  90                         cpu->dccm.base_addr = base & ~0xF;
  91                 }
  92         } else {
  93                 struct bcr_iccm_arcv2 iccm;
  94                 struct bcr_dccm_arcv2 dccm;
  95                 unsigned long region;
  96
  97                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  98                 if (iccm.ver) {
  99                         cpu->iccm.sz = 256 << iccm.sz00;        /* 512B to 16M */
 100                         if (iccm.sz00 == 0xF && iccm.sz01 > 0)
 101                                 cpu->iccm.sz <<= iccm.sz01;
 102
 103                         region = read_aux_reg(ARC_REG_AUX_ICCM);
 104                         cpu->iccm.base_addr = region & 0xF0000000;
 105                 }
 106
 107                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
 108                 if (dccm.ver) {
 109                         cpu->dccm.sz = 256 << dccm.sz0;
 110                         if (dccm.sz0 == 0xF && dccm.sz1 > 0)
 111                                 cpu->dccm.sz <<= dccm.sz1;
 112
 113                         region = read_aux_reg(ARC_REG_AUX_DCCM);
 114                         cpu->dccm.base_addr = region & 0xF0000000;
 115                 }
 116         }
 117 }
 118
 119 static void read_arc_build_cfg_regs(void)
 120 {
 121         struct bcr_timer timer;
 122         struct bcr_generic bcr;
 123         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 124         const struct id_to_str *tbl;
 125         struct bcr_isa_arcv2 isa;
 126         struct bcr_actionpoint ap;
 127
 128         FIX_PTR(cpu);
 129
 130         READ_BCR(AUX_IDENTITY, cpu->core);
 131
 132         for (tbl = &arc_cpu_rel[0]; tbl->id != 0; tbl++) {
 133                 if (cpu->core.family == tbl->id) {
 134                         cpu->details = tbl->str;
 135                         break;
 136                 }
 137         }
 138
 139         for (tbl = &arc_cpu_nm[0]; tbl->id != 0; tbl++) {
 140                 if ((cpu->core.family & 0xF4) == tbl->id)
 141                         break;
 142         }
 143         cpu->name = tbl->str;
 144
 145         READ_BCR(ARC_REG_TIMERS_BCR, timer);
 146         cpu->extn.timer0 = timer.t0;
 147         cpu->extn.timer1 = timer.t1;
 148         cpu->extn.rtc = timer.rtc;
 149
 150         cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
 151
 152         READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
 153
 154         cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
 155         cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
 156         cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0;        /* 1,3 */
 157         cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
 158         cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
 159         cpu->extn.swape = (cpu->core.family >= 0x34) ? 1 :
 160                                 IS_ENABLED(CONFIG_ARC_HAS_SWAPE);
 161
 162         READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
 163
 164         /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
 165         read_decode_ccm_bcr(cpu);
 166
 167         read_decode_mmu_bcr();
 168         read_decode_cache_bcr();
 169
 170         if (is_isa_arcompact()) {
 171                 struct bcr_fp_arcompact sp, dp;
 172                 struct bcr_bpu_arcompact bpu;
 173
 174                 READ_BCR(ARC_REG_FP_BCR, sp);
 175                 READ_BCR(ARC_REG_DPFP_BCR, dp);
 176                 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
 177                 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
 178
 179                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 180                 cpu->bpu.ver = bpu.ver;
 181                 cpu->bpu.full = bpu.fam ? 1 : 0;
 182                 if (bpu.ent) {
 183                         cpu->bpu.num_cache = 256 << (bpu.ent - 1);
 184                         cpu->bpu.num_pred = 256 << (bpu.ent - 1);
 185                 }
 186         } else {
 187                 struct bcr_fp_arcv2 spdp;
 188                 struct bcr_bpu_arcv2 bpu;
 189
 190                 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
 191                 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
 192                 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
 193
 194                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 195                 cpu->bpu.ver = bpu.ver;
 196                 cpu->bpu.full = bpu.ft;
 197                 cpu->bpu.num_cache = 256 << bpu.bce;
 198                 cpu->bpu.num_pred = 2048 << bpu.pte;
 199                 cpu->bpu.ret_stk = 4 << bpu.rse;
 200
 201                 if (cpu->core.family >= 0x54) {
 202
 203                         struct bcr_uarch_build_arcv2 uarch;
 204
 205                         /*
 206                          * The first 0x54 core (uarch maj:min 0:1 or 0:2) was
 207                          * dual issue only (HS4x). But next uarch rev (1:0)
 208                          * allows it be configured for single issue (HS3x)
 209                          * Ensure we fiddle with dual issue only on HS4x
 210                          */
 211                         READ_BCR(ARC_REG_MICRO_ARCH_BCR, uarch);
 212
 213                         if (uarch.prod == 4) {
 214                                 unsigned int exec_ctrl;
 215
 216                                 /* dual issue hardware always present */
 217                                 cpu->extn.dual = 1;
 218
 219                                 READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
 220
 221                                 /* dual issue hardware enabled ? */
 222                                 cpu->extn.dual_enb = !(exec_ctrl & 1);
 223
 224                         }
 225                 }
 226         }
 227
 228         READ_BCR(ARC_REG_AP_BCR, ap);
 229         if (ap.ver) {
 230                 cpu->extn.ap_num = 2 << ap.num;
 231                 cpu->extn.ap_full = !ap.min;
 232         }
 233
 234         READ_BCR(ARC_REG_SMART_BCR, bcr);
 235         cpu->extn.smart = bcr.ver ? 1 : 0;
 236
 237         READ_BCR(ARC_REG_RTT_BCR, bcr);
 238         cpu->extn.rtt = bcr.ver ? 1 : 0;
 239
 240         READ_BCR(ARC_REG_ISA_CFG_BCR, isa);
 241
 242         /* some hacks for lack of feature BCR info in old ARC700 cores */
 243         if (is_isa_arcompact()) {
 244                 if (!isa.ver)   /* ISA BCR absent, use Kconfig info */
 245                         cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
 246                 else {
 247                         /* ARC700_BUILD only has 2 bits of isa info */
 248                         struct bcr_generic bcr = *(struct bcr_generic *)&isa;
 249                         cpu->isa.atomic = bcr.info & 1;
 250                 }
 251
 252                 cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
 253
 254                  /* there's no direct way to distinguish 750 vs. 770 */
 255                 if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3))
 256                         cpu->name = "ARC750";
 257         } else {
 258                 cpu->isa = isa;
 259         }
 260 }
 261
 262 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 263 {
 264         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 265         struct bcr_identity *core = &cpu->core;
 266         int i, n = 0, ua = 0;
 267
 268         FIX_PTR(cpu);
 269
 270         n += scnprintf(buf + n, len - n,
 271                        "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
 272                        core->family, core->cpu_id, core->chip_id);
 273
 274         n += scnprintf(buf + n, len - n, "processor [%d]\t: %s %s (%s ISA) %s%s%s\n",
 275                        cpu_id, cpu->name, cpu->details,
 276                        is_isa_arcompact() ? "ARCompact" : "ARCv2",
 277                        IS_AVAIL1(cpu->isa.be, "[Big-Endian]"),
 278                        IS_AVAIL3(cpu->extn.dual, cpu->extn.dual_enb, " Dual-Issue "));
 279
 280         n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ",
 281                        IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 282                        IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
 283                        IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
 284                        IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
 285
 286 #ifdef __ARC_UNALIGNED__
 287         ua = 1;
 288 #endif
 289         n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s%s",
 290                            IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
 291                            IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
 292                            IS_AVAIL1(cpu->isa.unalign, "unalign "), IS_USED_RUN(ua));
 293
 294         if (i)
 295                 n += scnprintf(buf + n, len - n, "\n\t\t: ");
 296
 297         if (cpu->extn_mpy.ver) {
 298                 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
 299                         n += scnprintf(buf + n, len - n, "mpy ");
 300                 } else {
 301                         int opt = 2;    /* stock MPY/MPYH */
 302
 303                         if (cpu->extn_mpy.dsp)  /* OPT 7-9 */
 304                                 opt = cpu->extn_mpy.dsp + 6;
 305
 306                         n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
 307                 }
 308         }
 309
 310         n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
 311                        IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
 312                        IS_AVAIL1(cpu->extn.norm, "norm "),
 313                        IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
 314                        IS_AVAIL1(cpu->extn.swap, "swap "),
 315                        IS_AVAIL1(cpu->extn.minmax, "minmax "),
 316                        IS_AVAIL1(cpu->extn.crc, "crc "),
 317                        IS_AVAIL2(cpu->extn.swape, "swape", CONFIG_ARC_HAS_SWAPE));
 318
 319         if (cpu->bpu.ver)
 320                 n += scnprintf(buf + n, len - n,
 321                               "BPU\t\t: %s%s match, cache:%d, Predict Table:%d Return stk: %d",
 322                               IS_AVAIL1(cpu->bpu.full, "full"),
 323                               IS_AVAIL1(!cpu->bpu.full, "partial"),
 324                               cpu->bpu.num_cache, cpu->bpu.num_pred, cpu->bpu.ret_stk);
 325
 326         if (is_isa_arcv2()) {
 327                 struct bcr_lpb lpb;
 328
 329                 READ_BCR(ARC_REG_LPB_BUILD, lpb);
 330                 if (lpb.ver) {
 331                         unsigned int ctl;
 332                         ctl = read_aux_reg(ARC_REG_LPB_CTRL);
 333
 334                         n += scnprintf(buf + n, len - n, " Loop Buffer:%d %s",
 335                                 lpb.entries,
 336                                 IS_DISABLED_RUN(!ctl));
 337                 }
 338         }
 339
 340         n += scnprintf(buf + n, len - n, "\n");
 341         return buf;
 342 }
 343
 344 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
 345 {
 346         int n = 0;
 347         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 348
 349         FIX_PTR(cpu);
 350
 351         n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base);
 352
 353         if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
 354                 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
 355                                IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
 356                                IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
 357
 358         if (cpu->extn.ap_num | cpu->extn.smart | cpu->extn.rtt) {
 359                 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s",
 360                                IS_AVAIL1(cpu->extn.smart, "smaRT "),
 361                                IS_AVAIL1(cpu->extn.rtt, "RTT "));
 362                 if (cpu->extn.ap_num) {
 363                         n += scnprintf(buf + n, len - n, "ActionPoint %d/%s",
 364                                        cpu->extn.ap_num,
 365                                        cpu->extn.ap_full ? "full":"min");
 366                 }
 367                 n += scnprintf(buf + n, len - n, "\n");
 368         }
 369
 370         if (cpu->dccm.sz || cpu->iccm.sz)
 371                 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
 372                                cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
 373                                cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
 374
 375         if (is_isa_arcv2()) {
 376
 377                 /* Error Protection: ECC/Parity */
 378                 struct bcr_erp erp;
 379                 READ_BCR(ARC_REG_ERP_BUILD, erp);
 380
 381                 if (erp.ver) {
 382                         struct  ctl_erp ctl;
 383                         READ_BCR(ARC_REG_ERP_CTRL, ctl);
 384
 385                         /* inverted bits: 0 means enabled */
 386                         n += scnprintf(buf + n, len - n, "Extn [ECC]\t: %s%s%s%s%s%s\n",
 387                                 IS_AVAIL3(erp.ic,  !ctl.dpi, "IC "),
 388                                 IS_AVAIL3(erp.dc,  !ctl.dpd, "DC "),
 389                                 IS_AVAIL3(erp.mmu, !ctl.mpd, "MMU "));
 390                 }
 391         }
 392
 393         n += scnprintf(buf + n, len - n, "OS ABI [v%d]\t: %s\n",
 394                         EF_ARC_OSABI_CURRENT >> 8,
 395                         EF_ARC_OSABI_CURRENT == EF_ARC_OSABI_V3 ?
 396                         "no-legacy-syscalls" : "64-bit data any register aligned");
 397
 398         return buf;
 399 }
 400
 401 static void arc_chk_core_config(void)
 402 {
 403         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 404         int saved = 0, present = 0;
 405         char *opt_nm = NULL;
 406
 407         if (!cpu->extn.timer0)
 408                 panic("Timer0 is not present!\n");
 409
 410         if (!cpu->extn.timer1)
 411                 panic("Timer1 is not present!\n");
 412
 413 #ifdef CONFIG_ARC_HAS_DCCM
 414         /*
 415          * DCCM can be arbit placed in hardware.
 416          * Make sure it's placement/sz matches what Linux is built with
 417          */
 418         if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
 419                 panic("Linux built with incorrect DCCM Base address\n");
 420
 421         if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
 422                 panic("Linux built with incorrect DCCM Size\n");
 423 #endif
 424
 425 #ifdef CONFIG_ARC_HAS_ICCM
 426         if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
 427                 panic("Linux built with incorrect ICCM Size\n");
 428 #endif
 429
 430         /*
 431          * FP hardware/software config sanity
 432          * -If hardware present, kernel needs to save/restore FPU state
 433          * -If not, it will crash trying to save/restore the non-existant regs
 434          */
 435
 436         if (is_isa_arcompact()) {
 437                 opt_nm = "CONFIG_ARC_FPU_SAVE_RESTORE";
 438                 saved = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
 439
 440                 /* only DPDP checked since SP has no arch visible regs */
 441                 present = cpu->extn.fpu_dp;
 442         } else {
 443                 opt_nm = "CONFIG_ARC_HAS_ACCL_REGS";
 444                 saved = IS_ENABLED(CONFIG_ARC_HAS_ACCL_REGS);
 445
 446                 /* Accumulator Low:High pair (r58:59) present if DSP MPY or FPU */
 447                 present = cpu->extn_mpy.dsp | cpu->extn.fpu_sp | cpu->extn.fpu_dp;
 448         }
 449
 450         if (present && !saved)
 451                 pr_warn("Enable %s for working apps\n", opt_nm);
 452         else if (!present && saved)
 453                 panic("Disable %s, hardware NOT present\n", opt_nm);
 454 }
 455
 456 /*
 457  * Initialize and setup the processor core
 458  * This is called by all the CPUs thus should not do special case stuff
 459  *    such as only for boot CPU etc
 460  */
 461
 462 void setup_processor(void)
 463 {
 464         char str[512];
 465         int cpu_id = smp_processor_id();
 466
 467         read_arc_build_cfg_regs();
 468         arc_init_IRQ();
 469
 470         pr_info("%s", arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
 471
 472         arc_mmu_init();
 473         arc_cache_init();
 474
 475         pr_info("%s", arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
 476         pr_info("%s", arc_platform_smp_cpuinfo());
 477
 478         arc_chk_core_config();
 479 }
 480
 481 static inline bool uboot_arg_invalid(unsigned long addr)
 482 {
 483         /*
 484          * Check that it is a untranslated address (although MMU is not enabled
 485          * yet, it being a high address ensures this is not by fluke)
 486          */
 487         if (addr < PAGE_OFFSET)
 488                 return true;
 489
 490         /* Check that address doesn't clobber resident kernel image */
 491         return addr >= (unsigned long)_stext && addr <= (unsigned long)_end;
 492 }
 493
 494 #define IGNORE_ARGS             "Ignore U-boot args: "
 495
 496 /* uboot_tag values for U-boot - kernel ABI revision 0; see head.S */
 497 #define UBOOT_TAG_NONE          0
 498 #define UBOOT_TAG_CMDLINE       1
 499 #define UBOOT_TAG_DTB           2
 500
 501 void __init handle_uboot_args(void)
 502 {
 503         bool use_embedded_dtb = true;
 504         bool append_cmdline = false;
 505
 506         /* check that we know this tag */
 507         if (uboot_tag != UBOOT_TAG_NONE &&
 508             uboot_tag != UBOOT_TAG_CMDLINE &&
 509             uboot_tag != UBOOT_TAG_DTB) {
 510                 pr_warn(IGNORE_ARGS "invalid uboot tag: '%08x'\n", uboot_tag);
 511                 goto ignore_uboot_args;
 512         }
 513
 514         if (uboot_tag != UBOOT_TAG_NONE &&
 515             uboot_arg_invalid((unsigned long)uboot_arg)) {
 516                 pr_warn(IGNORE_ARGS "invalid uboot arg: '%px'\n", uboot_arg);
 517                 goto ignore_uboot_args;
 518         }
 519
 520         /* see if U-boot passed an external Device Tree blob */
 521         if (uboot_tag == UBOOT_TAG_DTB) {
 522                 machine_desc = setup_machine_fdt((void *)uboot_arg);
 523
 524                 /* external Device Tree blob is invalid - use embedded one */
 525                 use_embedded_dtb = !machine_desc;
 526         }
 527
 528         if (uboot_tag == UBOOT_TAG_CMDLINE)
 529                 append_cmdline = true;
 530
 531 ignore_uboot_args:
 532
 533         if (use_embedded_dtb) {
 534                 machine_desc = setup_machine_fdt(__dtb_start);
 535                 if (!machine_desc)
 536                         panic("Embedded DT invalid\n");
 537         }
 538
 539         /*
 540          * NOTE: @boot_command_line is populated by setup_machine_fdt() so this
 541          * append processing can only happen after.
 542          */
 543         if (append_cmdline) {
 544                 /* Ensure a whitespace between the 2 cmdlines */
 545                 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
 546                 strlcat(boot_command_line, uboot_arg, COMMAND_LINE_SIZE);
 547         }
 548 }
 549
 550 void __init setup_arch(char **cmdline_p)
 551 {
 552         handle_uboot_args();
 553
 554         /* Save unparsed command line copy for /proc/cmdline */
 555         *cmdline_p = boot_command_line;
 556
 557         /* To force early parsing of things like mem=xxx */
 558         parse_early_param();
 559
 560         /* Platform/board specific: e.g. early console registration */
 561         if (machine_desc->init_early)
 562                 machine_desc->init_early();
 563
 564         smp_init_cpus();
 565
 566         setup_processor();
 567         setup_arch_memory();
 568
 569         /* copy flat DT out of .init and then unflatten it */
 570         unflatten_and_copy_device_tree();
 571
 572         /* Can be issue if someone passes cmd line arg "ro"
 573          * But that is unlikely so keeping it as it is
 574          */
 575         root_mountflags &= ~MS_RDONLY;
 576
 577 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
 578         conswitchp = &dummy_con;
 579 #endif
 580
 581         arc_unwind_init();
 582 }
 583
 584 /*
 585  * Called from start_kernel() - boot CPU only
 586  */
 587 void __init time_init(void)
 588 {
 589         of_clk_init(NULL);
 590         timer_probe();
 591 }
 592
 593 static int __init customize_machine(void)
 594 {
 595         if (machine_desc->init_machine)
 596                 machine_desc->init_machine();
 597
 598         return 0;
 599 }
 600 arch_initcall(customize_machine);
 601
 602 static int __init init_late_machine(void)
 603 {
 604         if (machine_desc->init_late)
 605                 machine_desc->init_late();
 606
 607         return 0;
 608 }
 609 late_initcall(init_late_machine);
 610 /*
 611  *  Get CPU information for use by the procfs.
 612  */
 613
 614 #define cpu_to_ptr(c)   ((void *)(0xFFFF0000 | (unsigned int)(c)))
 615 #define ptr_to_cpu(p)   (~0xFFFF0000UL & (unsigned int)(p))
 616
 617 static int show_cpuinfo(struct seq_file *m, void *v)
 618 {
 619         char *str;
 620         int cpu_id = ptr_to_cpu(v);
 621         struct device *cpu_dev = get_cpu_device(cpu_id);
 622         struct clk *cpu_clk;
 623         unsigned long freq = 0;
 624
 625         if (!cpu_online(cpu_id)) {
 626                 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
 627                 goto done;
 628         }
 629
 630         str = (char *)__get_free_page(GFP_KERNEL);
 631         if (!str)
 632                 goto done;
 633
 634         seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 635
 636         cpu_clk = clk_get(cpu_dev, NULL);
 637         if (IS_ERR(cpu_clk)) {
 638                 seq_printf(m, "CPU speed \t: Cannot get clock for processor [%d]\n",
 639                            cpu_id);
 640         } else {
 641                 freq = clk_get_rate(cpu_clk);
 642         }
 643         if (freq)
 644                 seq_printf(m, "CPU speed\t: %lu.%02lu Mhz\n",
 645                            freq / 1000000, (freq / 10000) % 100);
 646
 647         seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 648                    loops_per_jiffy / (500000 / HZ),
 649                    (loops_per_jiffy / (5000 / HZ)) % 100);
 650
 651         seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 652         seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
 653         seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
 654         seq_printf(m, arc_platform_smp_cpuinfo());
 655
 656         free_page((unsigned long)str);
 657 done:
 658         seq_printf(m, "\n");
 659
 660         return 0;
 661 }
 662
 663 static void *c_start(struct seq_file *m, loff_t *pos)
 664 {
 665         /*
 666          * Callback returns cpu-id to iterator for show routine, NULL to stop.
 667          * However since NULL is also a valid cpu-id (0), we use a round-about
 668          * way to pass it w/o having to kmalloc/free a 2 byte string.
 669          * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
 670          */
 671         return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
 672 }
 673
 674 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 675 {
 676         ++*pos;
 677         return c_start(m, pos);
 678 }
 679
 680 static void c_stop(struct seq_file *m, void *v)
 681 {
 682 }
 683
 684 const struct seq_operations cpuinfo_op = {
 685         .start  = c_start,
 686         .next   = c_next,
 687         .stop   = c_stop,
 688         .show   = show_cpuinfo
 689 };
 690
 691 static DEFINE_PER_CPU(struct cpu, cpu_topology);
 692
 693 static int __init topology_init(void)
 694 {
 695         int cpu;
 696
 697         for_each_present_cpu(cpu)
 698             register_cpu(&per_cpu(cpu_topology, cpu), cpu);
 699
 700         return 0;
 701 }
 702
 703 subsys_initcall(topology_init);