1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2020 MediaTek
5 $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek USB3 DRD Controller Device Tree Bindings
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: "usb-drd.yaml"
17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8192-mtu3
28 - const: mediatek,mtu3
32 - description: the registers of device MAC
33 - description: the registers of IP Port Control
44 description: A phandle to USB power domain node to control USB's MTCMOS
50 - description: Controller clock used by normal mode
51 - description: Reference clock used by low power mode etc
52 - description: Mcu bus clock for register access
53 - description: DMA bus clock for data transfer
58 - const: sys_ck # required, others are optional
65 List of all the USB PHYs used, it's better to keep the sequence
66 as the hardware layout.
69 - description: USB2/HS PHY # required, others are optional
70 - description: USB3/SS(P) PHY
71 - description: USB2/HS PHY # the following for backward compatible
72 - description: USB3/SS(P) PHY
73 - description: USB2/HS PHY
74 - description: USB3/SS(P) PHY
75 - description: USB2/HS PHY
76 - description: USB3/SS(P) PHY
77 - description: USB2/HS PHY
80 description: Regulator of USB AVDD3.3v
85 Regulator of USB VBUS5v, needed when supports dual-role mode.
86 Particularly, if use an output GPIO to control a VBUS regulator, should
87 model it as a regulator. See bindings/regulator/fixed-regulator.yaml
88 It's considered valid for compatibility reasons, not allowed for
89 new bindings, and put into a usb-connector node.
92 enum: [host, peripheral, otg]
96 enum: [super-speed-plus, super-speed, high-speed, full-speed]
109 Phandle to the extcon device detecting the IDDIG/VBUS state, neede
110 when supports dual-role mode.
111 It's considered valid for compatibility reasons, not allowed for
112 new bindings, and use "usb-role-switch" property instead.
115 $ref: /schemas/types.yaml#/definitions/flag
116 description: Support role switch.
120 $ref: /connector/usb-connector.yaml#
122 Connector for dual role switch, especially for "gpio-usb-b-connector"
127 Any connector to the data bus of this controller should be modelled
128 using the OF graph bindings specified, if the "usb-role-switch"
129 property is used. See graph.txt
130 $ref: /schemas/graph.yaml#/properties/port
133 $ref: /schemas/types.yaml#/definitions/flag
135 supports manual dual-role switch via debugfs; usually used when
136 receptacle is TYPE-A and also wants to support dual-role mode.
140 description: enable USB remote wakeup, see power/wakeup-source.txt
143 mediatek,syscon-wakeup:
144 $ref: /schemas/types.yaml#/definitions/phandle-array
147 A phandle to syscon used to access the register of the USB wakeup glue
148 layer between xHCI and SPM, the field should always be 3 cells long.
152 The first cell represents a phandle to syscon
154 The second cell represents the register base address of the glue
157 The third cell represents the hardware version of the glue layer,
158 1 - used by mt8173 etc, revision 1 without following IPM rule;
159 2 - used by mt2712 etc, revision 2 with following IPM rule;
160 101 - used by mt8183, specific 1.01;
161 102 - used by mt8192, specific 1.02;
162 enum: [1, 2, 101, 102]
164 mediatek,u3p-dis-msk:
165 $ref: /schemas/types.yaml#/definitions/uint32
166 description: The mask to disable u3ports, bit0 for u3port0,
167 bit1 for u3port1, ... etc
169 # Required child node when support dual-role
173 $ref: /usb/mediatek,mtk-xhci.yaml#
175 The xhci should be added as subnode to mtu3 as shown in the following
176 example if the host mode is enabled.
179 connector: [ 'usb-role-switch' ]
180 port: [ 'usb-role-switch' ]
181 wakeup-source: [ 'mediatek,syscon-wakeup' ]
191 additionalProperties: false
194 # Dual role switch by extcon
196 #include <dt-bindings/clock/mt8173-clk.h>
197 #include <dt-bindings/interrupt-controller/arm-gic.h>
198 #include <dt-bindings/interrupt-controller/irq.h>
199 #include <dt-bindings/phy/phy.h>
200 #include <dt-bindings/power/mt8173-power.h>
203 compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
204 reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
205 reg-names = "mac", "ippc";
206 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
207 phys = <&phy_port0 PHY_TYPE_USB3>, <&phy_port1 PHY_TYPE_USB2>;
208 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
209 clocks = <&topckgen CLK_TOP_USB30_SEL>;
210 clock-names = "sys_ck";
211 vusb33-supply = <&mt6397_vusb_reg>;
212 vbus-supply = <&usb_p0_vbus>;
213 extcon = <&extcon_usb>;
216 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
217 #address-cells = <1>;
222 compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
223 reg = <0x11270000 0x1000>;
225 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
226 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
227 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
228 clock-names = "sys_ck", "ref_ck";
229 vusb33-supply = <&mt6397_vusb_reg>;
233 # Enable/disable device by an input gpio for VBUS pin
235 #include <dt-bindings/gpio/gpio.h>
236 #include <dt-bindings/power/mt2712-power.h>
239 compatible = "mediatek,mt2712-mtu3", "mediatek,mtu3";
240 reg = <0x112c1000 0x3000>, <0x112d0700 0x0100>;
241 reg-names = "mac", "ippc";
242 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_LOW>;
243 phys = <&u2port2 PHY_TYPE_USB2>;
244 power-domains = <&scpsys MT2712_POWER_DOMAIN_USB2>;
245 clocks = <&topckgen CLK_TOP_USB30_SEL>;
246 clock-names = "sys_ck";
247 dr_mode = "peripheral";
251 compatible = "gpio-usb-b-connector", "usb-b-connector";
253 vbus-gpios = <&pio 13 GPIO_ACTIVE_HIGH>;
257 # Dual role switch with type-c
260 compatible ="mediatek,mt8183-mtu3", "mediatek,mtu3";
261 reg = <0x11201000 0x2e00>, <0x11203e00 0x0100>;
262 reg-names = "mac", "ippc";
263 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
264 phys = <&u2port0 PHY_TYPE_USB2>;
266 clock-names = "sys_ck";
267 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
271 #address-cells = <1>;
276 compatible = "mediatek,mt8183-xhci", "mediatek,mtk-xhci";
277 reg = <0x11200000 0x1000>;
279 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>;
281 clock-names = "sys_ck";
285 usb_role_sw: endpoint {
286 remote-endpoint = <&hs_ep>;