1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/serial/pl011.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM AMBA Primecell PL011 serial UART
10 - Rob Herring <robh@kernel.org>
13 - $ref: /schemas/serial.yaml#
15 # Need a custom select here or 'arm,primecell' will match on lots of nodes
30 - const: arm,primecell
32 - const: arm,primecell
45 When present, must have one state named "default",
46 and may contain a second name named "sleep". The former
47 state sets up pins for ordinary operation whereas
48 the latter state will put the associated pins to sleep
49 when the UART is unused
57 When present, the first clock listed must correspond to
58 the clock named UARTCLK on the IP block, i.e. the clock
59 to the external serial line, whereas the second clock
60 must correspond to the PCLK clocking the internal logic
61 of the block. Just listing one clock (the first one) is
82 Enables polling when using RX DMA.
87 Rate at which poll occurs when auto-poll is set.
89 $ref: /schemas/types.yaml#/definitions/uint32
94 Poll timeout when auto-poll is set, default
96 $ref: /schemas/types.yaml#/definitions/uint32
105 poll-rate-ms: [ auto-poll ]
106 poll-timeout-ms: [ auto-poll ]
108 additionalProperties: false
113 compatible = "arm,pl011", "arm,primecell";
114 reg = <0x80120000 0x1000>;
115 interrupts = <0 11 4>;
116 dmas = <&dma 13 0 0x2>, <&dma 13 0 0x0>;
117 dma-names = "rx", "tx";
118 clocks = <&foo_clk>, <&bar_clk>;
119 clock-names = "uartclk", "apb_pclk";