1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-wpss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7280 WPSS Peripheral Image Loader
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This document defines the binding for a component that loads and boots firmware
14 on the Qualcomm Technology Inc. WPSS.
19 - qcom,sc7280-wpss-pil
24 The base address and size of the qdsp6ss register
28 - description: Watchdog interrupt
29 - description: Fatal interrupt
30 - description: Ready interrupt
31 - description: Handover interrupt
32 - description: Stop acknowledge interrupt
33 - description: Shutdown acknowledge interrupt
46 - description: GCC WPSS AHB BDG Master clock
47 - description: GCC WPSS AHB clock
48 - description: GCC WPSS RSCP clock
49 - description: XO clock
60 - description: CX power domain
61 - description: MX power domain
70 - description: AOSS restart
71 - description: PDC SYNC
79 $ref: /schemas/types.yaml#/definitions/phandle
80 description: Reference to the reserved-memory for the Hexagon core
83 $ref: /schemas/types.yaml#/definitions/string
85 The name of the firmware which should be loaded for this remote
89 $ref: /schemas/types.yaml#/definitions/phandle-array
91 Phandle reference to a syscon representing TCSR followed by the
92 three offsets within syscon for q6, modem and nc halt registers.
95 $ref: /schemas/types.yaml#/definitions/phandle
96 description: Reference to the AOSS side-channel message RAM.
99 $ref: /schemas/types.yaml#/definitions/phandle-array
100 description: States used by the AP to signal the Hexagon core
102 - description: Stop the modem
104 qcom,smem-state-names:
105 $ref: /schemas/types.yaml#/definitions/string
106 description: The names of the state bits used for SMP2P output
113 Qualcomm G-Link subnode which represents communication edge, channels
114 and devices related to the ADSP.
119 - description: IRQ from WPSS to GLINK
123 - description: Mailbox for communication between APPS and WPSS
126 description: The names of the state bits used for SMP2P output
131 $ref: /schemas/types.yaml#/definitions/uint32
132 description: ID of the shared memory used by GLINK for communication with WPSS
141 additionalProperties: false
158 - qcom,smem-state-names
161 additionalProperties: false
165 #include <dt-bindings/interrupt-controller/arm-gic.h>
166 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
167 #include <dt-bindings/clock/qcom,rpmh.h>
168 #include <dt-bindings/power/qcom-rpmpd.h>
169 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
170 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
171 #include <dt-bindings/mailbox/qcom-ipcc.h>
173 compatible = "qcom,sc7280-wpss-pil";
174 reg = <0x08a00000 0x10000>;
176 interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_EDGE_RISING>,
177 <&wpss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
178 <&wpss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
179 <&wpss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
180 <&wpss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
181 <&wpss_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
182 interrupt-names = "wdog", "fatal", "ready", "handover",
183 "stop-ack", "shutdown-ack";
185 clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,
186 <&gcc GCC_WPSS_AHB_CLK>,
187 <&gcc GCC_WPSS_RSCP_CLK>,
188 <&rpmhcc RPMH_CXO_CLK>;
189 clock-names = "ahb_bdg", "ahb",
192 power-domains = <&rpmhpd SC7280_CX>,
194 power-domain-names = "cx", "mx";
196 memory-region = <&wpss_mem>;
198 qcom,qmp = <&aoss_qmp>;
200 qcom,smem-states = <&wpss_smp2p_out 0>;
201 qcom,smem-state-names = "stop";
203 resets = <&aoss_reset AOSS_CC_WCSS_RESTART>,
204 <&pdc_reset PDC_WPSS_SYNC_RESET>;
205 reset-names = "restart", "pdc_sync";
207 qcom,halt-regs = <&tcsr_mutex 0x37000>;
210 interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
211 IPCC_MPROC_SIGNAL_GLINK_QMP
212 IRQ_TYPE_EDGE_RISING>;
213 mboxes = <&ipcc IPCC_CLIENT_WPSS
214 IPCC_MPROC_SIGNAL_GLINK_QMP>;
217 qcom,remote-pid = <13>;