1 Microsemi Ocelot reset controller
3 The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the
6 The reset registers are both present in the MSCC vcoreiii MIPS and
7 microchip Sparx5 armv8 SoC's.
11 - compatible: "mscc,ocelot-chip-reset", "mscc,luton-chip-reset",
12 "mscc,jaguar2-chip-reset" or "microchip,sparx5-chip-reset"
16 compatible = "mscc,ocelot-chip-reset";
17 reg = <0x1070008 0x4>;