1 Qualcomm PMIC GPIO block
3 This binding describes the GPIO block(s) found in the 8xxx series of
9 Definition: must be one of:
33 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
34 if the device is on an spmi bus or an ssbi bus respectively
38 Value type: <prop-encoded-array>
39 Definition: Register base of the GPIO block and length.
43 Value type: <prop-encoded-array>
44 Definition: Must contain an array of encoded interrupt specifiers for
50 Definition: Mark the device node as a GPIO controller
55 Definition: Must be 2;
56 the first cell will be used to define gpio number and the
57 second denotes the flags for this gpio
59 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
60 a general description of GPIO and interrupt bindings.
62 Please refer to pinctrl-bindings.txt in this directory for details of the
63 common pinctrl bindings used by client devices, including the meaning of the
64 phrase "pin configuration node".
66 The pin configuration nodes act as a container for an arbitrary number of
67 subnodes. Each of these subnodes represents some desired configuration for a
68 pin or a list of pins. This configuration can include the
69 mux function to select on those pin(s), and various pin configuration
70 parameters, as listed below.
75 The name of each subnode is not important; all subnodes should be enumerated
76 and processed purely based on their content.
78 Each subnode only affects those parameters that are explicitly listed. In
79 other words, a subnode that lists a mux function but no pin configuration
80 parameters implies no information about any pin configuration parameters.
81 Similarly, a pin subnode that describes a pullup parameter implies no
82 information about e.g. the mux function.
84 The following generic properties as defined in pinctrl-bindings.txt are valid
85 to specify in a pin configuration subnode:
89 Value type: <string-array>
90 Definition: List of gpio pins affected by the properties specified in
91 this subnode. Valid pins are:
92 gpio1-gpio4 for pm8005
93 gpio1-gpio6 for pm8018
94 gpio1-gpio12 for pm8038
95 gpio1-gpio40 for pm8058
96 gpio1-gpio4 for pm8916
97 gpio1-gpio38 for pm8917
98 gpio1-gpio44 for pm8921
99 gpio1-gpio36 for pm8941
100 gpio1-gpio8 for pm8950 (hole on gpio3)
101 gpio1-gpio22 for pm8994
102 gpio1-gpio26 for pm8998
103 gpio1-gpio22 for pma8084
104 gpio1-gpio2 for pmi8950
105 gpio1-gpio10 for pmi8994
106 gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10)
107 gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7
109 gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7)
110 gpio1-gpio12 for pm8150l (hole on gpio7)
111 gpio1-gpio10 for pm6150
112 gpio1-gpio12 for pm6150l
117 Definition: Specify the alternative function to be configured for the
118 specified pins. Valid values are:
127 And following values are supported by LV/MV GPIO subtypes:
134 Definition: The specified pins should be configured as no pull.
139 Definition: The specified pins should be configured as pull down.
144 Definition: The specified pins should be configured as pull up.
146 - qcom,pull-up-strength:
149 Definition: Specifies the strength to use for pull up, if selected.
150 Valid values are; as defined in
151 <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
152 1: 30uA (PMIC_GPIO_PULL_UP_30)
153 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
154 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
155 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
156 If this property is omitted 30uA strength will be used if
159 - bias-high-impedance:
162 Definition: The specified pins will put in high-Z mode and disabled.
167 Definition: The specified pins are put in input mode.
172 Definition: The specified pins are configured in output mode, driven
178 Definition: The specified pins are configured in output mode, driven
184 Definition: Selects the power source for the specified pins. Valid
185 power sources are defined per chip in
186 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
188 - qcom,drive-strength:
191 Definition: Selects the drive strength for the specified pins. Value
193 0: no (PMIC_GPIO_STRENGTH_NO)
194 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
195 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
196 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
197 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
202 Definition: The specified pins are configured in push-pull mode.
207 Definition: The specified pins are configured in open-drain mode.
212 Definition: The specified pins are configured in open-source mode.
217 Definition: The specified pins are configured in analog-pass-through mode.
222 Definition: Selects ATEST rail to route to GPIO when it's configured
223 in analog-pass-through mode.
224 Valid values are 1-4 corresponding to ATEST1 to ATEST4.
229 Definition: Selects DTEST rail to route to GPIO when it's configured
231 Valid values are 1-4 corresponding to DTEST1 to DTEST4.
235 pm8921_gpio: gpio@150 {
236 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
238 interrupts = <192 1>, <193 1>, <194 1>,
239 <195 1>, <196 1>, <197 1>,
240 <198 1>, <199 1>, <200 1>,
241 <201 1>, <202 1>, <203 1>,
242 <204 1>, <205 1>, <206 1>,
243 <207 1>, <208 1>, <209 1>,
244 <210 1>, <211 1>, <212 1>,
245 <213 1>, <214 1>, <215 1>,
246 <216 1>, <217 1>, <218 1>,
247 <219 1>, <220 1>, <221 1>,
248 <222 1>, <223 1>, <224 1>,
249 <225 1>, <226 1>, <227 1>,
250 <228 1>, <229 1>, <230 1>,
251 <231 1>, <232 1>, <233 1>,
257 pm8921_gpio_keys: gpio-keys {
259 pins = "gpio20", "gpio21";
265 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
266 power-source = <PM8921_GPIO_S4>;