1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/pinctrl/ingenic,pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs pin controller devicetree bindings
10 Please refer to pinctrl-bindings.txt in this directory for details of the
11 common pinctrl bindings used by client devices, including the meaning of the
12 phrase "pin configuration node".
14 For the Ingenic SoCs, pin control is tightly bound with GPIO ports. All pins
15 may be used as GPIOs, multiplexed device functions are configured within the
16 GPIO port configuration registers and it is typical to refer to pins using the
17 naming scheme "PxN" where x is a character identifying the GPIO port with
18 which the pin is associated and N is an integer from 0 to 31 identifying the
19 pin within that GPIO port. For example PA0 is the first pin in GPIO port A,
20 and PB31 is the last pin in GPIO port B. The JZ4730, the JZ4740, the JZ4725B,
21 the X1000 and the X1830 contains 4 GPIO ports, PA to PD, for a total of 128
22 pins. The X2000 and the X2100 contains 5 GPIO ports, PA to PE, for a total of
23 160 pins. The JZ4750, the JZ4755 the JZ4760, the JZ4770 and the JZ4780 contains
24 6 GPIO ports, PA to PF, for a total of 192 pins. The JZ4775 contains 7 GPIO
25 ports, PA to PG, for a total of 224 pins.
28 - Paul Cercueil <paul@crapouillou.net>
32 pattern: "^pinctrl@[0-9a-f]+$"
37 - ingenic,jz4730-pinctrl
38 - ingenic,jz4740-pinctrl
39 - ingenic,jz4725b-pinctrl
40 - ingenic,jz4750-pinctrl
41 - ingenic,jz4755-pinctrl
42 - ingenic,jz4760-pinctrl
43 - ingenic,jz4770-pinctrl
44 - ingenic,jz4775-pinctrl
45 - ingenic,jz4780-pinctrl
46 - ingenic,x1000-pinctrl
47 - ingenic,x1500-pinctrl
48 - ingenic,x1830-pinctrl
49 - ingenic,x2000-pinctrl
50 - ingenic,x2100-pinctrl
52 - const: ingenic,jz4760b-pinctrl
53 - const: ingenic,jz4760-pinctrl
55 - const: ingenic,x1000e-pinctrl
56 - const: ingenic,x1000-pinctrl
58 - const: ingenic,x2000e-pinctrl
59 - const: ingenic,x2000-pinctrl
78 - ingenic,jz4725b-gpio
93 - description: The GPIO bank number
103 interrupt-controller: true
108 Refer to ../interrupt-controller/interrupts.txt for more details.
119 - interrupt-controller
122 additionalProperties: false
130 additionalProperties:
134 - $ref: pincfg-node.yaml#
135 - $ref: pinmux-node.yaml#
147 additionalProperties: false
152 additionalProperties:
155 - $ref: pincfg-node.yaml#
156 - $ref: pinmux-node.yaml#
168 additionalProperties: false
172 pin-controller@10010000 {
173 compatible = "ingenic,jz4770-pinctrl";
174 reg = <0x10010000 0x600>;
176 #address-cells = <1>;
180 compatible = "ingenic,jz4770-gpio";
184 gpio-ranges = <&pinctrl 0 0 32>;
187 interrupt-controller;
188 #interrupt-cells = <2>;
190 interrupt-parent = <&intc>;