Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Rockchip USB2.0 phy with inno IP block
   8
   9 maintainers:
  10   - Heiko Stuebner <heiko@sntech.de>
  11
  12 properties:
  13   compatible:
  14     enum:
  15       - rockchip,px30-usb2phy
  16       - rockchip,rk3228-usb2phy
  17       - rockchip,rk3308-usb2phy
  18       - rockchip,rk3328-usb2phy
  19       - rockchip,rk3366-usb2phy
  20       - rockchip,rk3399-usb2phy
  21       - rockchip,rv1108-usb2phy
  22
  23   reg:
  24     maxItems: 1
  25
  26   clock-output-names:
  27     description:
  28       The usb 480m output clock name.
  29
  30   "#clock-cells":
  31     const: 0
  32
  33   "#phy-cells":
  34     const: 0
  35
  36   clocks:
  37     maxItems: 1
  38
  39   clock-names:
  40     const: phyclk
  41
  42   assigned-clocks:
  43     description:
  44       Phandle of the usb 480m clock.
  45
  46   assigned-clock-parents:
  47     description:
  48       Parent of the usb 480m clock.
  49       Select between usb-phy output 480m and xin24m.
  50       Refer to clk/clock-bindings.txt for generic clock consumer properties.
  51
  52   extcon:
  53     description:
  54       Phandle to the extcon device providing the cable state for the otg phy.
  55
  56   rockchip,usbgrf:
  57     $ref: /schemas/types.yaml#/definitions/phandle
  58     description:
  59       Phandle to the syscon managing the 'usb general register files'.
  60       When set the driver will request its phandle as one companion-grf
  61       for some special SoCs (e.g rv1108).
  62
  63   host-port:
  64     type: object
  65     additionalProperties: false
  66
  67     properties:
  68       "#phy-cells":
  69         const: 0
  70
  71       interrupts:
  72         description: host linestate interrupt
  73
  74       interrupt-names:
  75         const: linestate
  76
  77       phy-supply:
  78         description:
  79           Phandle to a regulator that provides power to VBUS.
  80           See ./phy-bindings.txt for details.
  81
  82     required:
  83       - "#phy-cells"
  84       - interrupts
  85       - interrupt-names
  86
  87   otg-port:
  88     type: object
  89     additionalProperties: false
  90
  91     properties:
  92       "#phy-cells":
  93         const: 0
  94
  95       interrupts:
  96         minItems: 1
  97         maxItems: 3
  98
  99       interrupt-names:
 100         oneOf:
 101           - const: linestate
 102           - const: otg-mux
 103           - items:
 104               - const: otg-bvalid
 105               - const: otg-id
 106               - const: linestate
 107
 108       phy-supply:
 109         description:
 110           Phandle to a regulator that provides power to VBUS.
 111           See ./phy-bindings.txt for details.
 112
 113     required:
 114       - "#phy-cells"
 115       - interrupts
 116       - interrupt-names
 117
 118 required:
 119   - compatible
 120   - reg
 121   - clock-output-names
 122   - "#clock-cells"
 123   - "#phy-cells"
 124   - host-port
 125   - otg-port
 126
 127 additionalProperties: false
 128
 129 examples:
 130   - |
 131     #include <dt-bindings/clock/rk3399-cru.h>
 132     #include <dt-bindings/interrupt-controller/arm-gic.h>
 133     #include <dt-bindings/interrupt-controller/irq.h>
 134     u2phy0: usb2-phy@e450 {
 135       compatible = "rockchip,rk3399-usb2phy";
 136       reg = <0xe450 0x10>;
 137       clocks = <&cru SCLK_USB2PHY0_REF>;
 138       clock-names = "phyclk";
 139       clock-output-names = "clk_usbphy0_480m";
 140       #clock-cells = <0>;
 141       #phy-cells = <0>;
 142
 143       u2phy0_host: host-port {
 144         #phy-cells = <0>;
 145         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
 146         interrupt-names = "linestate";
 147       };
 148
 149       u2phy0_otg: otg-port {
 150         #phy-cells = <0>;
 151         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
 152                      <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
 153                      <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
 154         interrupt-names = "otg-bvalid", "otg-id", "linestate";
 155       };
 156     };