Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 # Copyright (C) 2020 Renesas Electronics Europe GmbH - https://www.renesas.com/eu/en/
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/pci/rcar-pci-ep.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: Renesas R-Car PCIe Endpoint
   9
  10 maintainers:
  11   - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
  12   - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
  13
  14 properties:
  15   compatible:
  16     items:
  17       - const: renesas,r8a774c0-pcie-ep
  18       - const: renesas,rcar-gen3-pcie-ep
  19
  20   reg:
  21     maxItems: 5
  22
  23   reg-names:
  24     items:
  25       - const: apb-base
  26       - const: memory0
  27       - const: memory1
  28       - const: memory2
  29       - const: memory3
  30
  31   power-domains:
  32     maxItems: 1
  33
  34   resets:
  35     maxItems: 1
  36
  37   clocks:
  38     maxItems: 1
  39
  40   clock-names:
  41     items:
  42       - const: pcie
  43
  44   max-functions:
  45     minimum: 1
  46     maximum: 1
  47
  48 required:
  49   - compatible
  50   - reg
  51   - reg-names
  52   - resets
  53   - power-domains
  54   - clocks
  55   - clock-names
  56   - max-functions
  57
  58 examples:
  59   - |
  60     #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
  61     #include <dt-bindings/power/r8a774c0-sysc.h>
  62
  63      pcie0_ep: pcie-ep@fe000000 {
  64             compatible = "renesas,r8a774c0-pcie-ep",
  65                          "renesas,rcar-gen3-pcie-ep";
  66             reg = <0xfe000000 0x80000>,
  67                   <0xfe100000 0x100000>,
  68                   <0xfe200000 0x200000>,
  69                   <0x30000000 0x8000000>,
  70                   <0x38000000 0x8000000>;
  71             reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
  72             resets = <&cpg 319>;
  73             power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
  74             clocks = <&cpg CPG_MOD 319>;
  75             clock-names = "pcie";
  76             max-functions = /bits/ 8 <1>;
  77     };