Documentation/devicetree/bindings/pci/qcom,pcie.txt

   1 * Qualcomm PCI express root complex
   2
   3 - compatible:
   4         Usage: required
   5         Value type: <stringlist>
   6         Definition: Value should contain
   7                         - "qcom,pcie-ipq8064" for ipq8064
   8                         - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
   9                         - "qcom,pcie-apq8064" for apq8064
  10                         - "qcom,pcie-apq8084" for apq8084
  11                         - "qcom,pcie-msm8996" for msm8996 or apq8096
  12                         - "qcom,pcie-ipq4019" for ipq4019
  13                         - "qcom,pcie-ipq8074" for ipq8074
  14                         - "qcom,pcie-qcs404" for qcs404
  15                         - "qcom,pcie-sdm845" for sdm845
  16
  17 - reg:
  18         Usage: required
  19         Value type: <prop-encoded-array>
  20         Definition: Register ranges as listed in the reg-names property
  21
  22 - reg-names:
  23         Usage: required
  24         Value type: <stringlist>
  25         Definition: Must include the following entries
  26                         - "parf"   Qualcomm specific registers
  27                         - "dbi"    DesignWare PCIe registers
  28                         - "elbi"   External local bus interface registers
  29                         - "config" PCIe configuration space
  30
  31 - device_type:
  32         Usage: required
  33         Value type: <string>
  34         Definition: Should be "pci". As specified in designware-pcie.txt
  35
  36 - #address-cells:
  37         Usage: required
  38         Value type: <u32>
  39         Definition: Should be 3. As specified in designware-pcie.txt
  40
  41 - #size-cells:
  42         Usage: required
  43         Value type: <u32>
  44         Definition: Should be 2. As specified in designware-pcie.txt
  45
  46 - ranges:
  47         Usage: required
  48         Value type: <prop-encoded-array>
  49         Definition: As specified in designware-pcie.txt
  50
  51 - interrupts:
  52         Usage: required
  53         Value type: <prop-encoded-array>
  54         Definition: MSI interrupt
  55
  56 - interrupt-names:
  57         Usage: required
  58         Value type: <stringlist>
  59         Definition: Should contain "msi"
  60
  61 - #interrupt-cells:
  62         Usage: required
  63         Value type: <u32>
  64         Definition: Should be 1. As specified in designware-pcie.txt
  65
  66 - interrupt-map-mask:
  67         Usage: required
  68         Value type: <prop-encoded-array>
  69         Definition: As specified in designware-pcie.txt
  70
  71 - interrupt-map:
  72         Usage: required
  73         Value type: <prop-encoded-array>
  74         Definition: As specified in designware-pcie.txt
  75
  76 - clocks:
  77         Usage: required
  78         Value type: <prop-encoded-array>
  79         Definition: List of phandle and clock specifier pairs as listed
  80                     in clock-names property
  81
  82 - clock-names:
  83         Usage: required
  84         Value type: <stringlist>
  85         Definition: Should contain the following entries
  86                         - "iface"       Configuration AHB clock
  87
  88 - clock-names:
  89         Usage: required for ipq/apq8064
  90         Value type: <stringlist>
  91         Definition: Should contain the following entries
  92                         - "core"        Clocks the pcie hw block
  93                         - "phy"         Clocks the pcie PHY block
  94                         - "aux"         Clocks the pcie AUX block
  95                         - "ref"         Clocks the pcie ref block
  96 - clock-names:
  97         Usage: required for apq8084/ipq4019
  98         Value type: <stringlist>
  99         Definition: Should contain the following entries
 100                         - "aux"         Auxiliary (AUX) clock
 101                         - "bus_master"  Master AXI clock
 102                         - "bus_slave"   Slave AXI clock
 103
 104 - clock-names:
 105         Usage: required for msm8996/apq8096
 106         Value type: <stringlist>
 107         Definition: Should contain the following entries
 108                         - "pipe"        Pipe Clock driving internal logic
 109                         - "aux"         Auxiliary (AUX) clock
 110                         - "cfg"         Configuration clock
 111                         - "bus_master"  Master AXI clock
 112                         - "bus_slave"   Slave AXI clock
 113
 114 - clock-names:
 115         Usage: required for ipq8074
 116         Value type: <stringlist>
 117         Definition: Should contain the following entries
 118                         - "iface"       PCIe to SysNOC BIU clock
 119                         - "axi_m"       AXI Master clock
 120                         - "axi_s"       AXI Slave clock
 121                         - "ahb"         AHB clock
 122                         - "aux"         Auxiliary clock
 123
 124 - clock-names:
 125         Usage: required for qcs404
 126         Value type: <stringlist>
 127         Definition: Should contain the following entries
 128                         - "iface"       AHB clock
 129                         - "aux"         Auxiliary clock
 130                         - "master_bus"  AXI Master clock
 131                         - "slave_bus"   AXI Slave clock
 132
 133 -clock-names:
 134         Usage: required for sdm845
 135         Value type: <stringlist>
 136         Definition: Should contain the following entries
 137                         - "aux"         Auxiliary clock
 138                         - "cfg"         Configuration clock
 139                         - "bus_master"  Master AXI clock
 140                         - "bus_slave"   Slave AXI clock
 141                         - "slave_q2a"   Slave Q2A clock
 142                         - "tbu"         PCIe TBU clock
 143                         - "pipe"        PIPE clock
 144
 145 - resets:
 146         Usage: required
 147         Value type: <prop-encoded-array>
 148         Definition: List of phandle and reset specifier pairs as listed
 149                     in reset-names property
 150
 151 - reset-names:
 152         Usage: required for ipq/apq8064
 153         Value type: <stringlist>
 154         Definition: Should contain the following entries
 155                         - "axi"  AXI reset
 156                         - "ahb"  AHB reset
 157                         - "por"  POR reset
 158                         - "pci"  PCI reset
 159                         - "phy"  PHY reset
 160
 161 - reset-names:
 162         Usage: required for apq8084
 163         Value type: <stringlist>
 164         Definition: Should contain the following entries
 165                         - "core" Core reset
 166
 167 - reset-names:
 168         Usage: required for ipq/apq8064
 169         Value type: <stringlist>
 170         Definition: Should contain the following entries
 171                         - "axi_m"               AXI master reset
 172                         - "axi_s"               AXI slave reset
 173                         - "pipe"                PIPE reset
 174                         - "axi_m_vmid"          VMID reset
 175                         - "axi_s_xpu"           XPU reset
 176                         - "parf"                PARF reset
 177                         - "phy"                 PHY reset
 178                         - "axi_m_sticky"        AXI sticky reset
 179                         - "pipe_sticky"         PIPE sticky reset
 180                         - "pwr"                 PWR reset
 181                         - "ahb"                 AHB reset
 182                         - "phy_ahb"             PHY AHB reset
 183                         - "ext"                 EXT reset
 184
 185 - reset-names:
 186         Usage: required for ipq8074
 187         Value type: <stringlist>
 188         Definition: Should contain the following entries
 189                         - "pipe"                PIPE reset
 190                         - "sleep"               Sleep reset
 191                         - "sticky"              Core Sticky reset
 192                         - "axi_m"               AXI Master reset
 193                         - "axi_s"               AXI Slave reset
 194                         - "ahb"                 AHB Reset
 195                         - "axi_m_sticky"        AXI Master Sticky reset
 196
 197 - reset-names:
 198         Usage: required for qcs404
 199         Value type: <stringlist>
 200         Definition: Should contain the following entries
 201                         - "axi_m"               AXI Master reset
 202                         - "axi_s"               AXI Slave reset
 203                         - "axi_m_sticky"        AXI Master Sticky reset
 204                         - "pipe_sticky"         PIPE sticky reset
 205                         - "pwr"                 PWR reset
 206                         - "ahb"                 AHB reset
 207
 208 - reset-names:
 209         Usage: required for sdm845
 210         Value type: <stringlist>
 211         Definition: Should contain the following entries
 212                         - "pci"                 PCIe core reset
 213
 214 - power-domains:
 215         Usage: required for apq8084 and msm8996/apq8096
 216         Value type: <prop-encoded-array>
 217         Definition: A phandle and power domain specifier pair to the
 218                     power domain which is responsible for collapsing
 219                     and restoring power to the peripheral
 220
 221 - vdda-supply:
 222         Usage: required
 223         Value type: <phandle>
 224         Definition: A phandle to the core analog power supply
 225
 226 - vdda_phy-supply:
 227         Usage: required for ipq/apq8064
 228         Value type: <phandle>
 229         Definition: A phandle to the analog power supply for PHY
 230
 231 - vdda_refclk-supply:
 232         Usage: required for ipq/apq8064
 233         Value type: <phandle>
 234         Definition: A phandle to the analog power supply for IC which generates
 235                     reference clock
 236 - vddpe-3v3-supply:
 237         Usage: optional
 238         Value type: <phandle>
 239         Definition: A phandle to the PCIe endpoint power supply
 240
 241 - phys:
 242         Usage: required for apq8084 and qcs404
 243         Value type: <phandle>
 244         Definition: List of phandle(s) as listed in phy-names property
 245
 246 - phy-names:
 247         Usage: required for apq8084 and qcs404
 248         Value type: <stringlist>
 249         Definition: Should contain "pciephy"
 250
 251 - <name>-gpios:
 252         Usage: optional
 253         Value type: <prop-encoded-array>
 254         Definition: List of phandle and GPIO specifier pairs. Should contain
 255                         - "perst-gpios" PCIe endpoint reset signal line
 256                         - "wake-gpios"  PCIe endpoint wake signal line
 257
 258 * Example for ipq/apq8064
 259         pcie@1b500000 {
 260                 compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", "snps,dw-pcie";
 261                 reg = <0x1b500000 0x1000
 262                        0x1b502000 0x80
 263                        0x1b600000 0x100
 264                        0x0ff00000 0x100000>;
 265                 reg-names = "dbi", "elbi", "parf", "config";
 266                 device_type = "pci";
 267                 linux,pci-domain = <0>;
 268                 bus-range = <0x00 0xff>;
 269                 num-lanes = <1>;
 270                 #address-cells = <3>;
 271                 #size-cells = <2>;
 272                 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000   /* I/O */
 273                           0x82000000 0 0 0x08000000 0 0x07e00000>; /* memory */
 274                 interrupts = <GIC_SPI 238 IRQ_TYPE_NONE>;
 275                 interrupt-names = "msi";
 276                 #interrupt-cells = <1>;
 277                 interrupt-map-mask = <0 0 0 0x7>;
 278                 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
 279                                 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
 280                                 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
 281                                 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
 282                 clocks = <&gcc PCIE_A_CLK>,
 283                          <&gcc PCIE_H_CLK>,
 284                          <&gcc PCIE_PHY_CLK>,
 285                          <&gcc PCIE_AUX_CLK>,
 286                          <&gcc PCIE_ALT_REF_CLK>;
 287                 clock-names = "core", "iface", "phy", "aux", "ref";
 288                 resets = <&gcc PCIE_ACLK_RESET>,
 289                          <&gcc PCIE_HCLK_RESET>,
 290                          <&gcc PCIE_POR_RESET>,
 291                          <&gcc PCIE_PCI_RESET>,
 292                          <&gcc PCIE_PHY_RESET>,
 293                          <&gcc PCIE_EXT_RESET>;
 294                 reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
 295                 pinctrl-0 = <&pcie_pins_default>;
 296                 pinctrl-names = "default";
 297         };
 298
 299 * Example for apq8084
 300         pcie0@fc520000 {
 301                 compatible = "qcom,pcie-apq8084", "snps,dw-pcie";
 302                 reg = <0xfc520000 0x2000>,
 303                       <0xff000000 0x1000>,
 304                       <0xff001000 0x1000>,
 305                       <0xff002000 0x2000>;
 306                 reg-names = "parf", "dbi", "elbi", "config";
 307                 device_type = "pci";
 308                 linux,pci-domain = <0>;
 309                 bus-range = <0x00 0xff>;
 310                 num-lanes = <1>;
 311                 #address-cells = <3>;
 312                 #size-cells = <2>;
 313                 ranges = <0x81000000 0 0          0xff200000 0 0x00100000   /* I/O */
 314                           0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; /* memory */
 315                 interrupts = <GIC_SPI 243 IRQ_TYPE_NONE>;
 316                 interrupt-names = "msi";
 317                 #interrupt-cells = <1>;
 318                 interrupt-map-mask = <0 0 0 0x7>;
 319                 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
 320                                 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
 321                                 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
 322                                 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
 323                 clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
 324                          <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
 325                          <&gcc GCC_PCIE_0_SLV_AXI_CLK>,
 326                          <&gcc GCC_PCIE_0_AUX_CLK>;
 327                 clock-names = "iface", "master_bus", "slave_bus", "aux";
 328                 resets = <&gcc GCC_PCIE_0_BCR>;
 329                 reset-names = "core";
 330                 power-domains = <&gcc PCIE0_GDSC>;
 331                 vdda-supply = <&pma8084_l3>;
 332                 phys = <&pciephy0>;
 333                 phy-names = "pciephy";
 334                 perst-gpio = <&tlmm 70 GPIO_ACTIVE_LOW>;
 335                 pinctrl-0 = <&pcie0_pins_default>;
 336                 pinctrl-names = "default";
 337         };