Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Brcmstb PCIe Host Controller Device Tree Bindings
   8
   9 maintainers:
  10   - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
  11
  12 properties:
  13   compatible:
  14     items:
  15       - enum:
  16           - brcm,bcm2711-pcie # The Raspberry Pi 4
  17           - brcm,bcm4908-pcie
  18           - brcm,bcm7211-pcie # Broadcom STB version of RPi4
  19           - brcm,bcm7278-pcie # Broadcom 7278 Arm
  20           - brcm,bcm7216-pcie # Broadcom 7216 Arm
  21           - brcm,bcm7445-pcie # Broadcom 7445 Arm
  22
  23   reg:
  24     maxItems: 1
  25
  26   interrupts:
  27     minItems: 1
  28     maxItems: 2
  29     items:
  30       - description: PCIe host controller
  31       - description: builtin MSI controller
  32
  33   interrupt-names:
  34     minItems: 1
  35     maxItems: 2
  36     items:
  37       - const: pcie
  38       - const: msi
  39
  40   ranges:
  41     minItems: 1
  42     maxItems: 4
  43
  44   dma-ranges:
  45     minItems: 1
  46     maxItems: 6
  47
  48   clocks:
  49     maxItems: 1
  50
  51   clock-names:
  52     items:
  53       - const: sw_pcie
  54
  55   msi-controller:
  56     description: Identifies the node as an MSI controller.
  57
  58   msi-parent:
  59     description: MSI controller the device is capable of using.
  60
  61   brcm,enable-ssc:
  62     description: Indicates usage of spread-spectrum clocking.
  63     type: boolean
  64
  65   aspm-no-l0s: true
  66
  67   brcm,scb-sizes:
  68     description: u64 giving the 64bit PCIe memory
  69       viewport size of a memory controller.  There may be up to
  70       three controllers, and each size must be a power of two
  71       with a size greater or equal to the amount of memory the
  72       controller supports.  Note that each memory controller
  73       may have two component regions -- base and extended -- so
  74       this information cannot be deduced from the dma-ranges.
  75     $ref: /schemas/types.yaml#/definitions/uint64-array
  76     items:
  77       minItems: 1
  78       maxItems: 3
  79
  80 required:
  81   - reg
  82   - ranges
  83   - dma-ranges
  84   - "#interrupt-cells"
  85   - interrupts
  86   - interrupt-names
  87   - interrupt-map-mask
  88   - interrupt-map
  89   - msi-controller
  90
  91 allOf:
  92   - $ref: /schemas/pci/pci-bus.yaml#
  93   - if:
  94       properties:
  95         compatible:
  96           contains:
  97             const: brcm,bcm4908-pcie
  98     then:
  99       properties:
 100         resets:
 101           items:
 102             - description: reset controller handling the PERST# signal
 103
 104         reset-names:
 105           items:
 106             - const: perst
 107
 108       required:
 109         - resets
 110         - reset-names
 111   - if:
 112       properties:
 113         compatible:
 114           contains:
 115             const: brcm,bcm7216-pcie
 116     then:
 117       properties:
 118         resets:
 119           items:
 120             - description: phandle pointing to the RESCAL reset controller
 121
 122         reset-names:
 123           items:
 124             - const: rescal
 125
 126       required:
 127         - resets
 128         - reset-names
 129
 130 unevaluatedProperties: false
 131
 132 examples:
 133   - |
 134     #include <dt-bindings/interrupt-controller/irq.h>
 135     #include <dt-bindings/interrupt-controller/arm-gic.h>
 136
 137     scb {
 138             #address-cells = <2>;
 139             #size-cells = <1>;
 140             pcie0: pcie@7d500000 {
 141                     compatible = "brcm,bcm2711-pcie";
 142                     reg = <0x0 0x7d500000 0x9310>;
 143                     device_type = "pci";
 144                     #address-cells = <3>;
 145                     #size-cells = <2>;
 146                     #interrupt-cells = <1>;
 147                     interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
 148                                  <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 149                     interrupt-names = "pcie", "msi";
 150                     interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 151                     interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 152                     msi-parent = <&pcie0>;
 153                     msi-controller;
 154                     ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
 155                     dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>,
 156                                  <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>;
 157                     brcm,enable-ssc;
 158                     brcm,scb-sizes =  <0x0000000080000000 0x0000000080000000>;
 159             };
 160     };