Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas R-Car CAN FD Controller
   8
   9 maintainers:
  10   - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
  11
  12 properties:
  13   compatible:
  14     oneOf:
  15       - items:
  16           - enum:
  17               - renesas,r8a774a1-canfd     # RZ/G2M
  18               - renesas,r8a774b1-canfd     # RZ/G2N
  19               - renesas,r8a774c0-canfd     # RZ/G2E
  20               - renesas,r8a774e1-canfd     # RZ/G2H
  21               - renesas,r8a7795-canfd      # R-Car H3
  22               - renesas,r8a7796-canfd      # R-Car M3-W
  23               - renesas,r8a77961-canfd     # R-Car M3-W+
  24               - renesas,r8a77965-canfd     # R-Car M3-N
  25               - renesas,r8a77970-canfd     # R-Car V3M
  26               - renesas,r8a77980-canfd     # R-Car V3H
  27               - renesas,r8a77990-canfd     # R-Car E3
  28               - renesas,r8a77995-canfd     # R-Car D3
  29           - const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
  30
  31       - items:
  32           - enum:
  33               - renesas,r8a779a0-canfd     # R-Car V3U
  34               - renesas,r8a779g0-canfd     # R-Car V4H
  35           - const: renesas,rcar-gen4-canfd # R-Car Gen4
  36
  37       - items:
  38           - enum:
  39               - renesas,r9a07g043-canfd    # RZ/G2UL and RZ/Five
  40               - renesas,r9a07g044-canfd    # RZ/G2{L,LC}
  41               - renesas,r9a07g054-canfd    # RZ/V2L
  42           - const: renesas,rzg2l-canfd     # RZ/G2L family
  43
  44   reg:
  45     maxItems: 1
  46
  47   interrupts: true
  48
  49   clocks:
  50     maxItems: 3
  51
  52   clock-names:
  53     items:
  54       - const: fck
  55       - const: canfd
  56       - const: can_clk
  57
  58   power-domains:
  59     maxItems: 1
  60
  61   resets: true
  62
  63   renesas,no-can-fd:
  64     $ref: /schemas/types.yaml#/definitions/flag
  65     description:
  66       The controller can operate in either CAN FD only mode (default) or
  67       Classical CAN only mode.  The mode is global to all channels.
  68       Specify this property to put the controller in Classical CAN only mode.
  69
  70   assigned-clocks:
  71     description:
  72       Reference to the CANFD clock.  The CANFD clock is a div6 clock and can be
  73       used by both CAN (if present) and CAN FD controllers at the same time.
  74       It needs to be scaled to maximum frequency if any of these controllers
  75       use it.
  76
  77   assigned-clock-rates:
  78     description: Maximum frequency of the CANFD clock.
  79
  80 patternProperties:
  81   "^channel[0-7]$":
  82     type: object
  83     description:
  84       The controller supports multiple channels and each is represented as a
  85       child node.  Each channel can be enabled/disabled individually.
  86
  87     properties:
  88       phys:
  89         maxItems: 1
  90
  91     additionalProperties: false
  92
  93 required:
  94   - compatible
  95   - reg
  96   - interrupts
  97   - interrupt-names
  98   - clocks
  99   - clock-names
 100   - power-domains
 101   - resets
 102   - assigned-clocks
 103   - assigned-clock-rates
 104   - channel0
 105   - channel1
 106
 107 allOf:
 108   - $ref: can-controller.yaml#
 109
 110   - if:
 111       properties:
 112         compatible:
 113           contains:
 114             enum:
 115               - renesas,rzg2l-canfd
 116     then:
 117       properties:
 118         interrupts:
 119           items:
 120             - description: CAN global error interrupt
 121             - description: CAN receive FIFO interrupt
 122             - description: CAN0 error interrupt
 123             - description: CAN0 transmit interrupt
 124             - description: CAN0 transmit/receive FIFO receive completion interrupt
 125             - description: CAN1 error interrupt
 126             - description: CAN1 transmit interrupt
 127             - description: CAN1 transmit/receive FIFO receive completion interrupt
 128
 129         interrupt-names:
 130           items:
 131             - const: g_err
 132             - const: g_recc
 133             - const: ch0_err
 134             - const: ch0_rec
 135             - const: ch0_trx
 136             - const: ch1_err
 137             - const: ch1_rec
 138             - const: ch1_trx
 139
 140         resets:
 141           maxItems: 2
 142
 143         reset-names:
 144           items:
 145             - const: rstp_n
 146             - const: rstc_n
 147
 148       required:
 149         - reset-names
 150     else:
 151       properties:
 152         interrupts:
 153           items:
 154             - description: Channel interrupt
 155             - description: Global interrupt
 156
 157         interrupt-names:
 158           items:
 159             - const: ch_int
 160             - const: g_int
 161
 162         resets:
 163           maxItems: 1
 164
 165   - if:
 166       not:
 167         properties:
 168           compatible:
 169             contains:
 170               const: renesas,rcar-gen4-canfd
 171     then:
 172       patternProperties:
 173         "^channel[2-7]$": false
 174
 175 unevaluatedProperties: false
 176
 177 examples:
 178   - |
 179     #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
 180     #include <dt-bindings/interrupt-controller/arm-gic.h>
 181     #include <dt-bindings/power/r8a7795-sysc.h>
 182
 183     canfd: can@e66c0000 {
 184             compatible = "renesas,r8a7795-canfd",
 185                          "renesas,rcar-gen3-canfd";
 186             reg = <0xe66c0000 0x8000>;
 187             interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 188                          <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 189             interrupt-names = "ch_int", "g_int";
 190             clocks = <&cpg CPG_MOD 914>,
 191                      <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 192                      <&can_clk>;
 193             clock-names = "fck", "canfd", "can_clk";
 194             assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 195             assigned-clock-rates = <40000000>;
 196             power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 197             resets = <&cpg 914>;
 198
 199             channel0 {
 200             };
 201
 202             channel1 {
 203             };
 204     };