Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Allwinner A83t EMAC Device Tree Bindings
   8
   9 maintainers:
  10   - Chen-Yu Tsai <wens@csie.org>
  11   - Maxime Ripard <mripard@kernel.org>
  12
  13 properties:
  14   compatible:
  15     oneOf:
  16       - const: allwinner,sun8i-a83t-emac
  17       - const: allwinner,sun8i-h3-emac
  18       - const: allwinner,sun8i-r40-emac
  19       - const: allwinner,sun8i-v3s-emac
  20       - const: allwinner,sun50i-a64-emac
  21       - items:
  22           - const: allwinner,sun50i-h6-emac
  23           - const: allwinner,sun50i-a64-emac
  24
  25   reg:
  26     maxItems: 1
  27
  28   interrupts:
  29     maxItems: 1
  30
  31   interrupt-names:
  32     const: macirq
  33
  34   clocks:
  35     maxItems: 1
  36
  37   clock-names:
  38     const: stmmaceth
  39
  40   syscon:
  41     $ref: /schemas/types.yaml#/definitions/phandle
  42     description:
  43       Phandle to the device containing the EMAC or GMAC clock
  44       register
  45
  46 required:
  47   - compatible
  48   - reg
  49   - interrupts
  50   - interrupt-names
  51   - clocks
  52   - clock-names
  53   - resets
  54   - reset-names
  55   - phy-handle
  56   - phy-mode
  57   - syscon
  58
  59 allOf:
  60   - $ref: "snps,dwmac.yaml#"
  61   - if:
  62       properties:
  63         compatible:
  64           contains:
  65             enum:
  66               - allwinner,sun8i-a83t-emac
  67               - allwinner,sun8i-h3-emac
  68               - allwinner,sun8i-v3s-emac
  69               - allwinner,sun50i-a64-emac
  70
  71     then:
  72       properties:
  73         allwinner,tx-delay-ps:
  74           default: 0
  75           minimum: 0
  76           maximum: 700
  77           multipleOf: 100
  78           description:
  79             External RGMII PHY TX clock delay chain value in ps.
  80
  81         allwinner,rx-delay-ps:
  82           default: 0
  83           minimum: 0
  84           maximum: 3100
  85           multipleOf: 100
  86           description:
  87             External RGMII PHY TX clock delay chain value in ps.
  88
  89   - if:
  90       properties:
  91         compatible:
  92           contains:
  93             enum:
  94               - allwinner,sun8i-r40-emac
  95
  96     then:
  97       properties:
  98         allwinner,rx-delay-ps:
  99           default: 0
 100           minimum: 0
 101           maximum: 700
 102           multipleOf: 100
 103           description:
 104             External RGMII PHY TX clock delay chain value in ps.
 105
 106   - if:
 107       properties:
 108         compatible:
 109           contains:
 110             enum:
 111               - allwinner,sun8i-h3-emac
 112               - allwinner,sun8i-v3s-emac
 113
 114     then:
 115       properties:
 116         allwinner,leds-active-low:
 117           $ref: /schemas/types.yaml#/definitions/flag
 118           description:
 119             EPHY LEDs are active low.
 120
 121         mdio-mux:
 122           type: object
 123
 124           properties:
 125             compatible:
 126               const: allwinner,sun8i-h3-mdio-mux
 127
 128             mdio-parent-bus:
 129               $ref: /schemas/types.yaml#/definitions/phandle
 130               description:
 131                 Phandle to EMAC MDIO.
 132
 133             mdio@1:
 134               type: object
 135               description: Internal MDIO Bus
 136
 137               properties:
 138                 "#address-cells":
 139                   const: 1
 140
 141                 "#size-cells":
 142                   const: 0
 143
 144                 compatible:
 145                   const: allwinner,sun8i-h3-mdio-internal
 146
 147                 reg:
 148                   const: 1
 149
 150               patternProperties:
 151                 "^ethernet-phy@[0-9a-f]$":
 152                   type: object
 153                   description:
 154                     Integrated PHY node
 155
 156                   properties:
 157                     clocks:
 158                       maxItems: 1
 159
 160                     resets:
 161                       maxItems: 1
 162
 163                   required:
 164                     - clocks
 165                     - resets
 166
 167
 168             mdio@2:
 169               type: object
 170               description: External MDIO Bus (H3 only)
 171
 172               properties:
 173                 "#address-cells":
 174                   const: 1
 175
 176                 "#size-cells":
 177                   const: 0
 178
 179                 reg:
 180                   const: 2
 181
 182           required:
 183             - compatible
 184             - mdio-parent-bus
 185             - mdio@1
 186
 187 unevaluatedProperties: false
 188
 189 examples:
 190   - |
 191     ethernet@1c0b000 {
 192         compatible = "allwinner,sun8i-h3-emac";
 193         syscon = <&syscon>;
 194         reg = <0x01c0b000 0x104>;
 195         interrupts = <0 82 1>;
 196         interrupt-names = "macirq";
 197         resets = <&ccu 12>;
 198         reset-names = "stmmaceth";
 199         clocks = <&ccu 27>;
 200         clock-names = "stmmaceth";
 201
 202         phy-handle = <&int_mii_phy>;
 203         phy-mode = "mii";
 204         allwinner,leds-active-low;
 205
 206         mdio1: mdio {
 207             #address-cells = <1>;
 208             #size-cells = <0>;
 209             compatible = "snps,dwmac-mdio";
 210         };
 211
 212         mdio-mux {
 213             compatible = "allwinner,sun8i-h3-mdio-mux";
 214             #address-cells = <1>;
 215             #size-cells = <0>;
 216
 217             mdio-parent-bus = <&mdio1>;
 218
 219             int_mii_phy: mdio@1 {
 220                 compatible = "allwinner,sun8i-h3-mdio-internal";
 221                 reg = <1>;
 222                 #address-cells = <1>;
 223                 #size-cells = <0>;
 224
 225                 ethernet-phy@1 {
 226                     reg = <1>;
 227                     clocks = <&ccu 67>;
 228                     resets = <&ccu 39>;
 229                     phy-is-integrated;
 230                 };
 231             };
 232
 233             mdio@2 {
 234                 reg = <2>;
 235                 #address-cells = <1>;
 236                 #size-cells = <0>;
 237             };
 238         };
 239     };
 240
 241   - |
 242     ethernet@1c0b000 {
 243         compatible = "allwinner,sun8i-h3-emac";
 244         syscon = <&syscon>;
 245         reg = <0x01c0b000 0x104>;
 246         interrupts = <0 82 1>;
 247         interrupt-names = "macirq";
 248         resets = <&ccu 12>;
 249         reset-names = "stmmaceth";
 250         clocks = <&ccu 27>;
 251         clock-names = "stmmaceth";
 252
 253         phy-handle = <&ext_rgmii_phy>;
 254         phy-mode = "rgmii";
 255         allwinner,leds-active-low;
 256
 257         mdio2: mdio {
 258             #address-cells = <1>;
 259             #size-cells = <0>;
 260             compatible = "snps,dwmac-mdio";
 261         };
 262
 263         mdio-mux {
 264             compatible = "allwinner,sun8i-h3-mdio-mux";
 265             #address-cells = <1>;
 266             #size-cells = <0>;
 267             mdio-parent-bus = <&mdio2>;
 268
 269             mdio@1 {
 270                 compatible = "allwinner,sun8i-h3-mdio-internal";
 271                 reg = <1>;
 272                 #address-cells = <1>;
 273                 #size-cells = <0>;
 274
 275                 ethernet-phy@1 {
 276                     reg = <1>;
 277                     clocks = <&ccu 67>;
 278                     resets = <&ccu 39>;
 279                 };
 280             };
 281
 282             mdio@2 {
 283                 reg = <2>;
 284                 #address-cells = <1>;
 285                 #size-cells = <0>;
 286
 287                 ext_rgmii_phy: ethernet-phy@1 {
 288                     reg = <1>;
 289                 };
 290             };
 291         };
 292     };
 293
 294   - |
 295     ethernet@1c0b000 {
 296         compatible = "allwinner,sun8i-a83t-emac";
 297         syscon = <&syscon>;
 298         reg = <0x01c0b000 0x104>;
 299         interrupts = <0 82 1>;
 300         interrupt-names = "macirq";
 301         resets = <&ccu 13>;
 302         reset-names = "stmmaceth";
 303         clocks = <&ccu 27>;
 304         clock-names = "stmmaceth";
 305         phy-handle = <&ext_rgmii_phy1>;
 306         phy-mode = "rgmii";
 307
 308         mdio {
 309             compatible = "snps,dwmac-mdio";
 310             #address-cells = <1>;
 311             #size-cells = <0>;
 312
 313             ext_rgmii_phy1: ethernet-phy@1 {
 314                 reg = <1>;
 315             };
 316         };
 317     };
 318
 319 ...