Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Rockchip SoCs NAND FLASH Controller (NFC)
   8
   9 allOf:
  10   - $ref: nand-controller.yaml#
  11
  12 maintainers:
  13   - Heiko Stuebner <heiko@sntech.de>
  14
  15 properties:
  16   compatible:
  17     oneOf:
  18       - const: rockchip,px30-nfc
  19       - const: rockchip,rk2928-nfc
  20       - const: rockchip,rv1108-nfc
  21       - items:
  22           - enum:
  23               - rockchip,rk3036-nfc
  24               - rockchip,rk3128-nfc
  25           - const: rockchip,rk2928-nfc
  26       - items:
  27           - const: rockchip,rk3308-nfc
  28           - const: rockchip,rv1108-nfc
  29
  30   reg:
  31     maxItems: 1
  32
  33   interrupts:
  34     maxItems: 1
  35
  36   clocks:
  37     minItems: 1
  38     items:
  39       - description: Bus Clock
  40       - description: Module Clock
  41
  42   clock-names:
  43     minItems: 1
  44     items:
  45       - const: ahb
  46       - const: nfc
  47
  48   assigned-clocks:
  49     maxItems: 1
  50
  51   assigned-clock-rates:
  52     maxItems: 1
  53
  54   power-domains:
  55     maxItems: 1
  56
  57 patternProperties:
  58   "^nand@[0-7]$":
  59     type: object
  60     $ref: raw-nand-chip.yaml
  61     properties:
  62       reg:
  63         minimum: 0
  64         maximum: 7
  65
  66       nand-ecc-mode:
  67         const: hw
  68
  69       nand-ecc-step-size:
  70         const: 1024
  71
  72       nand-ecc-strength:
  73         enum: [16, 24, 40, 60, 70]
  74         description: |
  75           The ECC configurations that can be supported are as follows.
  76             NFC v600 ECC 16, 24, 40, 60
  77               RK2928, RK3066, RK3188
  78
  79             NFC v622 ECC 16, 24, 40, 60
  80               RK3036, RK3128
  81
  82             NFC v800 ECC 16
  83               RK3308, RV1108
  84
  85             NFC v900 ECC 16, 40, 60, 70
  86               RK3326, PX30
  87
  88       nand-bus-width:
  89         const: 8
  90
  91       rockchip,boot-blks:
  92         $ref: /schemas/types.yaml#/definitions/uint32
  93         minimum: 2
  94         default: 16
  95         description:
  96           The NFC driver need this information to select ECC
  97           algorithms supported by the boot ROM.
  98           Only used in combination with 'nand-is-boot-medium'.
  99
 100       rockchip,boot-ecc-strength:
 101         enum: [16, 24, 40, 60, 70]
 102         $ref: /schemas/types.yaml#/definitions/uint32
 103         description: |
 104           If specified it indicates that a different BCH/ECC setting is
 105           supported by the boot ROM.
 106             NFC v600 ECC 16, 24
 107               RK2928, RK3066, RK3188
 108
 109             NFC v622 ECC 16, 24, 40, 60
 110               RK3036, RK3128
 111
 112             NFC v800 ECC 16
 113               RK3308, RV1108
 114
 115             NFC v900 ECC 16, 70
 116               RK3326, PX30
 117
 118           Only used in combination with 'nand-is-boot-medium'.
 119
 120     unevaluatedProperties: false
 121
 122 required:
 123   - compatible
 124   - reg
 125   - interrupts
 126   - clocks
 127   - clock-names
 128
 129 unevaluatedProperties: false
 130
 131 examples:
 132   - |
 133     #include <dt-bindings/clock/rk3308-cru.h>
 134     #include <dt-bindings/interrupt-controller/arm-gic.h>
 135     nfc: nand-controller@ff4b0000 {
 136       compatible = "rockchip,rk3308-nfc",
 137                    "rockchip,rv1108-nfc";
 138       reg = <0xff4b0000 0x4000>;
 139       interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 140       clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
 141       clock-names = "ahb", "nfc";
 142       assigned-clocks = <&clks SCLK_NANDC>;
 143       assigned-clock-rates = <150000000>;
 144
 145       pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0
 146                    &flash_rdn &flash_rdy &flash_wrn>;
 147       pinctrl-names = "default";
 148
 149       #address-cells = <1>;
 150       #size-cells = <0>;
 151
 152       nand@0 {
 153         reg = <0>;
 154         label = "rk-nand";
 155         nand-bus-width = <8>;
 156         nand-ecc-mode = "hw";
 157         nand-ecc-step-size = <1024>;
 158         nand-ecc-strength = <16>;
 159         nand-is-boot-medium;
 160         rockchip,boot-blks = <8>;
 161         rockchip,boot-ecc-strength = <16>;
 162       };
 163     };
 164
 165 ...