Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 # Copyright (c) 2020 MediaTek Inc.
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: SMI (Smart Multimedia Interface) Local Arbiter
   9
  10 maintainers:
  11   - Yong Wu <yong.wu@mediatek.com>
  12
  13 description: |
  14   The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
  15
  16 properties:
  17   compatible:
  18     oneOf:
  19       - enum:
  20           - mediatek,mt2701-smi-larb
  21           - mediatek,mt2712-smi-larb
  22           - mediatek,mt6779-smi-larb
  23           - mediatek,mt8167-smi-larb
  24           - mediatek,mt8173-smi-larb
  25           - mediatek,mt8183-smi-larb
  26           - mediatek,mt8192-smi-larb
  27           - mediatek,mt8195-smi-larb
  28
  29       - description: for mt7623
  30         items:
  31           - const: mediatek,mt7623-smi-larb
  32           - const: mediatek,mt2701-smi-larb
  33
  34   reg:
  35     maxItems: 1
  36
  37   clocks:
  38     description: |
  39       apb and smi are mandatory. gals(global async local sync) is optional.
  40     minItems: 2
  41     items:
  42       - description: apb is Advanced Peripheral Bus clock, It's the clock for
  43           setting the register.
  44       - description: smi is the clock for transfer data and command.
  45       - description: the clock for gals.
  46
  47   clock-names:
  48     minItems: 2
  49     maxItems: 3
  50
  51   power-domains:
  52     maxItems: 1
  53
  54   mediatek,smi:
  55     $ref: /schemas/types.yaml#/definitions/phandle
  56     description: a phandle to the smi_common node.
  57
  58   mediatek,larb-id:
  59     $ref: /schemas/types.yaml#/definitions/uint32
  60     minimum: 0
  61     maximum: 31
  62     description: the hardware id of this larb. It's only required when this
  63       hardward id is not consecutive from its M4U point of view.
  64
  65 required:
  66   - compatible
  67   - reg
  68   - clocks
  69   - clock-names
  70   - power-domains
  71
  72 allOf:
  73   - if:  # HW has gals
  74       properties:
  75         compatible:
  76           enum:
  77             - mediatek,mt8183-smi-larb
  78             - mediatek,mt8195-smi-larb
  79
  80     then:
  81       properties:
  82         clock:
  83           items:
  84             minItems: 3
  85             maxItems: 3
  86         clock-names:
  87           items:
  88             - const: apb
  89             - const: smi
  90             - const: gals
  91
  92     else:
  93       properties:
  94         clock:
  95           items:
  96             minItems: 2
  97             maxItems: 2
  98         clock-names:
  99           items:
 100             - const: apb
 101             - const: smi
 102
 103   - if:
 104       properties:
 105         compatible:
 106           contains:
 107             enum:
 108               - mediatek,mt2701-smi-larb
 109               - mediatek,mt2712-smi-larb
 110               - mediatek,mt6779-smi-larb
 111               - mediatek,mt8167-smi-larb
 112               - mediatek,mt8192-smi-larb
 113               - mediatek,mt8195-smi-larb
 114
 115     then:
 116       required:
 117         - mediatek,larb-id
 118
 119 additionalProperties: false
 120
 121 examples:
 122   - |+
 123     #include <dt-bindings/clock/mt8173-clk.h>
 124     #include <dt-bindings/power/mt8173-power.h>
 125
 126     larb1: larb@16010000 {
 127       compatible = "mediatek,mt8173-smi-larb";
 128       reg = <0x16010000 0x1000>;
 129       mediatek,smi = <&smi_common>;
 130       power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
 131       clocks = <&vdecsys CLK_VDEC_CKEN>,
 132                <&vdecsys CLK_VDEC_LARB_CKEN>;
 133       clock-names = "apb", "smi";
 134     };