Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/media/nxp,imx8-jpeg.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: i.MX8QXP/QM JPEG decoder/encoder Device Tree Bindings
   8
   9 maintainers:
  10   - Mirela Rabulea <mirela.rabulea@nxp.com>
  11
  12 description: |-
  13   The JPEG decoder/encoder present in iMX8QXP and iMX8QM SoCs is an
  14   ISO/IEC 10918-1 JPEG standard compliant decoder/encoder, for Baseline
  15   and Extended Sequential DCT modes.
  16
  17 properties:
  18   compatible:
  19     items:
  20       - enum:
  21             # JPEG decoder
  22           - nxp,imx8qxp-jpgdec
  23             # JPEG encoder
  24           - nxp,imx8qxp-jpgenc
  25
  26   reg:
  27     maxItems: 1
  28
  29   interrupts:
  30     description: |
  31       There are 4 slots available in the IP, which the driver may use
  32       If a certain slot is used, it should have an associated interrupt
  33       The interrupt with index i is assumed to be for slot i
  34     minItems: 1               # At least one slot is needed by the driver
  35     maxItems: 4               # The IP has 4 slots available for use
  36
  37   power-domains:
  38     description:
  39       List of phandle and PM domain specifier as documented in
  40       Documentation/devicetree/bindings/power/power_domain.txt
  41     minItems: 2               # Wrapper and 1 slot
  42     maxItems: 5               # Wrapper and 4 slots
  43
  44 required:
  45   - compatible
  46   - reg
  47   - interrupts
  48   - power-domains
  49
  50 additionalProperties: false
  51
  52 examples:
  53   - |
  54     #include <dt-bindings/interrupt-controller/arm-gic.h>
  55     #include <dt-bindings/firmware/imx/rsrc.h>
  56
  57     jpegdec: jpegdec@58400000 {
  58         compatible = "nxp,imx8qxp-jpgdec";
  59         reg = <0x58400000 0x00050000 >;
  60         interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
  61                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
  62                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
  63                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
  64         power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
  65                         <&pd IMX_SC_R_MJPEG_DEC_S0>,
  66                         <&pd IMX_SC_R_MJPEG_DEC_S1>,
  67                         <&pd IMX_SC_R_MJPEG_DEC_S2>,
  68                         <&pd IMX_SC_R_MJPEG_DEC_S3>;
  69     };
  70
  71     jpegenc: jpegenc@58450000 {
  72         compatible = "nxp,imx8qxp-jpgenc";
  73         reg = <0x58450000 0x00050000 >;
  74         interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
  75                      <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
  76                      <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
  77                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
  78         power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
  79                         <&pd IMX_SC_R_MJPEG_ENC_S0>,
  80                         <&pd IMX_SC_R_MJPEG_ENC_S1>,
  81                         <&pd IMX_SC_R_MJPEG_ENC_S2>,
  82                         <&pd IMX_SC_R_MJPEG_ENC_S3>;
  83     };
  84 ...