1 Device tree configuration for the Mellanox I2C SMBus on BlueField SoCs
5 - compatible : should be "mellanox,i2c-mlxbf1" or "mellanox,i2c-mlxbf2".
7 - reg : address offset and length of the device registers. The
8 registers consist of the following set of resources:
9 1) Smbus block registers.
10 2) Cause master registers.
11 3) Cause slave registers.
12 4) Cause coalesce registers (if compatible isn't set
13 to "mellanox,i2c-mlxbf1").
15 - interrupts : interrupt number.
19 - clock-frequency : bus frequency used to configure timing registers;
20 allowed values are 100000, 400000 and 1000000;
21 those are expressed in Hz. Default is 100000.
26 compatible = "mellanox,i2c-mlxbf1";
27 reg = <0x02804000 0x800>,
31 clock-frequency = <100000>;
35 compatible = "mellanox,i2c-mlxbf2";
36 reg = <0x02808800 0x600>,
41 clock-frequency = <400000>;