Merge tag 'for-5.15/io_uring-2021-09-04' of git://git.kernel.dk/linux-block
[linux-2.6-microblaze.git] / Documentation / devicetree / bindings / fpga / xilinx-slave-serial.txt
1 Xilinx Slave Serial SPI FPGA Manager
2
3 Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the
4 bitstream over what is referred to as "slave serial" interface.
5 The slave serial link is not technically SPI, and might require extra
6 circuits in order to play nicely with other SPI slaves on the same bus.
7
8 See:
9 - https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
10 - https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
11 - https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
12
13 Required properties:
14 - compatible: should contain "xlnx,fpga-slave-serial"
15 - reg: spi chip select of the FPGA
16 - prog_b-gpios: config pin (referred to as PROGRAM_B in the manual)
17 - done-gpios: config status pin (referred to as DONE in the manual)
18
19 Optional properties:
20 - init-b-gpios: initialization status and configuration error pin
21                 (referred to as INIT_B in the manual)
22
23 Example for full FPGA configuration:
24
25         fpga-region0 {
26                 compatible = "fpga-region";
27                 fpga-mgr = <&fpga_mgr_spi>;
28                 #address-cells = <0x1>;
29                 #size-cells = <0x1>;
30         };
31
32         spi1: spi@10680 {
33                 compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
34                 pinctrl-0 = <&spi0_pins>;
35                 pinctrl-names = "default";
36                 #address-cells = <1>;
37                 #size-cells = <0>;
38                 cell-index = <1>;
39                 interrupts = <92>;
40                 clocks = <&coreclk 0>;
41
42                 fpga_mgr_spi: fpga-mgr@0 {
43                         compatible = "xlnx,fpga-slave-serial";
44                         spi-max-frequency = <60000000>;
45                         spi-cpha;
46                         reg = <0>;
47                         prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
48                         init-b-gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
49                         done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
50                 };
51         };