Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/dma/renesas,rcar-dmac.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas R-Car and RZ/G DMA Controller
   8
   9 maintainers:
  10   - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
  11
  12 allOf:
  13   - $ref: "dma-controller.yaml#"
  14
  15 properties:
  16   compatible:
  17     oneOf:
  18       - items:
  19           - enum:
  20               - renesas,dmac-r8a7742  # RZ/G1H
  21               - renesas,dmac-r8a7743  # RZ/G1M
  22               - renesas,dmac-r8a7744  # RZ/G1N
  23               - renesas,dmac-r8a7745  # RZ/G1E
  24               - renesas,dmac-r8a77470 # RZ/G1C
  25               - renesas,dmac-r8a774a1 # RZ/G2M
  26               - renesas,dmac-r8a774b1 # RZ/G2N
  27               - renesas,dmac-r8a774c0 # RZ/G2E
  28               - renesas,dmac-r8a774e1 # RZ/G2H
  29               - renesas,dmac-r8a7790  # R-Car H2
  30               - renesas,dmac-r8a7791  # R-Car M2-W
  31               - renesas,dmac-r8a7792  # R-Car V2H
  32               - renesas,dmac-r8a7793  # R-Car M2-N
  33               - renesas,dmac-r8a7794  # R-Car E2
  34               - renesas,dmac-r8a7795  # R-Car H3
  35               - renesas,dmac-r8a7796  # R-Car M3-W
  36               - renesas,dmac-r8a77961 # R-Car M3-W+
  37               - renesas,dmac-r8a77965 # R-Car M3-N
  38               - renesas,dmac-r8a77970 # R-Car V3M
  39               - renesas,dmac-r8a77980 # R-Car V3H
  40               - renesas,dmac-r8a77990 # R-Car E3
  41               - renesas,dmac-r8a77995 # R-Car D3
  42           - const: renesas,rcar-dmac
  43
  44       - items:
  45           - const: renesas,dmac-r8a779a0 # R-Car V3U
  46
  47   reg: true
  48
  49   interrupts:
  50     minItems: 9
  51     maxItems: 17
  52
  53   interrupt-names:
  54     minItems: 9
  55     maxItems: 17
  56     items:
  57       - const: error
  58       - pattern: "^ch([0-9]|1[0-5])$"
  59       - pattern: "^ch([0-9]|1[0-5])$"
  60       - pattern: "^ch([0-9]|1[0-5])$"
  61       - pattern: "^ch([0-9]|1[0-5])$"
  62       - pattern: "^ch([0-9]|1[0-5])$"
  63       - pattern: "^ch([0-9]|1[0-5])$"
  64       - pattern: "^ch([0-9]|1[0-5])$"
  65       - pattern: "^ch([0-9]|1[0-5])$"
  66       - pattern: "^ch([0-9]|1[0-5])$"
  67       - pattern: "^ch([0-9]|1[0-5])$"
  68       - pattern: "^ch([0-9]|1[0-5])$"
  69       - pattern: "^ch([0-9]|1[0-5])$"
  70       - pattern: "^ch([0-9]|1[0-5])$"
  71       - pattern: "^ch([0-9]|1[0-5])$"
  72       - pattern: "^ch([0-9]|1[0-5])$"
  73       - pattern: "^ch([0-9]|1[0-5])$"
  74
  75   clocks:
  76     maxItems: 1
  77
  78   clock-names:
  79     items:
  80       - const: fck
  81
  82   '#dma-cells':
  83     const: 1
  84     description:
  85       The cell specifies the MID/RID of the DMAC port connected to
  86       the DMA client.
  87
  88   dma-channels:
  89     minimum: 8
  90     maximum: 16
  91
  92   dma-channel-mask: true
  93
  94   iommus:
  95     minItems: 8
  96     maxItems: 16
  97
  98   power-domains:
  99     maxItems: 1
 100
 101   resets:
 102     maxItems: 1
 103
 104 required:
 105   - compatible
 106   - reg
 107   - interrupts
 108   - interrupt-names
 109   - clocks
 110   - clock-names
 111   - '#dma-cells'
 112   - dma-channels
 113   - power-domains
 114   - resets
 115
 116 if:
 117   properties:
 118     compatible:
 119       contains:
 120         enum:
 121           - renesas,dmac-r8a779a0
 122 then:
 123   properties:
 124     reg:
 125       items:
 126         - description: Base register block
 127         - description: Channel register block
 128 else:
 129   properties:
 130     reg:
 131       maxItems: 1
 132
 133 additionalProperties: false
 134
 135 examples:
 136   - |
 137     #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
 138     #include <dt-bindings/interrupt-controller/arm-gic.h>
 139     #include <dt-bindings/power/r8a7790-sysc.h>
 140
 141     dmac0: dma-controller@e6700000 {
 142         compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
 143         reg = <0xe6700000 0x20000>;
 144         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
 145                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 146                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 147                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 148                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 149                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 150                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 151                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 152                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 153                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 154                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 155                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 156                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 157                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 158                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 159                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 160         interrupt-names = "error",
 161                           "ch0", "ch1", "ch2", "ch3",
 162                           "ch4", "ch5", "ch6", "ch7",
 163                           "ch8", "ch9", "ch10", "ch11",
 164                           "ch12", "ch13", "ch14";
 165         clocks = <&cpg CPG_MOD 219>;
 166         clock-names = "fck";
 167         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 168         resets = <&cpg 219>;
 169         #dma-cells = <1>;
 170         dma-channels = <15>;
 171     };