1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019 Texas Instruments Incorporated
5 $id: "http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Texas Instruments AM65x Display Subsystem
11 - Jyri Sarha <jsarha@ti.com>
12 - Tomi Valkeinen <tomi.valkeinen@ti.com>
15 The AM65x TI Keystone Display SubSystem with two output ports and
16 two video planes. The first video port supports OLDI and the second
17 supports DPI format. The fist plane is full video plane with all
18 features and the second is a "lite plane" without scaling support.
26 Addresses to each DSS memory region described in the SoC's TRM.
28 - description: common DSS register area
29 - description: VIDL1 light video plane
30 - description: VID video plane
31 - description: OVR1 overlay manager for vp1
32 - description: OVR2 overlay manager for vp2
33 - description: VP1 video port 1
34 - description: VP2 video port 2
48 - description: fck DSS functional clock
49 - description: vp1 Video Port 1 pixel clock
50 - description: vp2 Video Port 2 pixel clock
62 assigned-clock-parents:
71 description: phandle to the associated power domain
79 Ports as described in Documentation/devicetree/bindings/graph.txt
90 The DSS OLDI output port node form video port 1
95 The DSS DPI output port node from video port 2
101 ti,am65x-oldi-io-ctrl:
102 $ref: "/schemas/types.yaml#/definitions/phandle-array"
105 phandle to syscon device node mapping OLDI IO_CTRL registers.
106 The mapped range should point to OLDI_DAT0_IO_CTRL, map it and
107 following OLDI_DAT1_IO_CTRL, OLDI_DAT2_IO_CTRL, OLDI_DAT3_IO_CTRL,
108 and OLDI_CLK_IO_CTRL registers. This property is needed for OLDI
111 max-memory-bandwidth:
112 $ref: /schemas/types.yaml#/definitions/uint32
114 Input memory (from main memory to dispc) bandwidth limit in
126 additionalProperties: false
130 #include <dt-bindings/interrupt-controller/arm-gic.h>
131 #include <dt-bindings/interrupt-controller/irq.h>
132 #include <dt-bindings/soc/ti,sci_pm_domain.h>
135 compatible = "ti,am65x-dss";
136 reg = <0x04a00000 0x1000>, /* common */
137 <0x04a02000 0x1000>, /* vidl1 */
138 <0x04a06000 0x1000>, /* vid */
139 <0x04a07000 0x1000>, /* ovr1 */
140 <0x04a08000 0x1000>, /* ovr2 */
141 <0x04a0a000 0x1000>, /* vp1 */
142 <0x04a0b000 0x1000>; /* vp2 */
143 reg-names = "common", "vidl1", "vid",
144 "ovr1", "ovr2", "vp1", "vp2";
145 ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
146 power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
147 clocks = <&k3_clks 67 1>,
150 clock-names = "fck", "vp1", "vp2";
151 interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
153 #address-cells = <1>;
157 oldi_out0: endpoint {
158 remote-endpoint = <&lcd_in0>;