1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner R40 TCON TOP Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 TCON TOPs main purpose is to configure whole display pipeline. It
15 determines relationships between mixers and TCONs, selects source
16 TCON for HDMI, muxes LCD and TV encoder GPIO output, selects TV
17 encoder clock source and contains additional TV TCON and DSI gates.
19 It allows display pipeline to be configured in very different ways:
25 \ / [1] TCON-LCD1 - LCD1/LVDS1
27 / \ [2] TCON-TV0 [0] - TVE0/RGB
31 \ [3] TCON-TV1 [1] - TVE1/RGB
33 Note that both TCON TOP references same physical unit. Both mixers
34 can be connected to any TCON. Not all TCON TOP variants support all
43 - allwinner,sun8i-r40-tcon-top
44 - allwinner,sun50i-h6-tcon-top
52 - description: The TCON TOP interface clock
53 - description: The TCON TOP TV0 clock
54 - description: The TCON TOP TVE0 clock
55 - description: The TCON TOP TV1 clock
56 - description: The TCON TOP TVE1 clock
57 - description: The TCON TOP MIPI DSI clock
73 The first item is the name of the clock created for the TV0
74 channel, the second item is the name of the TCON TV1 channel
75 clock and the third one is the name of the DSI channel clock.
81 $ref: /schemas/graph.yaml#/properties/ports
85 $ref: /schemas/graph.yaml#/properties/port
87 Input endpoint for Mixer 0 mux.
90 $ref: /schemas/graph.yaml#/properties/port
92 Output endpoint for Mixer 0 mux
95 $ref: /schemas/graph.yaml#/properties/port
97 Input endpoint for Mixer 1 mux.
100 $ref: /schemas/graph.yaml#/properties/port
102 Output endpoint for Mixer 1 mux
105 $ref: /schemas/graph.yaml#/properties/port
107 Input endpoint for HDMI mux.
110 $ref: /schemas/graph.yaml#/properties/port
112 Output endpoint for HDMI mux
130 additionalProperties: false
136 const: allwinner,sun50i-h6-tcon-top
161 #include <dt-bindings/interrupt-controller/arm-gic.h>
163 #include <dt-bindings/clock/sun8i-r40-ccu.h>
164 #include <dt-bindings/reset/sun8i-r40-ccu.h>
166 tcon_top: tcon-top@1c70000 {
167 compatible = "allwinner,sun8i-r40-tcon-top";
168 reg = <0x01c70000 0x1000>;
169 clocks = <&ccu CLK_BUS_TCON_TOP>,
181 clock-output-names = "tcon-top-tv0",
184 resets = <&ccu RST_BUS_TCON_TOP>;
188 #address-cells = <1>;
191 tcon_top_mixer0_in: port@0 {
194 tcon_top_mixer0_in_mixer0: endpoint {
195 remote-endpoint = <&mixer0_out_tcon_top>;
199 tcon_top_mixer0_out: port@1 {
200 #address-cells = <1>;
204 tcon_top_mixer0_out_tcon_lcd0: endpoint@0 {
208 tcon_top_mixer0_out_tcon_lcd1: endpoint@1 {
212 tcon_top_mixer0_out_tcon_tv0: endpoint@2 {
214 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>;
217 tcon_top_mixer0_out_tcon_tv1: endpoint@3 {
219 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer0>;
223 tcon_top_mixer1_in: port@2 {
224 #address-cells = <1>;
228 tcon_top_mixer1_in_mixer1: endpoint@1 {
230 remote-endpoint = <&mixer1_out_tcon_top>;
234 tcon_top_mixer1_out: port@3 {
235 #address-cells = <1>;
239 tcon_top_mixer1_out_tcon_lcd0: endpoint@0 {
243 tcon_top_mixer1_out_tcon_lcd1: endpoint@1 {
247 tcon_top_mixer1_out_tcon_tv0: endpoint@2 {
249 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>;
252 tcon_top_mixer1_out_tcon_tv1: endpoint@3 {
254 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer1>;
258 tcon_top_hdmi_in: port@4 {
259 #address-cells = <1>;
263 tcon_top_hdmi_in_tcon_tv0: endpoint@0 {
265 remote-endpoint = <&tcon_tv0_out_tcon_top>;
268 tcon_top_hdmi_in_tcon_tv1: endpoint@1 {
270 remote-endpoint = <&tcon_tv1_out_tcon_top>;
274 tcon_top_hdmi_out: port@5 {
277 tcon_top_hdmi_out_hdmi: endpoint {
278 remote-endpoint = <&hdmi_in_tcon_top>;