Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Allwinner A10 HDMI Controller Device Tree Bindings
   8
   9 description: |
  10   The HDMI Encoder supports the HDMI video and audio outputs, and does
  11   CEC. It is one end of the pipeline.
  12
  13 maintainers:
  14   - Chen-Yu Tsai <wens@csie.org>
  15   - Maxime Ripard <mripard@kernel.org>
  16
  17 properties:
  18   compatible:
  19     oneOf:
  20       - const: allwinner,sun4i-a10-hdmi
  21       - const: allwinner,sun5i-a10s-hdmi
  22       - const: allwinner,sun6i-a31-hdmi
  23       - items:
  24           - const: allwinner,sun7i-a20-hdmi
  25           - const: allwinner,sun5i-a10s-hdmi
  26
  27   reg:
  28     maxItems: 1
  29
  30   interrupts:
  31     maxItems: 1
  32
  33   clocks:
  34     oneOf:
  35       - items:
  36           - description: The HDMI interface clock
  37           - description: The HDMI module clock
  38           - description: The first video PLL
  39           - description: The second video PLL
  40
  41       - items:
  42           - description: The HDMI interface clock
  43           - description: The HDMI module clock
  44           - description: The HDMI DDC clock
  45           - description: The first video PLL
  46           - description: The second video PLL
  47
  48   clock-names:
  49     oneOf:
  50       - items:
  51           - const: ahb
  52           - const: mod
  53           - const: pll-0
  54           - const: pll-1
  55
  56       - items:
  57           - const: ahb
  58           - const: mod
  59           - const: ddc
  60           - const: pll-0
  61           - const: pll-1
  62
  63   resets:
  64     maxItems: 1
  65
  66   dmas:
  67     items:
  68       - description: DDC Transmission DMA Channel
  69       - description: DDC Reception DMA Channel
  70       - description: Audio Transmission DMA Channel
  71
  72   dma-names:
  73     items:
  74       - const: ddc-tx
  75       - const: ddc-rx
  76       - const: audio-tx
  77
  78   ports:
  79     $ref: /schemas/graph.yaml#/properties/ports
  80
  81     properties:
  82       port@0:
  83         $ref: /schemas/graph.yaml#/properties/port
  84         description: |
  85           Input endpoints of the controller.
  86
  87       port@1:
  88         $ref: /schemas/graph.yaml#/properties/port
  89         description: |
  90           Output endpoints of the controller. Usually an HDMI
  91           connector.
  92
  93     required:
  94       - port@0
  95       - port@1
  96
  97 required:
  98   - compatible
  99   - reg
 100   - interrupts
 101   - clocks
 102   - clock-names
 103   - dmas
 104   - dma-names
 105
 106 if:
 107   properties:
 108     compatible:
 109       contains:
 110         const: allwinner,sun6i-a31-hdmi
 111
 112 then:
 113   properties:
 114     clocks:
 115       minItems: 5
 116
 117     clock-names:
 118       minItems: 5
 119
 120   required:
 121     - resets
 122
 123 additionalProperties: false
 124
 125 examples:
 126   - |
 127     #include <dt-bindings/clock/sun4i-a10-ccu.h>
 128     #include <dt-bindings/dma/sun4i-a10.h>
 129     #include <dt-bindings/reset/sun4i-a10-ccu.h>
 130
 131     hdmi: hdmi@1c16000 {
 132         compatible = "allwinner,sun4i-a10-hdmi";
 133         reg = <0x01c16000 0x1000>;
 134         interrupts = <58>;
 135         clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
 136                  <&ccu CLK_PLL_VIDEO0_2X>,
 137                  <&ccu CLK_PLL_VIDEO1_2X>;
 138         clock-names = "ahb", "mod", "pll-0", "pll-1";
 139         dmas = <&dma SUN4I_DMA_NORMAL 16>,
 140                <&dma SUN4I_DMA_NORMAL 16>,
 141                <&dma SUN4I_DMA_DEDICATED 24>;
 142         dma-names = "ddc-tx", "ddc-rx", "audio-tx";
 143
 144         ports {
 145             #address-cells = <1>;
 146             #size-cells = <0>;
 147
 148             hdmi_in: port@0 {
 149                 #address-cells = <1>;
 150                 #size-cells = <0>;
 151                 reg = <0>;
 152
 153                 hdmi_in_tcon0: endpoint@0 {
 154                     reg = <0>;
 155                     remote-endpoint = <&tcon0_out_hdmi>;
 156                 };
 157
 158                 hdmi_in_tcon1: endpoint@1 {
 159                     reg = <1>;
 160                     remote-endpoint = <&tcon1_out_hdmi>;
 161                 };
 162             };
 163
 164             hdmi_out: port@1 {
 165                 reg = <1>;
 166             };
 167         };
 168     };
 169
 170 ...