1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/ingenic,cgu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs CGU devicetree bindings
10 The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
11 typically includes a variety of PLLs, multiplexers, dividers & gates in order
12 to provide many different clock signals derived from only 2 external source
16 - Paul Cercueil <paul@crapouillou.net>
36 pattern: "^clock-controller@[0-9a-f]+$"
68 - description: External oscillator clock
69 - description: Internal 32 kHz RTC clock
76 - osc32k # Different name, same clock
82 assigned-clock-parents:
98 "^usb-phy@[a-f0-9]+$":
99 allOf: [ $ref: "../phy/ingenic,phy-usb.yaml#" ]
100 "^mac-phy-ctrl@[a-f0-9]+$":
101 allOf: [ $ref: "../net/ingenic,mac.yaml#" ]
103 additionalProperties: false
107 #include <dt-bindings/clock/jz4770-cgu.h>
108 cgu: clock-controller@10000000 {
109 compatible = "ingenic,jz4770-cgu", "simple-mfd";
110 reg = <0x10000000 0x100>;
111 #address-cells = <1>;
113 ranges = <0x0 0x10000000 0x100>;
115 clocks = <&ext>, <&osc32k>;
116 clock-names = "ext", "osc32k";
120 otg_phy: usb-phy@3c {
121 compatible = "ingenic,jz4770-phy";
124 clocks = <&cgu JZ4770_CLK_OTG_PHY>;
126 vcc-supply = <&ldo5>;