1 System Control and Management Interface (SCMI) Message Protocol
2 ----------------------------------------------------------
4 The SCMI is intended to allow agents such as OSPM to manage various functions
5 that are provided by the hardware platform it is running on, including power
6 and performance functions.
8 This binding is intended to define the interface the firmware implementing
9 the SCMI as described in ARM document number ARM DEN 0056A ("ARM System Control
10 and Management Interface Platform Design Document")[0] provide for OSPM in
15 The scmi node with the following properties shall be under the /firmware/ node.
17 - compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports
18 - mboxes: List of phandle and mailbox channel specifiers. It should contain
19 exactly one or two mailboxes, one for transmitting messages("tx")
20 and another optional for receiving the notifications("rx") if
22 - shmem : List of phandle pointing to the shared memory(SHM) area as per
23 generic mailbox client binding.
24 - #address-cells : should be '1' if the device has sub-nodes, maps to
25 protocol identifier for a given sub-node.
26 - #size-cells : should be '0' as 'reg' property doesn't have any size
28 - arm,smc-id : SMC id required when using smc or hvc transports
32 - mbox-names: shall be "tx" or "rx" depending on mboxes entries.
34 See Documentation/devicetree/bindings/mailbox/mailbox.txt for more details
35 about the generic mailbox controller and client driver bindings.
37 The mailbox is the only permitted method of calling the SCMI firmware.
38 Mailbox doorbell is used as a mechanism to alert the presence of a
39 messages and/or notification.
41 Each protocol supported shall have a sub-node with corresponding compatible
42 as described in the following sections. If the platform supports dedicated
43 communication channel for a particular protocol, the 3 properties namely:
44 mboxes, mbox-names and shmem shall be present in the sub-node corresponding
47 Clock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol
48 ------------------------------------------------------------
50 This binding uses the common clock binding[1].
53 - #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands.
55 Power domain bindings for the power domains based on SCMI Message Protocol
56 ------------------------------------------------------------
58 This binding for the SCMI power domain providers uses the generic power
62 - #power-domain-cells : Should be 1. Contains the device or the power
63 domain ID value used by SCMI commands.
65 Sensor bindings for the sensors based on SCMI Message Protocol
66 --------------------------------------------------------------
67 SCMI provides an API to access the various sensors on the SoC.
70 - #thermal-sensor-cells: should be set to 1. This property follows the
71 thermal device tree bindings[3].
73 Valid cell values are raw identifiers (Sensor ID)
74 as used by the firmware. Refer to platform details
75 for your implementation for the IDs to use.
77 Reset signal bindings for the reset domains based on SCMI Message Protocol
78 ------------------------------------------------------------
80 This binding for the SCMI reset domain providers uses the generic reset
84 - #reset-cells : Should be 1. Contains the reset domain ID value used
87 SRAM and Shared Memory for SCMI
88 -------------------------------
90 A small area of SRAM is reserved for SCMI communication between application
93 The properties should follow the generic mmio-sram description found in [4]
95 Each sub-node represents the reserved area for SCMI.
97 Required sub-node properties:
98 - reg : The base offset and size of the reserved area with the SRAM
99 - compatible : should be "arm,scmi-shmem" for Non-secure SRAM based
102 [0] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/index.html
103 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
104 [2] Documentation/devicetree/bindings/power/power-domain.yaml
105 [3] Documentation/devicetree/bindings/thermal/thermal*.yaml
106 [4] Documentation/devicetree/bindings/sram/sram.yaml
107 [5] Documentation/devicetree/bindings/reset/reset.txt
112 compatible = "mmio-sram";
113 reg = <0x0 0x50000000 0x0 0x10000>;
115 #address-cells = <1>;
117 ranges = <0 0x0 0x50000000 0x10000>;
119 cpu_scp_lpri: scp-shmem@0 {
120 compatible = "arm,scmi-shmem";
124 cpu_scp_hpri: scp-shmem@200 {
125 compatible = "arm,scmi-shmem";
133 reg = <0x0 0x40000000 0x0 0x10000>;
141 compatible = "arm,scmi";
142 mboxes = <&mailbox 0 &mailbox 1>;
143 mbox-names = "tx", "rx";
144 shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
145 #address-cells = <1>;
148 scmi_devpd: protocol@11 {
150 #power-domain-cells = <1>;
153 scmi_dvfs: protocol@13 {
158 scmi_clk: protocol@14 {
163 scmi_sensors0: protocol@15 {
165 #thermal-sensor-cells = <1>;
168 scmi_reset: protocol@16 {
178 clocks = <&scmi_dvfs 0>;
183 reg = <0 0x7ff60000 0 0x1000>;
184 clocks = <&scmi_clk 4>;
185 power-domains = <&scmi_devpd 1>;
186 resets = <&scmi_reset 10>;
191 polling-delay-passive = <100>;
192 polling-delay = <1000>;
194 thermal-sensors = <&scmi_sensors0 3>;