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x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
2018-07-04 Konrad Rzeszutek... x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-07-04 Konrad Rzeszutek... x86/KVM/VMX: Extend add_atomic_switch_msr() to allow...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-07-04 Konrad Rzeszutek... x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-07-04 Konrad Rzeszutek... x86/KVM/VMX: Add find_msr() helper function
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-07-04 Konrad Rzeszutek... x86/KVM/VMX: Split the VMX MSR LOAD structures to have...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-07-04 Paolo Bonzinix86/KVM/VMX: Add L1D flush logic
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-07-04 Paolo Bonzinix86/KVM/VMX: Add L1D MSR based flush
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-07-04 Paolo Bonzinix86/KVM/VMX: Add L1D flush algorithm
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-07-04 Konrad Rzeszutek... x86/KVM/VMX: Add module argument for L1TF mitigation
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-07-04 Konrad Rzeszutek... x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-07-02 Thomas Gleixnercpu/hotplug: Boot HT siblings at least once
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-07-02 Thomas GleixnerRevert "x86/apic: Ignore secondary threads if nosmt...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-29 Michal Hockox86/speculation/l1tf: Fix up pte->pfn conversion for PAE
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-27 Vlastimil Babkax86/speculation/l1tf: Protect PAE swap entries against...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-22 Borislav Petkovx86/CPU/AMD: Move TOPOEXT reenablement before reading...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Konrad Rzeszutek... x86/cpufeatures: Add detection of L1D cache flush support.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Vlastimil Babkax86/speculation/l1tf: Extend 64bit swap file size limit
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Thomas Gleixnerx86/apic: Ignore secondary threads if nosmt=force
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Thomas Gleixnerx86/cpu/AMD: Evaluate smp_num_siblings early
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Borislav Petkovx86/CPU/AMD: Do not check CPUID max ext level before...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Thomas Gleixnerx86/cpu/intel: Evaluate smp_num_siblings early
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Thomas Gleixnerx86/cpu/topology: Provide detect_extended_topology_early()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Thomas Gleixnerx86/cpu/common: Provide detect_ht_early()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Thomas Gleixnerx86/cpu/AMD: Remove the pointless detect_ht() call
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Thomas Gleixnerx86/cpu: Remove the pointless CPU printout
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Thomas Gleixnercpu/hotplug: Provide knobs to control SMT
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Thomas Gleixnercpu/hotplug: Split do_cpu_down()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Thomas Gleixnercpu/hotplug: Make bringup/teardown of smp threads symmetric
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Thomas Gleixnerx86/topology: Provide topology_smt_supported()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Thomas Gleixnerx86/smp: Provide topology_is_primary_thread()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Peter Zijlstrasched/smt: Update sched_smt_present at runtime
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-21 Konrad Rzeszutek... x86/bugs: Move the l1tf function and define pr_fmt...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-20 Andi Kleenx86/speculation/l1tf: Limit swap file size to MAX_PA/2
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-20 Andi Kleenx86/speculation/l1tf: Disallow non privileged high...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-20 Andi Kleenx86/speculation/l1tf: Add sysfs reporting for l1tf
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-20 Andi Kleenx86/speculation/l1tf: Make sure the first page is always...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-20 Andi Kleenx86/speculation/l1tf: Protect PROT_NONE PTEs against...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-20 Linus Torvaldsx86/speculation/l1tf: Protect swap entries against...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-20 Linus Torvaldsx86/speculation/l1tf: Change order of offset/type in...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-20 Andi Kleenx86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-10 Anna-Maria Gleixnersignal: Remove no longer required irqsave/restore
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-10 Anna-Maria Gleixnerrcu: Update documentation of rcu_read_unlock()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-09 Tony Luckx86/intel_rdt: Enable CMT and MBM on new Skylake stepping
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Thomas Gleixnerx86/apic/vector: Print APIC control bits in debugfs
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Thomas Gleixnergenirq/affinity: Defer affinity setting if irq chip...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Thomas Gleixnerx86/platform/uv: Use apic_ack_irq()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Thomas Gleixnerx86/ioapic: Use apic_ack_irq()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Thomas Gleixnerirq_remapping: Use apic_ack_irq()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Thomas Gleixnerx86/apic: Provide apic_ack_irq()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Thomas Gleixnergenirq/migration: Avoid out of line call if pending...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Thomas Gleixnergenirq/generic_pending: Do not lose pending affinity...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Thomas Gleixnerx86/apic/vector: Prevent hlist corruption and leaks
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Josh Poimboeufobjtool: Fix GCC 8 cold subfunction detection for aliased...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Konrad Rzeszutek... x86/bugs: Switch the selection of mitigation from CPU...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Konrad Rzeszutek... x86/bugs: Add AMD's SPEC_CTRL MSR usage
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Konrad Rzeszutek... x86/bugs: Add AMD's variant of SSB_NO
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Dou Liyangx86/vector: Fix the args of vector_alloc tracepoint
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Dou Liyangx86/idt: Simplify the idt_setup_apic_and_irq_gates()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Varsha Raox86/platform/uv: Remove extra parentheses
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Kirill A. Shutemovx86/mm: Decouple dynamic __PHYSICAL_MASK from AMD SME
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Arnd Bergmannx86: Mark native_set_p4d() as __always_inline
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Laurentiu Tudorirqchip/ls-scfg-msi: Map MSIs in the iommu
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Arnd Bergmannirqchip/stm32: Fix non-SMP build warning
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersrseq/selftests: Provide Makefile, scripts, gitignore
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersrseq/selftests: Provide parametrized tests
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersrseq/selftests: Provide basic percpu ops test
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersrseq/selftests: Provide basic test
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersrseq/selftests: Provide rseq library
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersselftests/lib.mk: Introduce OVERRIDE_TARGETS
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Boqun Fengpowerpc: Wire up restartable sequences system call
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Boqun Fengpowerpc: Add syscall detection for restartable sequences
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Boqun Fengpowerpc: Add support for restartable sequences
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersx86: Wire up restartable sequence system call
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersx86: Add support for restartable sequences
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersarm: Wire up restartable sequences system call
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersarm: Add syscall detection for restartable sequences
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersarm: Add restartable sequences support
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersrseq: Introduce restartable sequences system call
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-06 Mathieu Desnoyersuapi/headers: Provide types_32_64.h
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-06-01 Thomas GleixnerMerge tag 'irqchip-4.18' of git://git.kernel.org/pub...
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2018-05-27 Scott Woodx86/microcode: Make the late update update_lock a raw...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-23 Dominik Brodowskix86/speculation: Simplify the CPU bug detection logic
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-23 Konrad Rzeszutek... KVM/VMX: Expose SSBD properly to guests
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Thomas Gleixnerx86/Hyper-V/hv_apic: Build the Hyper-V APIC conditionally
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Alexei Starovoitovbpf: Prevent memory disambiguation attack
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Thomas Gleixnerx86/Hyper-V/hv_apic: Include asm/apic.h
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Borislav Petkovx86/MCE/AMD: Read MCx_MISC block addresses on any CPU
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Thomas GleixnerMerge branch 'ras/urgent' into ras/core
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2018-05-19 Borislav Petkovx86/MCE/AMD: Cache SMCA MISC block addresses
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Colin Ian Kingx86/apm: Fix spelling mistake: "caculate" -> "calculate"
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Arnd Bergmannx86: Convert x86_platform_ops to timespec64
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Arnd Bergmanntimekeeping: Add more coarse clocktai/boottime interfaces
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Arnd Bergmanntimekeeping: Add ktime_get_coarse_with_offset
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Arnd Bergmanntimekeeping: Standardize on ktime_get_*() naming
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Arnd Bergmanntimekeeping: Clean up ktime_get_real_ts64
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Arnd Bergmanntimekeeping: Remove timespec64 hack
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 Thomas GleixnerMerge branch 'linus' into timers/2038
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2018-05-19 K. Y. SrinivasanX86/Hyper-V: Consolidate the allocation of the hypercall...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 K. Y. SrinivasanX86/Hyper-V: Consolidate code for converting cpumask...
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2018-05-19 K. Y. SrinivasanX86/Hyper-V: Enhanced IPI enlightenment
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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