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drm/i915/gt: Don't cancel the interrupt shadow too early
2020-11-24 Chris Wilsondrm/i915/gt: Don't cancel the interrupt shadow too...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-24 Chris Wilsondrm/i915/gt: Track signaled breadcrumbs outside of...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-24 Chris Wilsondrm/i915/gt: Defer enabling the breadcrumb interrupt...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-24 Yan Zhaodrm/i915/gvt: correct a false comment of flag F_UNALIGN
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-24 Lionel Landwerlindrm/i915/perf: workaround register corruption in OATAILPTR
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-19 Chris Wilsondrm/i915/gt: Fixup tgl mocs for PTE tracking
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-19 Rodrigo ViviMerge tag 'gvt-fixes-2020-11-17' of https://github...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-19 Chris Wilsondrm/i915/gt: Remember to free the virtual breadcrumbs
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-19 Ville Syrjälädrm/i915: Handle max_bpc==16
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-16 Zhang Xiaoxudrm/i915/selftests: Fix wrong return value of perf_request_l...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-16 Zhang Xiaoxudrm/i915/selftests: Fix wrong return value of perf_series_en...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-16 Tvrtko Ursulindrm/i915: Avoid memory leak with more than 16 workarounds...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-16 Rodrigo Vividrm/i915/tgl: Fix Media power gate sequence.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
...msgid/20201111072859.1186070-1-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-13 Venkata Sandeep... drm/i915: Correctly set SFC capability for video engines
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-13 Chris Wilsondrm/i915/gem: Pull phys pread/pwrite implementations...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-13 Matthew Aulddrm/i915/gem: Allow backends to override pread implementation
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Chris Wilsondrm/i915: Hold onto an explicit ref to i915_vma_work...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Chris Wilsondrm/i915/gt: Flush xcs before tgl breadcrumbs
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Chris Wilsondrm/i915/gt: Expose more parameters for emitting writes...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Imre Deakdrm/i915: Fix encoder lookup during PSR atomic check
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Chris Wilsondrm/i915/gt: Use the local HWSP offset during submission
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Chris Wilsondrm/i915/gem: Flush coherency domains on first set...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-11-04 Rodrigo ViviMerge tag 'gvt-fixes-2020-10-30' of https://github...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-29 Ville Syrjälädrm/i915: Reject 90/270 degree rotated initial fbs
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-29 Ville Syrjälädrm/i915: Restore ILK-M RPS support
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-29 Matthew Aulddrm/i915/region: fix max size calculation
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-21 Chris Wilsondrm/i915: Drop runtime-pm assert from vgpu io accessors
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-21 Chris Wilsondrm/i915: Force VT'd workarounds when running as a...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-21 Chris Wilsondrm/i915: Exclude low pages (128KiB) of stolen from use
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-21 Chris Wilsondrm/i915/gt: Onion unwind for scratch page allocation...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Chris Wilsondrm/i915/gt: Wait for CSB entries on Tigerlake
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Chris Wilsondrm/i915/gt: Widen CSB pointer to u64 for the parsers
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Chris Wilsondrm/i915: Use the active reference on the vma while...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Chris Wilsondrm/i915/gt: Undo forced context restores after trivial...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Chris Wilsondrm/i915/gt: Delay execlist processing for tgl
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Chris Wilsondrm/i915/gem: Support parsing of oversize batches
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Ville Syrjälädrm/i915: Mark ininitial fb obj as WT on eLLC machines...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Ayaz A Siddiquidrm/i915/gt: Initialize reserved and unspecified MOCS...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-19 Sean Pauldrm/i915/dp: Tweak initial dpcd backlight.enabled value
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-12 Ville Syrjälädrm/i915: Set all unused color plane offsets to ~0xfff...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-10-12 Ville Syrjälädrm/i915: Fix TGL DKL PHY DP vswing handling
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915: Avoid mixing integer types during batch copies
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915/gem: Always test execution status on closing...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915/gt: Always send a pulse down the engine after...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915: Cancel outstanding work after disabling heartbeats...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915/gem: Hold request reference for canceling...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915: Redo "Remove i915_request.lock requirement...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915/gem: Serialise debugfs i915_gem_objects with...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Matthew Aulddrm/i915: check i915_vm_alloc_pt_stash for errors
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Maarten Lankhorstdrm/i915: Fix uninitialised variable in intel_context_create...
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915: Break up error capture compression loops...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Dan Carpenterdrm/i915: Fix an error code i915_gem_object_copy_blt()
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915/gt: Clear the buffer pool age before use
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915/gem: Prevent using pgprot_writecombine() if...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-30 Chris Wilsondrm/i915/gem: Avoid implicit vmap for highmem on x86-32
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-28 Ville Syrjälädrm/i915: Fix state checker hw.active/hw.enable readout
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-17 Rodrigo Vividrm/i915: Update DRIVER_DATE to 20200917
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-14 Rodrigo Vividrm/i915: Update DRIVER_DATE to 20200914
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-14 Rodrigo Vividrm/i915: Update DRIVER_DATE to 20200914
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-14 Rodrigo ViviMerge tag 'gvt-next-2020-09-10' of https://github.com...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-09-12 Rodrigo ViviMerge drm/drm-next into drm-intel-next-queued
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-24 Rodrigo Vividrm/i915: Update DRIVER_DATE to 20200824
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 José Roberto de... drm/i915: Update TGL and RKL HuC firmware versions
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 José Roberto de... drm/i915: Update TGL and RKL DMC firmware versions
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 José Roberto de... drm/i915/display: Implement WA 1408330847
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 José Roberto de... drm/i915: Initial implementation of PSR2 selective...
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Matt Roperdrm/i915/kbl: Fix revision ID checks
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 José Roberto de... drm/i915/tgl: Add new voltage swing table
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 José Roberto de... drm/i915/tgl: Set subplatforms
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Imre Deakdrm/i915/tgl: Fix TC-cold block/unblock sequence
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Imre Deakdrm/i915/tgl: Make sure TC-cold is blocked before enabling...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 George Spelvindrm/i915/selftests: Avoid passing a random 0 into ilog2
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Lionel Landwerlindrm/i915: add syncobj timeline support
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Lionel Landwerlindrm/i915: introduce a mechanism to extend execbuf2
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Matt RoperRevert "drm/i915/rkl: Add Wa_14011224835 for PHY B...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Tianjia Zhangdrm/i915: Fix wrong return value in intel_atomic_check()
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Tianjia Zhangdrm/i915: Fix wrong return value
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Matt Roperdrm/i915: Update bw_buddy pagemask table
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Chris Wilsondrm/i915: Add a couple of missing i915_active_fini()
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Chris Wilsondrm/i915/display: Check for an LPSP encoder before...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Chris Wilsondrm/i915: Remove gen check before calling intel_rps_boost
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Chris Wilsondrm/i915/selftests: Add compiler paranoia for checking...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Chris Wilsondrm/i915: Copy default modparams to mock i915_device
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Uma Shankardrm/i915/display/fbc: Disable fbc by default on TGL
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 José Roberto de... drm/i915: Implement WA 14011294188
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Chris Wilsondrm/i915/selftests: Downgrade severity of CS/SRM frequency...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Matt Roperdrm/i915/rkl: Add Wa_14011224835 for PHY B initialization
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Matt Roperdrm/i915/rkl: Handle HTI
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Matt Roperdrm/i915/rkl: Add DPLL4 support
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Matt Roperdrm/i915/rkl: Add initial workarounds
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Matt Roperdrm/i915/rkl: Handle new DPCLKA_CFGCR0 layout
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Ville Syrjälädrm/i915: Move WaDisableDopClockGating:skl to skl_init_clock...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 José Roberto de... drm/i915/display: Implement HOBL
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Alexei Podtelezhnikovdrm/i915: Remove dubious Valleyview PCI IDs
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Chris Wilsondrm/i915: Provide the perf pmu.module
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Imre Deakdrm/i915/ddi: Don't rewrite DDI_BUF_CTL reg during...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Imre Deakdrm/i915/ddi: Don't frob the DP link scramble disabling...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Ville Syrjälädrm/i915: Make i830 .get_cdclk() assignment less confusing
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Ville Syrjälädrm/i915: Fix some whitespace
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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2020-08-17 Ville Syrjälädrm/i915: Pack struct intel_cdclk_vals
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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